KR20080095809A - Method of transmitting and receiving a signal and apparatus for transmitting and receiving a signal - Google Patents

Abstract

A method of transmitting and receiving a signal and apparatus for transmitting and receiving a signal is provided to increase transmission range of signal by estimating a transmission channel having delay-spread characteristic. A forward error correction encoder(3100) encodes input data with forward error correction, and outputs an encode data. A symbol mapper(3120) converts the output data according to symbol mapping. A frame formation unit(3160) inserts a pilot symbol a frame including a data symbol. A transmission unit(3180) transmits a signal corresponding to the frame in which the pilot symbol is inserted.

Description

Method for transmitting and receiving a signal and apparatus for transmitting and receiving a signal

The present invention relates to a signal transmission and reception method and a signal transmission and reception apparatus, and more particularly, to a signal transmission and reception method and a transmission and reception apparatus that can increase the data transmission rate.

The development of digital broadcasting technology has made it possible to transmit and receive broadcast signals including high definition (HD) level video and good digital sound. Digital broadcasting systems continue to rapidly develop due to the continuous development of compression algorithms and high performance of hardware. A digital television (DTV) may receive a digital broadcast signal and provide various additional services in addition to video and audio to a user.

With the spread of digital broadcasting, there is an increasing demand for services such as better image and sound, and the size of data desired by the user and the number of broadcasting channels are gradually increasing.

However, there is a problem that the existing signal transmission and reception method can not cope with the increase in the amount of data transmission and reception or the number of broadcast channels. Therefore, a new signal transmission / reception technique has been studied that has a higher efficiency for channel bandwidth than a conventional signal transmission / reception scheme and requires less cost for constructing a signal transmission / reception network.

According to an aspect of the present invention, a forward error correction encoding unit outputs input data by performing forward error correction encoding according to a plurality of code levels, and converts the output data into symbols according to a plurality of symbol mapping methods. A signal transmitting apparatus including a symbol mapper to be inserted into a frame, a frame forming unit inserting a pilot symbol into a frame including the data symbol, and a transmitting unit transmitting a signal according to the frame into which the pilot symbol is inserted, and a signal transmitting method according to the performance of the apparatus. To provide.

The forward error correction encoder may perform error correction encoding on the input data using a high code rate forward error correction code and a low code rate forward error correction code, respectively.

The symbol mapper is a bit parser for dividing the interleaved data into a plurality of bitstreams, a plurality of mapping units for mapping the divided plurality of bitstreams into symbols according to a plurality of symbol mapping schemes, and mappings of the mapping units. The symbol merger may output a plurality of types of symbols as a single symbol string.

When the pilot carrier is included in the frame, the frame forming unit may arrange a symbol modulated by lower order modulation among a plurality of mapping methods mapped by the symbol mapper in the pilot carrier period.

In another aspect, the present invention provides a receiver for receiving a signal, a synchronizer for acquiring synchronization of the received signal, a demodulator for demodulating the acquired signal, a frame parser for parsing the demodulated signal frame, and the frame. Signal receiving apparatus comprising a symbol demapper for de-mapping the symbols included in the data into bit data according to a plurality of symbol mapping schemes, and a forward error correction decoding unit for forward error correction decoding the output data according to a plurality of code levels And a signal receiving method using the apparatus.

The forward error correction decoding unit may perform forward error correction decoding on input data using a high code rate forward error correction code and a low code rate forward error correction code, respectively.

The symbol demapper is a symbol parser for dividing an input symbol into a plurality of symbol strings, respectively, and outputs a demapper for demapping the symbol strings parsed by the symbol parser into bit data strings according to the plurality of symbol mapping methods. The demapping unit may include a bit merging unit configured to sum the bit data strings output by the demapping unit into one bit string and output the sum.

The signal receiving apparatus may further include an equalizer for estimating and compensating for a channel by using symbols modulated by lower order modulation among the plurality of symbol mapping schemes as pilot carriers. The channel estimation method may use a decision-directed channel estimation (DDCE) method, and the equalizer performs channel estimation by interpolating a symbol string modulated by the lower order modulation and performs the channel estimation with the estimated channel. Channel compensation may be performed on the symbols of the frame.

According to the signal transmission and reception method and the signal transmission and reception apparatus according to the present invention, it is easy to switch to the proposed signal transmission and reception system using the existing signal transmission and reception network network, it is possible to reduce the cost.

In addition, the data rate can be improved to obtain an SNR gain, and channel estimation can be performed for a transmission channel having a long delay spread characteristic, thereby increasing a signal transmission distance. Therefore, there is an effect that can increase the signal transmission and reception performance of the overall transmission and reception system.

The operation of the signal transmission and reception method and the embodiment of the signal transmission and reception apparatus according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically showing a signal transmission apparatus according to an embodiment according to the present invention.

The signal transmission apparatus of FIG. 1 may be a broadcast signal transmission system for transmitting a broadcast signal including video data. In FIG. 1, for example, a signal transmission system according to a digital video broadcasting (DVB) system will be described as follows. Accordingly, the embodiments described below relate to DVB, and if applied to other systems, the components may be arranged in an order different from that of the components of the following embodiments.

1 illustrates a process of processing a signal in a signal transmission system.

1 illustrates a forward error correction encoder (FEC) encoder 100, a first interleaver 110, a symbol mapper 120, and a linear precoding unit 130. ), A second interleaver 140, a multiple input / output encoder 150, a frame builder 160, a modulator 170, and a transmitter 180.

The forward error correction coder 100 encodes and outputs an input signal, thereby detecting an error in the transmitted data at the receiver and correcting the error. Data encoded by the forward error correction coder 100 is input to the first interleaver 110. A detailed example of the forward error correction coder 100 will be described in detail with reference to FIG.

The first interleaver 110 mixes and distributes the data strings output from the forward error correction coder 100 in a random position so as to be robust against burst errors occurring in the data during data transmission. A convolution interleaver, a block interleaver, or the like may be used for the first interleaver 110, which may vary depending on a transmission system. An embodiment of the first interleaver is illustrated in detail in FIG. 3. A detailed example of the first interleaver 110 is described in detail with reference to FIG. 3.

The data interleaved by the first interleaver 110 are input to the symbol mapper 120. The symbol mapper 120 may map pilot signals to symbols according to QAM, QPSK, etc. in consideration of pilot signals and transmission parameter signals according to transmission modes.

The linear precoding unit 130 distributes the input symbol data into a plurality of output symbol data, thereby reducing the probability that all information is lost due to fading when experiencing a frequency selective fading channel. Detailed examples of the linear precoding unit 130 will be described with reference to FIGS. 4 to 7.

The second interleaver 140 interleaves the symbol data output from the linear precoding unit 130 again. That is, when interleaving is performed in the second interleaver 140, an error caused by the symbol data undergoing the same frequency selective fading at a specific position may be corrected. A convolution interleaver, a block interleaver, or the like may be used for the second interleaver 140.

The linear precoding unit 130 and the second interleaver 140 process the data to be robust to the frequency selective fading of the channel, and may be referred to as a frequency selective fading coding unit.

The multiple input / output encoder 150 encodes the interleaved data in the second interleaver 140 to be transmitted to the plurality of transmit antennas. The signal transceiver may process a signal according to the multiple input / output scheme. Hereinafter, the multi-input / output method includes a multi input multi output (MIMO) method, a single input multiple output (SIMO) method, and a multi input single output (MISO) method.

As a multiple input / output encoding method, a spatial multiplexing method and a spatial diversity method can be used. Spatial multiplexing uses multiple antennas at the transmitter and the receiver to simultaneously transmit different data to transmit data at higher speed without further increasing the bandwidth of the system. In the spatial diversity scheme, diversity effects may be obtained by transmitting data of the same information from multiple transmission antennas.

In this case, the spatial diversity multiple input / output encoder 150 may use a space-time block code (STBC), a space-frequency block code (SFBC), a space-time trellis code (STTC), or the like. The spatial multiplex multiple input / output encoder 150 simply transmits data streams by separating the number of transmit antennas, and provides full-diversity full-rate (FDFR) code, linear dispersion code (LDC), and V-BLAST. (Vertical-Bell Lab. Layered space-time) and D-BLAST (diagonal-BLAST) can be used.

The frame forming unit 160 inserts a precoded signal into a predetermined position of the frame to form a frame defined by the transmission and reception system. The frame forming unit 160 may arrange a pilot symbol section which is a preamble of the data symbol section and the data symbol section in the frame. Therefore, hereinafter, the frame forming unit may be referred to as pilot insertion.

For example, the frame forming unit may arrange a distributed pilot carrier whose position is shifted in time in the data carrier section. The frame forming unit may arrange a continuous pilot carrier whose position is fixed in time in the data carrier section.

The modulator 170 loads the data output from the frame forming unit 160 on subcarriers of Orthogonal Frequency Division Multiplex (OFDM) and modulates them in an OFDM scheme, and then guards between modulated symbols. interval).

The transmitter 180 converts a digital signal having a guard interval and a data interval output from the modulator 170 into an analog signal and transmits the analog signal.

FIG. 2 is a block diagram schematically illustrating an embodiment of a forward error correction coder illustrated in FIG. 1. The forward error correcting code part includes a BCH (Bose-Chaudhuri-Hocquenghem) encoder 102 and a Low Density Parity Check (LDPC) encoder 104 as an outer encoder and an inner encoder.

The LDPC code is a type of error correcting code that can reduce the probability of data loss as much as possible. The LDPC encoder 104 can lengthen the length of the coding block so that the transmission data can be robust to transmission errors. In addition, in order to prevent an increase in hardware complexity due to an increase in the block size, the complexity of the decoder may be reduced by decreasing the density of parity bits.

In order to prevent an error floor from occurring in the output data of the receiving side, the BCH encoder 102 is concatenated before performing the LDPC encoder 104 as an additional outer encoder. Use it. If only the LDPC encoder 104 is used and the error floor occurs to a negligible level, the BCH encoder 102 may not be used. Alternatively, an encoder other than the BCH encoder may be used as the outer encoder.

When two error correction encodings are used, parity check bits (BCH parity check bits) for BCH encoding are added after the input data frame, and parity check bits (LDPC parity check bits) for LDPC encoding are added to the BCH parity check. Is added after the bit. The length of the BCH parity check bit added to the data frame to be encoded may vary depending on the length of the LDPC codeword and the LDPC code rate.

 The forward error correction encoded data is output to the first interleaver 110 through the BCH encoder 102 and the LDPC encoder 104.

3 is a diagram illustrating an embodiment of the first interleaver illustrated in FIG. 1. As the first interleaver of FIG. 3, for example, a block interleaver may be used.

The interleaver of FIG. 3 stores data input to a matrix-type storage space in a predetermined pattern, and reads and outputs data in a pattern different from a pattern for storing data. For example, the interleaver of FIG. 3 has a storage space Nr × Nc consisting of a row of Nr and a column of Nc, and the data input to the interleaver is filled from the position of the first column and one row of the storage space. It stores data from row 1 of column 1 up to row Nr in column 1, and when column 1 is full, it stores data from row 1 of the next column (column 2) up to row Nr. In this order, data can be stored up to Nr rows of Nc columns.

In the case of reading the stored data as shown in FIG. 3, the data of one row is read and output starting from the data of one row and one column of the storage space up to one row and Nc column. When all data in one row is read, the data of the row is read and output in the column direction starting from the first column of the next row (row 2). Data can be read and output up to Nc columns of Nr rows in the same order as described above. At this time, the MSB (Most Significant Bit) position of the data block is at the top left, and the LSB (Least Significant Bit) position is at the bottom right.

The size, storage pattern, and read pattern of the storage block of the interleaver are one embodiment, which may vary depending on the implementation. For example, the size of the storage block of the first interleaver may vary according to the size of the coding block. According to the example of FIG. 2, the size of the row Nr and the column Nc of the block determining the size of the interleaved block in the first interleaver may vary depending on the length of the LDPC code block. As the length increases, the length of the block (eg, the length of the rows of the block) may increase.

4 is a diagram illustrating an embodiment of the linear precoding unit of FIG. 1. The linear precoding unit 130 may include a serial / parallel converter 132, an encoder 134, and a parallel / serial converter 136.

The serial / parallel converter 132 converts the input data into parallel data. The encoding unit 134 distributes each value of the converted parallel data into a plurality of data through encoding matrixing operations.

The encoding matrix may be designed such that pairwise error probability (PEP), which is a probability that two symbols are wrong, is minimized by comparing a transmitted symbol with a received symbol. Designing to minimize PEP maximizes the diversity gain and coding gain achieved through linear precoding.

In addition, when the minimum Euclidean distance of a linear precoded symbol is maximized through the encoding matrix, an error probability may be minimized when the receiver uses a maximum likelihood (ML) decoder.

FIG. 5 is a diagram illustrating a matrix of codes for distributing input data as an embodiment of an encoding matrix used by the encoding unit 134. 5 is called a vanderMonde matrix as an example of an encoding matrix for distributing input data into multiple output data.

The input data may be arranged in parallel in the length (L) of the output data.

Θ of the matrix can be expressed by the following equation, and can also be defined in other ways. If the vanderMonde matrix is used as the encoding matrix, the matrix element may be determined according to Equation 1.

The encoding matrix of Equation 1 rotates each input data by the phase of the corresponding Equation 1 to generate output data. Accordingly, values input according to the characteristics of the matrix of the linear precoding unit of Equation 1 may be distributed to at least two output values.

In Equation 1, L represents the number of output data. Assuming that the input data group input to the encoding unit of FIG. 4 is x and the data group coded and output from the encoding unit 134 by the matrix of Equation 1 is y, y is represented by Equation 2 below.

6 illustrates another embodiment of an encoding matrix. 6 is called a Hadamard matrix as an example of an encoding matrix that distributes input data to multiple output data. The matrix of FIG. 6 is a general form in which any L is extended to a power of k squared of 2, and 'L' represents the number of output symbols for distributing respective input symbols.

The output symbols of the matrix of FIG. 6 can be obtained by the sum and difference of the L input symbols. In other words, each input symbol may be distributed to L output symbols, respectively.

Also in the case of the matrix of FIG. 6, if the input data group input to the encoding unit 134 of FIG. 4 is x and the data group coded and output from the encoding unit 134 by the matrix is y, y is It is the product of the matrix and x.

7 illustrates another embodiment of an encoding matrix for distributing input data. 7 is called Golden code as an example of an encoding matrix for distributing input data into multiple output data. Golden code is a special form of 4x4 matrix, where two different 2x2 matrices can be used alternately.

FIG. 7C shows a code matrix of a golden code, and x1, x2, x3, and x4 in the code matrix represent symbol data that can be input in parallel to the encoding unit 134 of FIG. Indicates. Each constant in the code matrix may determine the characteristics of the code matrix, and the values of the rows and columns calculated from the constants and the input symbol data of the code matrix may be represented as output symbol data. The order of outputting the symbol data may vary depending on implementation. Accordingly, in this case, the parallel / serial converter 136 of FIG. 4 may convert the parallel data into serial data according to the data position order in the parallel data set output by the encoder 134 and output the serial data.

FIG. 8 is a diagram illustrating a structure of a transmission frame of channel coded data according to the embodiment of FIGS. 1 to 7. The transmission frame formed according to the present embodiments may include a pilot symbol including pilot carrier information and a data symbol including data information.

In the example of FIG. 8, one frame includes M (M is a natural number) intervals, and is divided into M-1 data symbol intervals and one pilot symbol interval used as a preamble. The frame having the above structure is repeated.

Each symbol period includes carrier information as many as the number of subcarriers of an Orthogonal Frequency Division Multiplex (OFDM) scheme. The pilot carrier information of the pilot symbol interval is composed of random data in order to lower the peak to average power ratio (PAPR). The pilot carrier information has a form in which auto-correlation is an impulse in the frequency domain. In addition, the pilot carrier symbols may have a correlation value close to zero.

Thus, the pilot symbol interval used as the preamble can enable the receiver to quickly recognize the signal frame of FIG. 8 and can be used to correct and synchronize the frequency offset. And, since the pilot symbol interval indicates the start of the signal frame, the system transmission parameter value may be set so that the received signal can be synchronized quickly. After the data symbol section is formed, the frame forming unit inserts the data symbol section in front of the data symbol section to form one transmission frame.

If there is a separate section including pilot carrier information in the transmission frame as shown in FIG. 8, the pilot carrier information may not be included in the data symbol section, thereby increasing the data capacity. For example, in the case of DVB, since the pilot carrier occupies about 10% of the total effective carriers, the increase rate of data capacity is expressed by the following equation.

In Equation 3, Δ represents an increase rate, and M is the number of sections included in one frame.

FIG. 9 is a block diagram schematically illustrating an example of processing a signal through a plurality of transmission paths in a signal transmission apparatus as another embodiment of the signal transmission apparatus. For convenience of explanation, the following description will be given by using two transmission paths as an example.

9 illustrates a forward error correction coder 700, a first interleaver 710, a symbol mapper 720, a linear precoding unit 730, a second interleaver 740, A multi-input multi-output encoder 750, a first frame builder 760, a second frame generator 765, a first modulator 770, and a second modulator ( 775, a first transmitter 780, and a second transmitter 785.

An example of signal processing from the forward error correction coder 700 to the multiple input / output encoder 750 is the same as that described with reference to FIG. 1.

The forward error correction coder 700 includes a BCH encoder and an LDPC encoder, and outputs an error correction coded input data. The output data is interleaved in the first interleaver 710 so that the data sequences are mixed. A convolution interleaver, a block interleaver, or the like may be used for the first interleaver 710.

The symbol mapper 720 maps a transmission signal to a symbol according to a QAM, QPSK, etc. method in consideration of a pilot signal and a transmission parameter signal according to a transmission mode. For example, when symbol mapping to 128QAM, 7 bits of data may be included in one symbol, and symbol mapping to 256QAM may include 8 bits of data in one symbol.

The linear precoding unit 730 includes a serial / parallel converter, an encoder, and a parallel / serial converter. Examples of the coding matrix used by the encoding unit of the linear precoding unit 730 are illustrated in FIGS. 10 to 15.

The second interleaver 740 interleaves the symbol data output from the linear precoding unit 730 again. A convolution interleaver, a block interleaver, or the like may be used for the second interleaver 740. The second interleaver 740 mixes the symbol data such that the symbol data dispersed in the data output from the linear precoding unit 730 does not undergo frequency selective fading at the same specific position on the frame. The interleaving scheme may vary depending on the implementation of the transmission and reception system.

In the case of using the block interleaver, the length of the interleaver may vary depending on implementation. If the length of the interleaver is less than or equal to the OFDM symbol length, interleaving is performed only in an area within one OFDM symbol, and if the length of the interleaver is longer than the OFDM symbol length, it can be interleaved over several symbols. 15 and 16 illustrate in detail the interleaving scheme.

The interleaved data is output to the multiple input / output encoder 750, and the multiple input / output encoder 750 encodes and outputs the input symbol data to be carried on a plurality of transmission antennas. For example, when there are two transmission paths, the multiple input / output encoder 750 outputs precoded data to the first frame forming unit 760 or the second frame forming unit 765.

In the case of the spatial diversity method, data of the same information is output to the first frame forming unit 760 and the second frame forming unit 765, respectively, and when encoded in the spatial multiplexing method, the first frame forming unit ( Different data is output to the 760 and the second frame forming unit 765.

The first frame forming unit 760 and the second frame forming unit 765 form a frame into which a pilot signal is inserted so as to modulate the received signals in an orthogonal frequency division multiplex (OFDM) scheme.

The frame includes one pilot symbol period and M-1 data symbol periods. When the transmission system of FIG. 9 performs multiple input / output encoding using a plurality of antennas, a structure of a pilot symbol may be determined so that each transmission path may be distinguished at a receiver.

An example of the multiple input / output encoder 750 of FIG. 9 is illustrated in FIGS. 18 and 19.

The first modulator 770 and the second modulator 775 respectively transmit data output from the first frame former 760 and the second frame former 765 to subcarriers of OFDM. Modulate to be transmitted by

The first transmitter 780 and the second transmitter 785 respectively convert a digital format signal having a guard interval and a data interval output from the first modulator 770 and the second modulator 775 into analog signals. Convert, and transmit the converted analog signal.

10 to 14 are diagrams illustrating an example of a 2 × 2 code matrix for distributing input symbols as an example of an encoding matrix of the linear precoding unit. The code matrix of FIGS. 10 to 14 distributes two data input to the encoding unit of the linear precoding unit 730 to two output data.

) 회전된 두 번째 입력 데이터를 더하여 첫 번째 출력 데이터로 출력한다. 그리고, 첫 번째 입력 데이터와 위상이 225도(

) 회전된 두 번째 입력 데이터를 더하여 두 번째 출력 데이터로 출력한다. 그리고 상기 각 출력 데이터는

로 나누어 스케일링(scaling)된다.The matrix of FIG. 10 is an embodiment of the vanderMonde matrix described in FIG. 5 and illustrates the case where L is 2. The matrix of FIG. 10 is 45 degrees out of phase with the first of the two input data.

) Add the rotated second input data and output it as the first output data. The first input data and phase are 225 degrees (

) Add the rotated second input data and output it as the second output data. And each output data

It is scaled by dividing by.

The matrix of FIG. 11 is an embodiment of a Hadamard matrix.

로 나누어 스케일링(scaling)된다.The matrix of FIG. 11 adds the first input data and the second input data among the two input data and outputs the first output data. The matrix is output as the second output data by subtracting the second input data from the first input data. And each output data

It is scaled by dividing by.

12 illustrates another example of a code matrix for distributing input symbols. The matrix of FIG. 12 is an embodiment of another code other than the example of the matrix described with reference to FIGS. 5, 6, and 7.

) 회전된 첫번째 입력 데이터와 위상이 -45도(

) 회전된 두번째 입력 데이터를 더하여 첫번째 출력 데이터로 출력하며, 위상이 45도 회전된 첫번째 입력 데이터에서 위상이 -45도 회전된 두번째 입력 데이터를 빼서 두번째 출력 데이터로 출력한다. 그리고 상기 각 출력 데이터는

로 나누어 스케일링된다.The matrix of FIG. 12 has a phase of 45 degrees (

) The first input data rotated and the phase is -45 degrees (

The second input data rotated is added to the first output data, and the second input data rotated by -45 degrees is subtracted from the first input data rotated by 45 degrees to output the second output data. And each output data

Is scaled by dividing by.

13 illustrates another example of a code matrix for distributing input symbols. The matrix of FIG. 13 is an embodiment of another code other than the matrix described with reference to FIGS. 5, 6, and 7.

로 나누어 스케일링한다.The matrix of FIG. 13 adds the first input data multiplied by 0.5 to the second input data and outputs the first output data, and subtracts the second input data multiplied by 0.5 from the first input data and outputs the second output data. And each output data

Divide by to scale.

14 illustrates another example of a code matrix for distributing input symbols. The matrix of FIG. 14 is another embodiment of code other than the matrix described with reference to FIGS. 5, 6, and 7. '*' Of FIG. 14 means a complex conjugate with respect to input data.

) 회전된 첫번째 입력 데이터와 두번째 입력 데이터를 더하여 첫번째 출력 데이터로 출력하며, 첫번째 입력 데이터의 켤레 복소수와 위상이 -90(

)도 회전된 두번째 입력 데이터의 켤레 복소수를 더하여 두번째 출력 데이터로 출력한다. 그리고 상기 각 출력 데이터는

로 나누어 스케일링한다.The matrix of FIG. 14 has a phase of 90 degrees between two input data.

) The first input data and the second input data rotated are added to output the first output data. The complex number and phase of the first input data are -90 (

) Also outputs the second output data by adding the complex conjugate of the rotated second input data. And each output data

Divide by to scale.

15 is a diagram illustrating an example of an interleaving method of an interleaver. The interleaving scheme of FIG. 15 may be used in the second interleaver 740 of the transmitting apparatus as shown in FIG. 9 as an embodiment of an interleaver for an OFDM system having a symbol length N.

N represents the length of the interleaver, i has a value equal to the length of the interleaver, that is, an integer value from 0 to N-1. n has the number of effective transport carriers in the transmission system. ∏ (i) indicates a permutation of modulo-N operations, and dn has the value of ∏ (i) in the effective transport carrier region in order except N / 2 values. k represents an index value of the actual transport carrier, and subtracts N / 2 from the dn so that the center of the transmission bandwidth is DC. P is a permutation constant and may vary depending on the embodiment.

FIG. 16 is a diagram illustrating a change in the value of each variable according to the interleaving method illustrated in FIG. 15. In the example of FIG. 16, the length of an OFDM symbol and the length N of an interleaver are set to 2048, and the number of effective transmission carriers is set to 1536 (1792-256).

Therefore, i is an integer of 0-2047, n is an integer of 0-1535. ∏ (i) is a permutation of modulo-2048 operations, and dn has a value of ∏ (i) in order except 1024 (N / 2) for a value of 256 ≦ ∏ (i) ≦ 1792. k is a value obtained by subtracting 1024 from dn. P has 13.

By using the interleaver according to the above-described scheme, data corresponding to the data order i input for the length N of the interleaver may be converted into the interleaved data order k and output.

17 is a diagram illustrating an example of a method of encoding by a multiple input / output encoder. The embodiment of FIG. 17 is STBC, which is one of multiple input / output encoding schemes, and may be used in the transmission apparatus of FIG.

In the example of an STBC encoder, T denotes a symbol transmission period, s denotes an input symbol to be transmitted, and y denotes an output symbol. * Denotes a complex conjugate, and a first antenna (Tx # 1) and a second antenna (Tx # 2) mean a first transmit antenna and a second transmit antenna 2, respectively.

According to the example of FIG. 17, the first antenna Tx # 1 transmits s ₀ and the second antenna Tx # 2 transmits s ₁ at time t, and the first antenna Tx # 1 at time t + T. ) Transmits -s ₁ ^* and the second antenna (Tx # 2) transmits s ₀ ^* . Each transmitting antenna transmits data of the same information of s ₀ and s ₁ within a transmission period. Accordingly, the receiver may obtain a spatial diversity effect by using the signal output by the multiple input / output encoder according to the scheme illustrated in FIG. 17.

The signal transmitted by the first antenna and the second antenna illustrated in FIG. 17 is an example of multiple input / output encoding. Referring to FIG. 17 from another viewpoint, the transmission signal of the first antenna and the second antenna may be a multi-input single output ( It can be said to be transmitted in the form of mulit-input, single-output).

In the example of FIG. 17, two consecutive signals s0 and -s1 * may be input as a path transmitted to a first antenna, and s1 and s0 * may be input as a path transmitted to a second antenna. have. Therefore, since s0 and -s1 * are continuously output to the first antenna and s1 and s0 * are output to the second antenna, output symbols are transmitted according to the format of a multi-input single output. You may. FIG. 17 illustrates a simplest example using two antennas, and may transmit a signal according to the method illustrated in FIG. 17 using more antennas.

Referring to FIG. 17 in the form of a multi-input single output, after the first symbol and the consecutive and second symbols s0 and -s1 * are multi-input, The first symbol and the second symbol (s0, -s1 *) are simultaneously output a negative multiple of the conjugate complex number of the second symbol and the conjugate complex number (s1, s0 *) of the first symbol, respectively. That is, the multi-input symbols may be encoded and output according to an Alamouti algorithm.

The multiple input / output encoder may transmit a signal interleaved by the second interleaver in a frequency domain to a multi-input single output. On the other hand, the multiple input / output (including multiple input single output (mulit-input, single-output)) illustrated in FIG. 17 is not applied to the pilot symbol section illustrated in FIGS. 18 and 19, but only to the data symbol section.

FIG. 18 is a diagram illustrating a structure of a pilot carrier in a pilot symbol period formed by the first and second frame forming units of FIG. 9. The pilot symbol period formed by the frame forming unit of FIG. 9 may be output as illustrated in FIG. 8.

The pilot carriers included in the frames output by the first and second frame formers are output to the first and second antennas, respectively. Therefore, FIG. 18 shows the types of pilot symbols formed by the first and second frame forming units, respectively, as signals output from the first and second antennas.

In the pilot symbol intervals output from the first and second frame formers of FIG. 9, even and odd pilot carriers are interleaved, respectively, as shown in FIG. 18, so that the first and second antennas #antenna # 1 and antenna # 2) can be output.

For example, the pilot symbol interval generated by the first frame former includes only even pilot information of the generated pilot carriers, and the even pilot carriers are transmitted through the first antenna antenna # 0. The pilot symbol period generated by the second frame forming unit includes only the odd pilot carrier information among the generated pilot carriers and is transmitted through the antenna # 1. Accordingly, the receiving side can distinguish each transmission path using the corresponding carrier index of the pilot symbol interval received through the two signal paths. The structure of the pilot symbol interval of FIG. 18 may be used when multiple input / output encoding is performed to have two transmission paths as shown in FIG. 11.

In the embodiment of FIG. 18, a channel corresponding to half of a subcarrier of one frame may be estimated from one symbol. Therefore, high channel estimation performance can be obtained even for a transmission channel having a short coherence time.

FIG. 19 is a diagram illustrating another structure of a pilot carrier in a pilot symbol period formed by the first and second frame forming units of FIG. 9. In FIG. 19, different pilot carriers are transmitted in a pilot symbol interval for each path according to multiple input / output encoding.

The pilot carrier transmission structure of the pilot symbol interval illustrated in FIG. 19 is called a Hadamard type pilot carrier transmission structure. The embodiment of FIG. 19 performs Hadamard transformation on a symbol interval basis to distinguish two transmission paths. For example, a pilot carrier in which two pilot carrier information for each transmission path is combined is transmitted in an even symbol interval, and a difference of two pilot carrier information is transmitted in an odd symbol interval.

The pilot symbol interval is divided into an even interval and an odd interval according to time. Even symbols of the pilot carriers are transmitted via the first path (denoted by antenna # 0) and the second path (denoted by antenna # 1), respectively, so that the receiver is transmitted on two paths. The information may be used as a pilot carrier that is a combination of pilot carriers, and odd symbols of the pilot carriers are transmitted in the first path (first antenna (indicated by antenna # 0)), and pilot carriers having a 180 degree phase difference of the odd symbols are second. It is transmitted via a path (denoted by antenna # 1), so that the receiver can recognize the sum or difference of two pilot carrier information through the received pilot index to distinguish each transmission path.

In such an embodiment, a channel corresponding to all subcarriers can be estimated, and an estimated length of delay spread of a channel that can be processed for each transmission path can be extended by a symbol length.

The example of FIG. 19 is illustrated so as to easily distinguish the two pilot carrier information, and shows both pilot carrier information in the frequency domain. In the case of the even symbol interval and the odd symbol interval diagram, impulses of two pilot carrier information are located at the same frequency point.

18 and 19 illustrate examples of two transmission paths. When the transmission paths are more than one, the pilot carrier information may be divided to be divided by the number of transmission paths, similar to FIG. 18. Similarly, the transmission may be performed by performing Hadamard transformation on a symbol interval basis.

20 is a block diagram illustrating an embodiment of a signal receiving apparatus. The signal transceiving device may be a system capable of transmitting and receiving broadcast signals according to a DVB system.

20 illustrates a receiver 1300, a synchronizer 1310, a demodulator 1320, a frame parsing unit 1330, a multiple input / output decoder 1340, and a first deinterleaver 1350. And a linear precoding decoder 1360, a symbol demapper 1370, a second deinterleaver 1380, and a forward error correction decoder 1390. 20 illustrates an example of a process of processing a signal in a signal receiving system.

The receiver 1300 down-converts the frequency band of the received RF signal and converts the frequency band into a digital signal. The synchronizer 1310 obtains and outputs a synchronization between a frequency domain and a time domain of the received signal output from the receiver 1300. The synchronizer 1310 may use an offset result of the frequency domain of the data output by the demodulator 1320 to acquire the synchronization of the frequency domain signal.

The demodulator 1320 demodulates the received data output from the synchronizer 1310 and removes the guard interval. To this end, the demodulator 1320 may convert the received data into the frequency domain and obtain data values distributed in subcarriers.

The frame parser 1330 may output symbol data of a data symbol period excluding pilot symbols according to the frame structure of the signal demodulated by the demodulator 1320.

The frame parser 1330 may parse the frame using at least one of a distributed pilot carrier whose position is shifted in time in the data carrier section and a continuous pilot carrier whose position is fixed in the data carrier section in time.

The multiple input / output decoder 1340 receives and decodes the data output from the frame parser 1330 and outputs one data string. The multiple input / output decoder 1340 may output one data string by decoding the data string received by the plurality of transmit antennas according to a method corresponding to the method of transmitting to the plurality of transmit antennas in FIG. 1. .

The first deinterleaver 1350 performs de-interleaving on the data sequence output from the multiple input / output decoder 1340 to restore the data in the order before interleaving. The first deinterleaver 1350 may deinterleave according to a method corresponding to the method interleaved by the second interleaver 140 of FIG. 1 to restore the order of data columns.

The linear precoding decoder 1360 performs an inverse process of distributing data in the signal transmission apparatus. Therefore, data distributed according to linear precoding may be restored to data before being distributed. An embodiment of the linear precoding decoder 1360 is illustrated in FIGS. 21-22.

The symbol demapper 1370 may restore the symbol data decoded by the linear precoding decoder 1360 into a bit string. The symbol demapper 1370 performs a reverse process of symbol mapping by the symbol mapper.

The second deinterleaver 1380 performs de-interleaving on the data string output from the symbol demapper 1370 to restore the data in the order before interleaving. The second deinterleaver 1380 deinterleaves the data in a manner corresponding to the method interleaved by the first interleaver 110 of FIG. 1 to restore the order of the data columns.

The forward error correction decoder 1390 may forward error correct and decode the data in which the data sequence is restored, detect an error occurring in the received data, and correct the error. An example of the forward error correction decoder 1390 is illustrated in FIG. 26.

21 is a block diagram schematically illustrating an example of the linear precoding decoder of FIG. 10. The linear precoding decoder 1360 includes a serial / parallel converter 1342, a first decoder 1344, and a parallel / serial converter 1366.

The serial / parallel conversion unit 1362 converts the input data into parallel data. The first decoding unit 1164 may linearly precode the parallel data through decoding matrixing to restore the distributed data to the original data. The decoding matrix for performing the decoding becomes an inverse matrix of the encoding matrix of the signal transmission apparatus. For example, when the signal transmission apparatus encodes using a vanderMonde matrix, a Hadamard matrix, a golden code, or the like as shown in FIGS. 5, 6, and 7, the first decoder 1164 uses inverse matrix of the matrices, respectively. Restore the distributed data to the original data.

The parallel / serial converter 1366 converts the parallel data received by the first decoder 1164 back into serial data and outputs the serial data.

22 is a block diagram schematically showing another example of a linear precoding decoder. The linear precoding decoder 1360 includes a serial / parallel converter 1361, a second decoder 1363, and a parallel / serial converter 1365.

The serial / parallel converter 1361 converts the input data into parallel data, and the parallel / serial converter 1365 serializes the parallel data received by the second decoder 1363 again. Convert it to data and output it. The second decoding unit 1363 may restore and output original data distributed in parallel data output from the serial / parallel conversion unit 1361 using ML (Maximum Likelihood) decoding.

The second decoding unit 1363 is an ML decoder that decodes data according to a transmission scheme of a transmitter. The second decoding unit 1363 may decode the received symbol data to correspond to the transmission scheme, and restore original data dispersed in the parallel data. That is, the ML decoder decodes the received symbol data according to the encoding scheme at the transmitting end.

23 to 25 illustrate an example of a 2 × 2 code matrix for reconstructing a distributed symbol. The code matrixes of FIGS. 23 to 25 each represent an inverse matrix corresponding to the 2 × 2 type encoding matrix of FIGS. 12 to 14. According to FIGS. 23 to 25, the code matrix may restore and output data dispersed in two data input to the decoding unit of the linear precoding decoder 1360.

In detail, FIG. 23 is a decoding matrix corresponding to the encoding matrix of FIG. 12.

) 회전된 첫번째 입력 데이터와 위상이 -45도(

) 회전된 두번째 입력 데이터를 더하여 첫번째 출력 데이터가 출력된다. 그리고, 위상이 45도 회전된 첫번째 입력 데이터에서 위상이 45도 회전된 두번째 입력 데이터를 빼서 두번째 출력 데이터로 출력한다. 그리고 각각 출력 데이터는

로 나누어 스케일링한다.Using the matrix of FIG. 23, the phase of the two input data is -45 degrees (

) The first input data rotated and the phase is -45 degrees (

) The first output data is output by adding the rotated second input data. The second input data of which the phase is rotated by 45 degrees is subtracted from the first input data of which the phase is rotated by 45 degrees, and output as the second output data. And each output data

Divide by to scale.

로 나누어 스케일링한다.24 is a diagram illustrating another example of a 2 × 2 code matrix. The matrix of FIG. 24 is a decoding matrix corresponding to the encoding matrix of FIG. 13. The matrix of FIG. 13 adds the first input data multiplied by 0.5 to the second input data and outputs the first output data, and subtracts the second input data multiplied by 0.5 from the first input data and outputs the second output data. And each output data

Divide by to scale.

25 illustrates another example of a 2 × 2 code matrix. The matrix of FIG. 25 is a decoding matrix corresponding to the encoding matrix of FIG. 14. '*' In FIG. 25 means a complex conjugate with respect to input data.

) 회전된 첫번째 입력 데이터와 두번째 입력 데이터의 켤레 복소수를 더하여 첫번째 출력 데이터로 출력하며, 첫번째 입력 데이터와 위상이 -90도(

) 회전된 두번째 입력 데이터의 켤레 복소수를 더하여 두번째 출력 데이터로 출력한다. 그리고 상기 각 출력 데이터는

로 나누어 스케일링한다.The matrix of FIG. 25 has a phase of −90 degrees (

The first input data is rotated and the complex of the second input data is added to output the first output data. The first input data and the phase are -90 degrees (

) Adds the complex conjugate of the rotated second input data and outputs it as the second output data. And each output data

Divide by to scale.

26 is a block diagram schematically illustrating a forward error correction decoding unit. The forward error correction decoding unit 1390 corresponds to the forward error correction encoding unit 100 of FIG. 1. In addition, an LDPC decoder 1392 and a BCH decoder 1394 may be included as an inner decoder and an outer decoder, respectively.

The LDPC decoder 1392 corrects an error by detecting a transmission error occurring in a channel, and the BCH decoder 1394 corrects a residual error of data decoded by the LDPC decoder 1372 to remove an error floor. .

27 is a block diagram showing another embodiment of a signal receiving apparatus. For convenience of explanation, the following description will be given by using two reception paths as an example.

27 illustrates a first receiver 1700, a second receiver 1705, a first synchronizer 1710, a second synchronizer 1715, a first demodulator 1720, and a second demodulator 1725. ), A first frame parser 1730, a second frame parser 1735, a multiple input / output decoder 1740, a third deinterleaver 1750, a linear precoding decoder 1760, a symbol demapper 1770, A fourth deinterleaver 1780 and a forward error correction decoder 1790 are included.

The first receiver 1700 and the second receiver 1705 each receive an RF signal, downconvert the frequency band, and convert the digital signal into a digital signal. The first synchronizer 1710 and the second synchronizer 1715 obtain and synchronize the frequency domain and the time domain of the received signal output from the first receiver 1700 and the second receiver 1705, respectively. The first synchronization unit 1710 and the second synchronization unit 1715 are offsets of the frequency domain of the data output from the first demodulator 1720 and the second demodulator 1725, respectively, to obtain synchronization of the frequency domain signals. (offset) results are available.

The first demodulator 1720 demodulates the received data output from the first synchronizer 1710. To this end, the first demodulator 1720 converts the received data into the frequency domain, and decodes the data values distributed in the subcarriers into values assigned to each subcarrier. The second demodulator 1725 demodulates the received data output from the second synchronizer 1715.

The first frame parser 1730 and the second frame parser 1735 distinguish pilot paths according to frame structures of signals demodulated by the first demodulator 1720 and the second demodulator 1725, respectively. The symbol data of the data symbol section excluding the symbol may be output.

The multiple input / output decoder 1740 may receive data output from the first frame parser 1730 and the second frame parser 1735 to decode each data string received to output one data string. . Signal processing from the linear precoding decoder 1760 to the forward error correction decoding unit 1790 is the same as that described with reference to FIG. 13 and FIG. 20.

28 is a diagram illustrating a method of decoding by a multiple input / output decoder. That is, in the case where data is transmitted by multiple input / output encoding using the STBC method at the transmitting side, a corresponding decoding example is shown at the receiving side, and two transmitting antennas can be used at the transmitting side. This is an example and the application of other multiple input / output methods is not excluded.

R (k), h (k), s (k), and n (k) in the equations represent symbols received at the receiver, channel response, symbol values transmitted at the transmitter, and channel noise, respectively. Subscripts s, i, 0, and 1 denote an sth transmission symbol, an ith reception antenna, a 0th transmission antenna, and a 1st transmission antenna, respectively. '*' Represents a complex conjugate. For example, h _{s, 1, i} (k) indicates a response of the channel experienced by the transmitted symbol when the s-th transmitted symbol is received by the i-th reception antenna. r _{s + 1, i} (k) represents the s + 1 th received symbol received at the i th receive antenna.

According to the equation of FIG. 28, r _{s, i} (k) _, which is the s-th reception symbol received at the i-th reception antenna, is the s-th symbol value transmitted through the channel from the 0th transmission antenna to the i-th reception antenna, and the 1st transmission It is the sum of the s-th symbol value transmitted over the channel and the sum of the channel noise of each channel (n _s (k)).

And r _{s +1} , which is the s + 1 th received symbol received at the i th receive antenna _{. i} (k) is the s + 1 symbol value (-h _{s + 1,0, i} ) transmitted through the channel from the 0 th transmit antenna to the i th receive antenna, and the i th receive antenna is transmitted from the 1 th transmit antenna. The sum of the s + 1 th symbol value (h _{s + 1, 1, i} ) transmitted through the channel noise and the sum of the channel noise of each channel (n _{s + 1} (k)) is obtained.

29 shows a specific example of the received symbol of FIG. 28. FIG. 29 is an example of decoding data transmitted by multiple input / output encoding using STBC. For example, when data is transmitted by using two transmission antennas and data transmitted by two antennas is received through one antenna, the received symbol is obtained. Represents a formula that can be

When two transmitting antennas are used at the transmitting side and one antenna is used at the receiving side, the transmitting channel may be two. H ₀ and s ₀ in the equation represent the transmission channel response from the transmitting antenna 0 to the receiving antenna, and the symbols transmitted from the transmitting antenna 0, respectively, and h ₁ and s ₁ are received from the transmitting antenna 1 respectively. The transmission channel response to the antenna and the symbol transmitted by the first antenna at the transmitting side are shown. '*' Represents a complex conjugate, and s ₀ 'and s ₁ ' in the following formulas represent a restored symbol.

And r ₀ and r ₁ represent symbols received at the receiving antenna at t time and symbols received at the receiving antenna at t + T time after the transmission period T has elapsed, and n ₀ and n ₁ are each of the above symbols. It represents the channel noise of each transmission path plus the reception time.

As illustrated in the equation of FIG. 29, the signals r0 and r1 received by the reception antenna may be expressed as a value obtained by adding a distortion value of the signal transmitted by each transmission channel to each transmission channel. The recovered symbols s ₀ ′ and s ₁ ′ are calculated using the received signals r0 and r1 and the channel response values h0 _and h ₁ .

30 is a block diagram schematically showing another example of a signal transmission apparatus.

FIG. 31 shows an embodiment of a signal receiving apparatus for receiving a signal transmitted by the embodiment of the signal transmitting apparatus of FIG. 30 and 31 show an example applied to a system of a single input single output (SISO) method.

The embodiment of the signal transmission apparatus of FIG. 30 includes a forward error correction coder 2000, a first interleaver 2010, a symbol mapper 2020, a linear precoding unit 2030, and a second interleaver 2040. , Frame builder 2050, modulator 2060, and transmitter 2070. Each description may refer to the parts described with reference to FIGS. 1 and 20. That is, signal processing similar to the embodiment described with reference to FIGS. 1 and 20 is performed among the embodiments of FIG. 30. However, the signal transmission apparatus of FIG. 30 does not include a multiple input / output encoder and processes a signal according to a single input / output.

That is, symbol data that has undergone linear precoding and interleaving to be robust to frequency selective fading of a channel is input to a frame forming unit 2050, and the frame forming unit 2050 transmits the input symbol data to a pilot carrier as shown in FIG. It forms and outputs a data period not including and a pilot symbol period including a pilot carrier. In the case of the single input single output method, it is not necessary to distinguish transmission paths according to multiple inputs and outputs as shown in FIG.

31 illustrates an embodiment of a signal receiving apparatus, and includes a receiver 2100, a synchronizer 2110, a demodulator 2120, a frame parsing unit 2130, a first deinterleaver 2140, and a linear precoding decoder. 2150, a symbol demapper 2160, a second deinterleaver 2170, and a forward error correction decoding unit 2180. The embodiment of the signal receiving apparatus of FIG. 31 may refer to parts described with reference to FIGS. 20 and 27. However, the signal receiving apparatus of FIG. 31 processes a single input / output signal and thus does not include a multiple input / output decoder.

In the case of the signal receiving apparatus, the symbol processing parsed by the frame parsing unit 2130 is output to the first deinterleaver 2140 to perform the reverse process of processing to make the transmitting apparatus robust to frequency selective fading of the channel. can do.

32 is a view showing still another embodiment of a signal transmission apparatus. An embodiment of a signal transmission apparatus will now be described with reference to FIG. 32.

The embodiment of FIG. 32 includes a forward error correction coder (FEC) encoder 3100, a first interleaver 3110, a symbol mapper 3120, and a linear precoding unit 3130. ), A second interleaver 3140, a frame builder 3160, a modulator 3170, and a transmitter 3180.

The forward error correction encoder 3100 forward-corrects and encodes the input data. The forward error correction coder 3100 may have a structure in which an outer encoder and an inner encoder are concatenated. An embodiment of the forward error correction coder 3100 is illustrated in FIG. 2.

The forward error correction coder 3100 may perform forward error correction encoding on at least two code rates with respect to the input data. Hereinafter, a method in which the forward error correction coder 3100 encodes input data using at least two code levels is referred to as a hybrid coding method. The code rate refers to a ratio of data sizes having information about encoded data sizes. In addition, the input data may be divided according to sections, and error correction coding may be performed for each section with a low code rate and a high code rate. The forward error correction coder 3100 can obtain an SNR gain for data corresponding to a relatively low code rate by using a hybrid coding scheme, and a capacity gain (for data corresponding to a high code rate). capacity gain) can be obtained. For example, the forward error correction coder 3100 may assign two or more code levels (for example, 2/3 code rate and 1/2 code rate, etc.) for one forward error correction coding scheme (for example, LDPC). Accordingly, input data can be encoded.

The first interleaver 3110 mixes forward error corrected data to withstand burst errors occurring in the transmission data. An example of the first interleaver 3110 is illustrated in FIG. 3. However, the first interleaver 3110 may not be provided when the forward error correction coder 3100 encodes the input data by the hybrid coding scheme.

The symbol mapper 3120 may map data interleaved in the first interleaver 3110 into symbols. The symbol mapper 3120 maps symbols using a plurality of M-ary modulation schemes for subcarriers to be modulated. Hereinafter, mapping of symbols according to a plurality of modulation schemes by the symbol mapper 3120 is called a hybrid modulation scheme. For example, the hybrid modulation scheme may use at least two modulation schemes such as quadrature amplitude modulation (QAM), phase shift keying (PSK), amplitude phase shift keying (APSK), and pulse amplitude modulation (PAM). Hybrid modulation schemes use higher order modulation (higher order modulation or lower order modulation) (eg 256-QAM and 64-QAM) depending on the amount of information that can be assigned to a symbol, even if the modulation schemes are the same. And a method of converting bit data into symbols by mixing them.

A specific example of the symbol mapper 3120 is illustrated in FIG. 33. The data rate may vary according to the modulation scheme, and the signal to noise ratio (SNR) required for each modulation scheme may also vary. Therefore, when there is only one modulation scheme, reception performance such as SNR of a transmission / reception system may be determined according to the modulation scheme. As shown in the example of FIG. 32, when a symbol is mapped according to a hybrid modulation scheme, a flexible system capable of adjusting a transmission rate and an SNR can be created. Therefore, system parameters related to transmission / reception performance can be freely determined. For example, the symbol may be mapped according to the first modulation scheme in consideration of the minimum SNR required by the system. Further, two subcarriers other than the subcarriers for transmitting symbols according to the first modulation scheme may be transmitted with two symbols mapped according to the second modulation scheme. In this case, a gain for SNR can be additionally obtained even if forward error correction coding is not additionally performed. In the hybrid modulation scheme, SNR gain can be obtained by transmitting a symbol mapped to a small constellation, and a capacity gain can be obtained by transmitting a symbol mapped to a large constellation. capacity gain) can be obtained. Therefore, by adjusting the mixing ratio, it is possible to adjust the minimum SNR and the amount of capacity increase required.

In addition, for example, the number of subcarriers to which the symbols mapped to the 256-QAM scheme are allocated among the subcarriers included in one OFDM symbol is 75%, and the number of the subcarriers to which the symbols mapped to the 64-QAM scheme are allocated is 25%. In this case, when the ratio of symbols mapped to 64-QAM increases, the SNR gain increases and the transmission rate decreases.

The linear precoding unit 3130 may distribute each mapped symbol data into a plurality of output symbol data. Detailed examples of the linear precoding unit 3130 are illustrated in FIGS. 4 to 7.

The second interleaver 3140 interleaves the precoded symbol data in the frequency domain again. The second interleaver 3140 may use a convolution interleaver, a block interleaver, or the like.

The frame forming unit 3160 inserts a precoded signal into a predetermined position of the frame to form a frame defined by the transmission and reception system. The frame formed by the frame forming unit 3160 may include a data symbol section and a preamble section including a pilot symbol. The frame forming unit may arrange a distributed pilot carrier whose position is shifted in time in the data carrier section. The frame forming unit may arrange a continuous pilot carrier whose position is fixed in time in the data carrier section.

The modulator 3170 modulates data output from the frame forming unit 3160 in an orthogonal frequency division multiplex (OFDM) scheme, and inserts a guard interval between the modulated symbols.

The transmitter 3180 converts a digital signal including a guard period and a data period output from the modulator 3170 into an analog signal and transmits the analog signal. Hybrid coding scheme

In the example of FIG. 32, the hybrid coding scheme of the forward error correction coder 3100 and the hybrid modulation scheme of the symbol mapper 3120 may be simultaneously applied.

For example, if the forward error correction coder 3100 decodes the input data with a low code rate, and the symbol mapper 3120 maps the symbol with lower order modulation (a relatively small constellation). Means to map the input data to symbols for a figure), to maximize the SNR gain. On the other hand, if the forward error correction coder 3100 encodes the input data at a high code rate, and the symbol mapper 3120 maps the symbol with higher order modulation (relatively large size), To map the input data to symbols for constellations) to maximize the system's capacity gain. For example, when the transmission data are modulated according to 256 QAM and 64 QAM by hybrid modulation, 256 QAM becomes higher order modulation and 64 QAM becomes lower order modulation.

When the symbol mapper 3120 modulates the data input by the hybrid modulation method, the lower order modulation is related to the receiver because lower order modulation requires a relatively lower minimum SNR than higher order modulation. In lower order modulation (lower order modulation) to the symbol can be used as a pilot symbol, the capacity can be increased. Therefore, the frame forming unit 250 may not generate and arrange a separate pilot symbol. Alternatively, even when the frame forming unit 250 generates a pilot symbol, if the symbol sequence by lower order modulation is disposed at a part of the frame where the generated pilot symbol may be placed, transmission and reception are performed. The capacity of information transmitted and received by the system may increase. In this case, the operation of the receiver is illustrated in FIG. 34.

As described above, when data is encoded by the hybrid coding scheme encoded by the forward error correction coder 3100, the symbol mapper 3120 may mix the hybrid modulation scheme in which the symbols are mapped. In this case, when the frame forming unit 250 arranges the symbol string mapped by the symbol mapper 3120 at the position where the pilot symbol is to be placed, the transmission and reception capacity of the system may be further increased.

33 is a diagram illustrating an example of the symbol mapper of FIG. 32. An embodiment of a symbol mapper will be described with reference to FIG. 33. The symbol mapper 3120 includes a bit parser 3121, a mapping unit 3123 for performing symbol mapping corresponding to a plurality of M-ary schemes, and a symbol merger 3125.

The bit parser 3121 divides the input bit stream into a plurality of bit strings. In addition, the mapping unit 3123 may include a plurality of symbol mapping units for mapping symbols with respect to the divided plurality of bit strings in different ways. For example, the first symbol mapping unit may map symbols in a 256-QAM manner, and the second symbol mapping unit may map symbols in a 64-QAM manner. The mapping unit 3123 may further apply the symbol mapping method by using another symbol mapping method in addition to the symbol mapping illustrated for the divided bit strings.

The symbol merger 3125 may receive the mapped symbols from each of the plurality of symbol mapping units, merge the received symbols, and output one symbol string.

34 is a view showing another example of a signal receiving apparatus. An embodiment of a signal receiving apparatus will be described below with reference to FIG. 34. The example of the signal receiving apparatus of FIG. 34 may receive and process a signal transmitted by the embodiment of the signal transmitting apparatus described with reference to FIG. 32.

The embodiment of FIG. 34 includes a receiver 3300, a synchronizer 3310, a demodulator 3320, a frame parsing unit 3330, a first deinterleaver 3350, and a linear precoding decoder 3360. ), A symbol demapper 3370, a second deinterleaver 3380, and a forward error correction decoder 3390.

The receiver 3300 down-converts the frequency band of the received RF signal and converts the frequency band into a digital signal. The synchronizer 3310 obtains and outputs a synchronization between a frequency domain and a time domain of the received signal output from the receiver 3300.

The demodulator 3320 converts the data output from the synchronizer 3310 into the frequency domain to demodulate and remove the guard interval. To this end, the demodulator 3320 may obtain data values distributed in subcarriers.

The frame parser 3330 may output symbol data of a data symbol period excluding the pilot symbol according to the frame structure of the signal demodulated by the demodulator 3320. The frame parsing unit 3330 may include pilot symbols included in the frame, data symbols used as filer symbols, and general data even when data symbols modulated by lower order modulation according to a hybrid scheme are used as pilot symbols. You can parse symbols separately.

The first deinterleaver 3350 performs de-interleaving on the data string output by the frame parser 3330.

The linear precoding decoder 3360 may recover data distributed by the signal transmission apparatus. An embodiment of the linear precoding decoder 3360 is illustrated in FIGS. 21-22.

The symbol demapper 3370 may recover the symbol modulated in a hybrid manner into bit data. An example of the symbol demapper 3370 is illustrated in FIG. 35.

The second deinterleaver 3380 may perform de-interleaving on the data stream output from the symbol demapper 3370. The embodiment of the signal receiving apparatus may not include the second deinterleaver 3380 when data is transmitted in a hybrid modulation scheme and a hybrid coding scheme.

The forward error correction decoder 3390 may forward error correct and decode the data deinterleaved by the second deinterleaver 3380.

The forward error correction decoder 3390 may decode the data according to a hybrid coding scheme. For example, the forward error correction decoder 3390 may decode input data encoded at different code rates according to the data strings according to the corresponding code rates.

Before the symbol demapper 3370 performs symbol demapping, an embodiment of the apparatus for receiving a signal may include an equalizer (not shown) that performs channel equalization. When the equalizer includes a pilot symbol in a transmission frame, the equalizer may perform channel equalization on received data using the pilot symbol. Alternatively, the equalizer uses data symbols modulated according to lower order modulation when the pilot symbols are not included in the transmission frame, or when the data symbols are located in the pilot symbol position according to a hybrid modulation scheme. Channel equalization may be performed on the received data symbol using.

The equalizer may perform a decision on the decoded data by performing a decision on a symbol modulated by lower order modulation among data symbols according to a hybrid modulation scheme. When a symbol is transmitted in a hybrid modulation scheme, symbols that are modulated with lower order modulation have lower reliability than symbols that have been modulated with higher order modulation. Channel estimation may be performed on the symbols modulated by lower order modulation using decision-directed channel estimation (DDCE). The reliability used for the decision may be determined using a log-likehood ratio (LLR), an estimated channel SNR, and channel state information.

On the other hand, when the data to be transmitted is a hybrid modulation scheme and hybrid coding scheme, a symbol coded with a low code rate or a symbol modulated with a lower order modulation, or a low code rate and a lower order Symbols modulated by lower order modulation have relatively high SNR gains, and thus, a channel can be estimated with high reliability.

As an embodiment for improving channel estimation performance by the DDCE method, the equalizer may perform channel estimation on the entire symbol string by updating the channel estimate according to an interpolation method for a symbol string having high reliability. When the pilot symbol is present in the transmission frame, the equalizer may initialize the channel estimate for the periodically received pilot symbol string and update the channel estimate for the entire symbol string using only the channel estimated from the highly reliable data symbol string. In this case, the equalizer may use the pilot symbol when the pilot symbol is located in the pilot symbol period as shown in FIG.

35 is a diagram illustrating an example of a symbol demapper of FIG. 34. Referring to FIG. 35, the symbol demapper 3370 may include a symbol parser 3371, a demapping unit 3373, and a bit merger 3375. The symbol parser 3371 may divide and output a symbol data string input to the symbol demapper 3370. The symbol parser 3371 may parse symbols mapped according to the same modulation scheme among symbol data sequences mapped to the plurality of modulation schemes, respectively. The process of dividing the symbol data string by the symbol parser 3371 may follow an inverse process of the process of merging the symbols by the symbol merger 3125 of FIG. 33. The demapping unit 3373 may demap the symbols mapped to the plurality of modulation schemes according to the hybrid modulation schemes according to the corresponding modulation schemes. The demapping unit 3373 may include a symbol demapping unit for demapping each of the separated symbol data strings according to a modulation scheme of the data strings. For example, the demapping unit 3373 includes a first symbol demapping unit for demapping a symbol modulated with 256-QAM to bit data, and a second symbol demapping for demapping a symbol modulated with 64-QAM to bit data. It may include a unit. The bit merger 3375 may output the demapped bit data from the demapping unit 3373 as one bit data string.

FIG. 36 is a diagram illustrating an experiment result on reception performance when receiving a signal transmitted according to the examples of FIGS. 32 and 34. FIG. 36 shows reception performance of a signal transmitted using a 256-QAM single modulation scheme and a 256-QAM / 64-QAM hybrid modulation scheme when the LDPC scheme is included as a forward error correction coding scheme. In the 256-QAM / 64-QAM hybrid modulation scheme, if the modulation rate according to 64-QAM within one OFDM symbol increases, the transmission rate may drop, but the SNR gain increases. 36 shows that even if each symbol modulation scheme is different, an SNR gain of at least 0.5 dB can be obtained according to each code rate of the LDPC. Therefore, by adjusting the symbol modulation scheme and the code rate in a hybrid manner, it is possible to adjust the data transmission rate and the SNR gain in more detail, and increase the flexibility of the system.

37 is a flowchart illustrating a signal transmission method according to an embodiment of the present invention.

Forward error correction encoding is performed on the input data to detect and correct a transmission error of the transmission data (S2200). BCH encoding may be used as an outer encoder for preventing an error floor, and LDPC encoding may be performed after performing BCH encoding for forward error correction encoding. As another example, a constant forward error correction coding scheme such as LDPC may be used, and input data may be encoded and output according to a plurality of coding levels. That is, according to the hybrid scheme, the forward error correction deteriorated data may be output.

Interleaving is performed on the coded data so as to be robust to burst errors in the transmission channel, and the interleaved data is mapped into symbols according to a hybrid scheme (S2202). For symbol mapping, a plurality of symbol mapping methods such as QAM and QPSK may be used. The method of mapping symbols according to the hybrid scheme may follow the example described with reference to FIG. 33.

Precoding is performed so that the mapped symbol data according to the plurality of symbol mapping schemes are distributed in the frequency domain (S2204), and the interleaved precoded symbol data is output (S2206).

The interleaved symbol data is multi-input / output encoded so as to be transmitted through a plurality of antennas (S2208). The number of possible data transmission paths may be determined according to the number of antennas. In the case of the spatial diversity method, data of the same information is transmitted in each path, and in the case of the spatial multiplexing method, different data is transmitted in each path.

The encoded data is converted into a transmission frame according to the number of multiple input / output transmission paths, and modulated and then transmitted (S2210). The transmission frame includes a pilot carrier symbol interval and a data symbol interval, and the pilot carrier symbol interval may have information for identifying a transmission path. For example, when transmitting signals through two antennas, even and odd pilot carriers among the generated pilot carriers may be transmitted to different antennas, respectively. Alternatively, when a signal is transmitted through two antennas, a diversity effect can be obtained by transmitting a sum of pilot carriers at an even symbol position and a difference of pilot carriers at an odd symbol position. However, when applied to a signal transmission / reception system of a single input single output method instead of a multiple input / output method, the multiple input / output encoding step of step S2208 may not be performed and may transmit a modulated signal to one antenna.

38 is a flowchart illustrating an embodiment of a signal receiving method.

The received signal is synchronized according to each transmission path, and the synchronized signal is demodulated (S2300).

The demodulated data frame is parsed, and one symbol data string is obtained by decoding the multiple input signals according to the multiple input / output decoding scheme (S2302).

The interleaved symbol data is deinterleaved in the inverse of the interleaved scheme so as to be robust to the frequency selective fading of the channel (S2304). The data sequence of which the order is restored by the deinterleaving is decoded in the inverse of the precoded scheme, thereby restoring original symbol data dispersed in a plurality of symbol data in the frequency domain (S2306).

The decompressed symbol data is de-mapping according to a plurality of symbol mapping methods to restore the bit data, and the deinterleaved bit data is restored to the original order (S2308). A method of demapping symbols according to the hybrid scheme may follow the example of FIG. 35. It is possible to demap a symbol after channel estimation and compensation before demapping the symbol in a hybrid manner. The channel estimation uses pilot symbols, data symbols modulated by lower order modulation when pilot symbols are not included in a transmission frame, or data symbols are positioned in a pilot symbol position according to a hybrid modulation scheme. In this case, channel estimation may be performed using the data symbols. For example, the channel estimation method may be performed on the illustrated symbol based on the decision-directed channel estimation (DDCE) method. Since the symbol illustrated above has high reliability in channel compensation, the channel estimate may be updated using an interpolation method for the illustrated symbol.

The transmission error is corrected by performing forward error correction decoding on the restored data (S2310). For example, LDPC decoding may be used for forward error correction decoding, and BCH decoding may be used after LDPC decoding as an outer decoder for preventing an error floor. As another example, when coded with a different code rate according to an input data section according to a hybrid coding scheme, data may be decoded according to the code rate of the data section.

On the other hand, before S2308, when the transmission symbol string is symbol-mapped with the hybrid modulation scheme or coded according to the hybrid coding scheme and then mapped with the hybrid modulation scheme, the channel is used only by using the SNR gain high symbol string according to the modulation scheme or the coding scheme. It can be estimated. Channel compensation may be performed on the entire symbol string for the estimated channel.

However, when a signal is received by a single input single output method instead of a multiple input / output method, the multiple input / output decoding step of step S2302 is not performed, and the signal received through one transmission path may be processed.

The signal transmission / reception method and signal transmission / reception apparatus exemplified may be applied to all signal transmission / reception systems such as broadcasting or communication.

1 is a block diagram schematically showing an apparatus for transmitting a signal as an embodiment according to the present invention;

2 is a block diagram schematically illustrating a forward error correction coder according to an embodiment of the present invention.

3 illustrates an interleaver for interleaving input data according to an embodiment of the present invention.

4 is a block diagram schematically showing a linear precoding unit according to an embodiment of the present invention.

5 to 7 illustrate a matrix of codes for distributing input data according to an embodiment of the present invention.

8 is a diagram illustrating a structure of a transmission frame according to an embodiment of the present invention.

9 is a block diagram schematically illustrating a case in which a signal transmission apparatus has a plurality of transmission paths according to an embodiment of the present invention.

10 to 14 illustrate an example of a 2x2 code matrix for distributing input symbols according to an embodiment of the present invention.

15 is a diagram illustrating an example of an interleaver according to an embodiment of the present invention.

16 is a view illustrating a specific example of the interleaver of FIG. 15 according to an embodiment of the present invention.

17 illustrates an example of a multiple input / output encoding scheme according to an embodiment of the present invention.

18 illustrates a structure of a pilot symbol interval according to an embodiment of the present invention.

19 illustrates another structure of a pilot symbol period according to an embodiment of the present invention.

20 is a block diagram schematically illustrating an apparatus for receiving a signal according to an embodiment of the present invention.

21 is a block diagram schematically illustrating an example of a linear precoding decoder according to an embodiment of the present invention.

22 is a block diagram schematically illustrating another example of a linear precoding decoder according to an embodiment of the present invention.

23 to 25 illustrate an example of a 2 × 2 code matrix for reconstructing distributed symbols according to an embodiment of the present invention.

26 is a block diagram schematically illustrating a forward error correction decoding unit as an embodiment of the present invention.

27 is a block diagram schematically illustrating a case in which a signal receiving apparatus has a plurality of receiving paths according to an embodiment of the present invention.

28 is a diagram illustrating an example of a multiple input / output decoding scheme according to an embodiment of the present invention.

29 is a view illustrating a specific example of FIG. 28 as an embodiment according to the present invention.

30 is a block diagram schematically showing another example of a signal transmission apparatus according to an embodiment of the present invention.

31 is a block diagram schematically showing another example of a signal receiving apparatus according to an embodiment of the present invention.

32 shows another example of a signal transmission device

33 is a diagram illustrating an example of a symbol mapper of FIG. 32.

34 is a view showing another example of a signal receiving device

35 is a diagram illustrating an example of a symbol demapper of FIG. 34.

FIG. 36 is a diagram illustrating an experiment result on reception performance when receiving a transmitted signal according to the examples of FIGS. 32 and 34.

37 is a flowchart illustrating a signal transmission method according to an embodiment of the present invention.

38 is a flowchart illustrating a method of receiving a signal according to an embodiment of the present invention.

Claims (15)

A forward error correction encoding unit outputting input data by performing forward error correction encoding according to a plurality of code levels; A symbol mapper for converting the output data into symbols according to a plurality of symbol mapping methods; A frame forming unit inserting a pilot symbol into a frame including the data symbol; And a transmitter for transmitting a signal according to the frame in which the pilot symbol is inserted. The method of claim 1, The forward error correction encoder, A signal transmission apparatus for error correcting encoding input data with a high code rate forward error correction code and a low code rate forward error correction code, respectively. The method of claim 1, The symbol mapper includes: a bit parser that divides the interleaved data into a plurality of bitstreams; A plurality of mapping units for mapping the divided plurality of bitstreams into symbols according to a plurality of symbol mapping methods; And And a symbol merger configured to output a plurality of types of symbols mapped by the mapping units as one symbol string. The method of claim 1, The frame forming unit, if the pilot carrier is included in the frame, the signal transmitting apparatus for placing a low rate symbol in the pilot carrier interval of the plurality of mapping methods mapped by the symbol mapper. The method of claim 1, And an interleaver for mixing data encoded by the forward error correction encoding unit and outputting the mixed data to the symbol mapper. Receiving unit for receiving a signal; A synchronization unit for obtaining synchronization of the received signal; A demodulation unit for demodulating the obtained signal; A frame parser for parsing the demodulated signal frame; A symbol demapper configured to demap and output the symbols included in the frame into bit data according to a plurality of symbol mapping methods; And And a forward error correction decoding unit configured to forward error correcting decoding the output data according to a plurality of code levels. The method of claim 6, The forward error correction decoding unit, A signal receiving apparatus for forward error correcting decoding input data using a high code rate forward error correction code and a low code rate forward error correction code, respectively. The method of claim 6, And a coding scheme used for the forward error correction decoding is a low density parity check (LDPC). The method of claim 6, The symbol demapper may include: a symbol parser for dividing an input symbol into a plurality of symbol strings; A demapping unit configured to demap the symbol strings parsed by the symbol parser into bit data strings according to the plurality of symbol mapping methods; And And a bit merger configured to sum and output the bit data string output by the demapping unit into one bit string. The method of claim 6, The signal receiving device And an equalizer for estimating and compensating for a channel by using symbols modulated by lower order modulation among the plurality of symbol mapping schemes as pilot carriers. In accordance with claim 10, The channel estimation method is a decision-directed channel estimation (DDCE) method. The method of claim 10, And the equalizer performs channel estimation by interpolating the sequence of symbols modulated by the lower order modulation, and performs channel compensation on the symbols of the frame with the estimated channel. The method of claim 6, The signal receiving apparatus further includes a deinterleaver for deinterleaving the bit data de-mapped by the symbol demapper and outputting the deinterleaved to the forward error correction decoding unit. A forward error correction encoding step of outputting input data by performing forward error correction encoding according to a plurality of code levels; A symbol mapping step of converting the output data into symbols according to a plurality of symbol mapping methods; A frame forming step of inserting a pilot symbol into a frame including the data symbol; And transmitting a signal according to the frame in which the pilot symbol is inserted. Receiving a signal; Acquiring synchronization of the received signal; Demodulating the obtained signal; Parsing the demodulated signal frame; Demapping and outputting the symbols included in the frame into bit data according to a plurality of symbol mapping methods; And And forward error correcting decoding the output data according to a plurality of code levels.

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