KR20080088737A - A liquid crystal display device - Google Patents

Abstract

An LCD(Liquid Crystal Display) is provided to form two or more pixel cells, for expressing the same color, in one unit pixel and supply a data signal of gray scales of different sizes to each pixel cell, thereby expressing detail gray scales. Plural gate lines are arranged in one direction. Plural data lines are arranged to cross the gate lines. Plural pixel cells are arranged in a pixel area between data lines. Plural pixel cells having different three colors are arranged in one pixel area. At least two pixel cells of pixel cells included within one unit pixel for displaying one unit image display the same color.

Description

Liquid crystal display device

1 is a view showing a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a detailed view of any one pixel cell of FIG. 1.

3 is a view illustrating some pixel cells of FIG. 1;

4 is a timing diagram of a data signal and a scan pulse supplied to each pixel cell of FIG. 3.

5 is a view showing a liquid crystal display device according to a second embodiment of the present invention.

FIG. 6 is a detailed view of any one pixel cell of FIG. 5.

* Explanation of symbols on the main parts of the drawings

GL: Gate Line DL: Data Line

PXL: pixel cell PE: pixel electrode

TFT: Thin Film Transistor PD: Pixel Area

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof capable of preventing a deterioration in image quality due to a charging failure.

The liquid crystal display device displays an image by adjusting light transmittance of liquid crystal cells according to a video signal. In an active matrix type liquid crystal display, a switching element TFT is formed in each pixel cell, which is advantageous for displaying a moving image. As a switching device (TFT), a thin film transistor (Thin Film Transistor) is mainly used.

The conventional liquid crystal display device has a problem in that it is difficult to express fine gray scales because one unit pixel includes three color pixel cells.

The present invention has been made to solve the above problems, and by forming two or more pixel cells representing the same color in one unit pixel, and supplying data signals of different gray scales to each pixel cell, An object of the present invention is to provide a liquid crystal display device capable of expressing gray scales.

According to an aspect of the present invention, a liquid crystal display device includes: a plurality of gate lines arranged in one direction; A plurality of data lines arranged to intersect the gate lines; A plurality of pixel cells arranged in a pixel region between each data line; A plurality of pixel cells of three different colors are arranged in one pixel area; At least two of the pixel cells included in one unit pixel for displaying one unit image display the same color.

Hereinafter, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First Example

1 is a view showing a liquid crystal display device according to a first embodiment of the present invention, Figure 2 is a detailed view of any one pixel cell provided in FIG.

In the liquid crystal display according to the first exemplary embodiment of the present invention, as shown in FIG. 1, the plurality of gate lines GL0 to GLn arranged in one direction intersect the gate lines GL0 to GLn. The plurality of data lines DL1 to DLm arranged, the plurality of pixel cells PXL arranged in the pixel areas PD1 to PDm-1 between the data lines DL1 to DLm, and the gate line. Gate drivers (not shown) for driving the fields GL0 to GLn, and data drivers (not shown) for driving the data lines DL1 to DLm.

Each pixel cell PXL includes a thin film transistor TFT that switches a data signal from the data line in accordance with a gate signal from the gate line, and a thin film transistor TFT from the thin film transistor TFT. The pixel electrode PE receives a data signal and displays an image.

The pixel cells PXL include a red pixel cell PXL for representing a red image, a green pixel cell PXL for representing a green image, and blue pixel cells PXL for representing blue. Separated by.

Here, at least two or more pixel cells PXL are arranged in one pixel area. For example, a plurality of red pixel cells PXL, a plurality of green pixel cells PXL, and a plurality of blue pixel cells PXL are positioned in the first pixel area PD1.

In addition, two pixel cells PXL adjacent to each other among the pixel cells PXL positioned in one pixel area may express the same color. For example, the pixel cells PXL positioned in the first pixel region PD1 and connected to the first gate line GL1 and the first data line DL1 through the thin film transistor TFT, The pixel cells PXL positioned in the first pixel region PD1 and connected to the second gate line GL2 and the first data line DL1 through the thin film transistor TFT represent the same green image. do.

In addition, the arrangement order of the color of the pixel cells PXL between adjacent pixel areas is different. For example, the arrangement order of the color pixels PXL positioned in the first pixel region PD1 and the pixel cells PXL positioned in the second pixel region PD2 adjacent to the first pixel region PD1. The arrangement order by color is different. The pixel cells PXL positioned in the first pixel area PD1 may have a green pixel cell PXL, a green pixel cell PXL, a blue pixel cell PXL, a blue pixel cell PXL, and a red color from an upper side of the data line. The pixel cells PXL are arranged in the order of the pixel cells PXL, and the red pixel cells PXL, and the pixel cells PXL positioned in the second pixel area PD2 are red pixel cells PXL and red from the upper side of the data line. The pixel cells PXL, the green pixel cells PXL, the green pixel cells PXL, the blue pixel cells PXL, and the blue pixel cells PXL are arranged in this order.

In addition, the colors of the pixel cells PXL in adjacent pixel areas facing each other are different from each other. For example, the pixel cells PXL positioned in the first pixel region PD1 and connected to the second gate line GL2 and the first data line DL1 through the thin film transistor TFT are green. An image is displayed, and the pixel cell PXL positioned in the second pixel area and connected to the second gate line GL2 and the second data line DL2 through the thin film transistor TFT is a red image. Is displayed. That is, two pixel cells PXL directly facing each other display images of different colors.

In addition, heights of pixel cells PXL positioned in different pixel regions and positioned at the outermost sides are different from each other. For example, the pixel cell PXL located on the uppermost side in the first pixel region PD1 is located higher than the pixel cell PXL located on the uppermost side in the second pixel region PD2. The pixel cell PXL located at the bottom of the second pixel area PD2 is located lower than the pixel cell PXL located at the bottom of the first pixel area PD1.

In other words, the number of pixel cells PXL included in each of the pixel areas PD1 to PDm-1 is the same, but the pixel cells PXL of the first pixel area PD1 are formed from the dummy gate line GL0. The pixel cells PXL of the second pixel region PD2 are arranged between the first gate line GL1 and the nth gate line.

The dummy gate line GL0 is used as an electrode for forming a storage capacitor in an uppermost pixel cell PXL in an odd pixel area. That is, the pixel electrode PE of each pixel cell PXL overlaps a predetermined portion of the front gate line for driving the front pixel cell PXL. A storage capacitor is formed in the overlapping portion. The storage capacitor uses the pixel electrode PE as a first electrode, the gate line as a second electrode, and an insulating film (not shown) disposed between the pixel electrode PE and the gate line as a dielectric. use.

In addition, some of the pixel cells PXL of the pixel cells PXL positioned in adjacent pixel areas are commonly connected to data lines positioned at boundary portions of the two pixel areas. For example, odd-numbered pixel cells PXL of the pixel cells PXL of the first pixel region PD1 and odd-numbered pixel cells of the pixel cells PXL of the second pixel region PD2. PXL is commonly connected to a data line located at a boundary between the first pixel region PD1 and the second pixel region PD2. More specifically, the odd-numbered pixel cell PXL located in the uppermost part of the first pixel area PD1 and the odd-numbered pixel cell PXL located in the uppermost part of the second pixel area PD2 are both formed of a first one. 2 is connected to the data line DL2.

Each pixel cell PXL and the pixel electrode PE have a trapezoidal shape and an inverted trapezoidal shape. Specifically, the pixel cell PXL positioned in the odd pixel area and connected to the odd gate line through the thin film transistor TFT and the pixel electrode PE of the pixel cell PXL have a trapezoidal shape. The pixel cell PXL located in the odd pixel area and connected to the even-numbered gate line through the thin film transistor TFT and the pixel electrode PE of the pixel cell PXL form an inverted trapezoidal shape.

On the other hand, the pixel cell PXL located in the even pixel area and connected to the odd gate line through the thin film transistor TFT and the pixel electrode PE of the pixel cell PXL have an inverted trapezoidal shape. In addition, the pixel cell PXL located in the even-numbered pixel region and connected to the even-numbered gate line through the thin film transistor TFT and the pixel electrode PE of the pixel cell PXL form a trapezoidal shape.

Accordingly, two pixel cells PXL and two pixel electrodes positioned in the same pixel region, adjacent to each other, and displaying the same color, form a hexagonal shape.

The data lines DL1 to DLm have a zigzag shape due to the shape of the pixel cell PXL and the pixel electrode PE.

In the present invention, one unit pixel includes two red pixel cells PXL adjacent to each other, two green pixel cells PXL adjacent to each other, and two blue pixel cells PXL adjacent to each other. That is, one unit pixel includes a total of six pixel cells PXL.

In the present invention, a data signal of the same gray level may be supplied to the pixel cells PXL of the same color, or data of different gray levels may be supplied.

When data signals of different gradations are supplied to the pixel cells PXL of the same color, a liquid crystal display having such a structure can express even finer gradations than in the related art.

The following method may be applied to supply data signals of different gradations to the pixel cells PXL of the same color. For convenience of description, the pixel cells PXL of the same color will be referred to as a first pixel cell PXL and a second pixel cell PXL, respectively.

 The data driver receives a data signal corresponding to the first pixel cell PXL from a timing controller and copies the data signal. Then, by adding or subtracting a predetermined weight to the copied data signal, a data signal having a larger gray level is generated than the original data signal, or a data signal having a smaller gray level is generated. The data driver supplies the generated data signal to the second pixel cell PXL.

In the present invention, two pixel cells PXL having the same color may have the same area as one conventional pixel cell PXL, or may have a larger area than the conventional pixel cells PXL.

The driving method of the liquid crystal display according to the exemplary embodiment of the present invention configured as described above will be described in detail.

3 is a diagram illustrating some pixel cells PXL in FIG. 1, and FIG. 4 is a diagram illustrating a timing diagram of a data signal and a scan pulse supplied to each pixel cell PXL of FIG. 3.

The first scan pulse Vout1 output in the first period T1 is supplied to the first gate line GL1. Accordingly, the TFTs of the pixel cells G11A, G12A, G13A, and G14A connected to the first gate line GL1 are turned on, so that the pixel cells G11A, G12A, G13A, and G14A are turned on. The data signal is supplied to the pixel electrode PE.

Here, a constant voltage corresponding to a low voltage of a scan pulse is applied to the dummy gate line GL0, and the storage capacitors of the pixel cells G11A, G12A, G13A, and G14A are charged by the constant voltage.

Thereafter, the second scan pulse Vout2 output in the second period T2 is supplied to the second gate line GL2. Therefore, the thin film transistor TFT of the pixel cells G11B, R11A, G12B, R12A, G13B, R13A, G14B, and R14A connected to the second gate line GL2 is turned on, and thus the pixel cells ( The data signal is supplied to the pixel electrodes PE of G11B, R11A, G12B, R12A, G13B, R13A, G14B, and R14A.

Here, the storage capacitors of the pixel cells G11B, R11A, G12B, R12A, G13B, R13A, G14B, and R14A connected to the second gate line GL2 are supplied to the first gate line GL1. It is charged by the low voltage of the scan pulse Vout1.

Next, the third scan pulse Vout3 output in the third period T3 is supplied to the third gate line GL3. Therefore, the thin film transistor TFT of the pixel cells B11A, R11B, B12A, R12B, B13A, R13B, B14A, and R14B connected to the third gate line GL3 is turned on, thereby the pixel cell PXL. The data signal is supplied to the pixel electrode PE.

Here, the storage capacitors of the pixel cells PXL connected to the third gate line GL3 are charged by the low voltage of the second scan pulse Vout2 supplied to the second gate line GL2.

In this manner, the pixel cells PXL connected to the fourth to nth gate lines are sequentially supplied with data signals to display images.

2nd Example

FIG. 5 is a diagram illustrating a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 6 is a detailed view of an arbitrary pixel cell PXL of FIG. 5.

As shown in FIG. 5, the liquid crystal display according to the second exemplary embodiment of the present invention includes a plurality of horizontal auxiliary lines HAL_u and HAL_d arranged in one direction, and the horizontal auxiliary lines HAL_u and HAL_d. It includes a plurality of vertical auxiliary lines VAL arranged to intersect.

The horizontal auxiliary lines HAL_u and HAL_d are upper horizontal auxiliary lines HAL_u positioned above each gate line GL0 to GLn, and lower horizontal auxiliary lines positioned below the gate lines GL0 to GLn. Are divided into (HAL_d).

The horizontal auxiliary line is provided for each pixel area PD1 to PDm-1. The horizontal auxiliary line positioned in one pixel area overlaps the center of the pixel electrode PE in the pixel cells PXL located in the pixel area.

The vertical auxiliary line VAL may be formed of the same material as the data line or may be formed of the same material as the gate line.

The vertical auxiliary line VAL is formed of the same material as the gate line. The vertical auxiliary line VAL corresponding to the intersection between the vertical auxiliary line VAL and the gate lines GL0 to GLn is disconnected; The disconnected portion is electrically connected by a connecting portion; The connection part is made of the same material as the pixel electrode PE.

The upper horizontal auxiliary line HAL_u may be formed of the same material as the gate line or the same material as the data line. When the upper horizontal auxiliary line HAL_u is formed of the same material as the data line, a distance between the upper horizontal auxiliary line HAL_u and the data line should be increased so as not to be short with the data line.

The lower horizontal auxiliary line HAL_d may be formed of the same material as the gate line or the same material as the data line.

When the lower horizontal auxiliary line HAL_d is formed of the same material as the data line, the lower horizontal auxiliary line HAL_d corresponding to the intersection between the lower horizontal auxiliary line HAL_d and the data lines DL1 to DLm HAL_d) part is disconnected; The disconnected portion is electrically connected by a connecting portion; The connection part is made of the same material as the pixel electrode PE of the pixel cell PXL.

In addition, the horizontal auxiliary lines and the vertical auxiliary lines VAL may be formed of the same material as the data line. In this case, the horizontal auxiliary line intersects the data line. At this intersection, the horizontal auxiliary line is disconnected, and the disconnected parts may be connected to each other through a connection part. The connection part may be formed of the same material as the pixel electrode PE. That is, contact holes may be formed to expose each disconnected portion, and the disconnected portions may be electrically connected to each other through the connection portion.

The upper horizontal auxiliary lines HAL_u and the lower horizontal auxiliary lines HAL_d are also arranged to overlap the pixel electrode PE. In this case, the upper horizontal auxiliary line HAL_u is not formed in the section where the thin film transistor TFT is located.

Such vertical auxiliary lines VAL and horizontal auxiliary lines are electrically connected to each other at an intersection. In other words, the vertical auxiliary lines VAL and the horizontal auxiliary lines are integrally formed.

As described above, according to the second exemplary embodiment of the present invention, the storage capacitor is formed at the portion where the auxiliary line and the pixel electrode PE overlap. Therefore, in the second embodiment of the present invention, a storage capacitor having a larger capacity than the conventional one is formed.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

The liquid crystal display according to the present invention as described above has the following effects.

In the liquid crystal display according to the exemplary embodiment of the present invention, six pixel cells are included in one unit pixel, and two pixel cells display images having the same color. According to the present invention, by supplying data signals of different gradations to two pixel cells representing the same color, even finer gradations can be expressed.

In addition, in the present invention, by forming the auxiliary line, the capacity of the storage capacitor can be increased. This compensates for the reduction in aperture caused by the addition of auxiliary lines.

Claims (18)

A plurality of gate lines arranged in one direction; A plurality of data lines arranged to intersect the gate lines; A plurality of pixel cells arranged in a pixel region between each data line; A plurality of pixel cells of three different colors are arranged in one pixel area; And at least two pixel cells among the pixel cells included in one unit pixel for displaying one unit image display the same color. The method of claim 1, Two pixel cells adjacent to each other among the pixel cells positioned in one pixel area represent the same color; An arrangement order of colors of pixel cells positioned in a first pixel region and an arrangement order of colors of pixel cells located in a second pixel region adjacent to the first pixel region; The colors of the pixel cells of the first and second pixel areas directly facing each other are different from each other; A pixel cell located at an uppermost side in the first pixel area is located above the pixel cell located at an uppermost side in the second pixel area; And, And the lowermost pixel cell in the second pixel region is located lower than the lowermost pixel cell in the first pixel region. The method of claim 1, Each pixel cell includes a thin film transistor for switching a data signal from the data line according to a gate signal from the gate line, and a pixel electrode for receiving an image signal from the thin film transistor and displaying an image; And the pixel cells and the pixel electrodes are hexagonal. The method of claim 1, Radix pixel cells of the pixel cells of the first pixel area and radix pixel cells of the pixel cells of the second pixel area are common to the data line positioned at the boundary between the first pixel area and the second pixel area. Liquid crystal display characterized in that connected to. The method of claim 1, The gate lines may include a first gate line located at an uppermost side of the gate lines, a second gate line located directly below the first gate line, a third gate line located at a lowermost side of the gate lines; And a fourth gate line located directly above the third gate line; Pixel cells of a first pixel region are arranged between the first gate line and the fourth gate line; And the pixel cells of the second pixel region are arranged between the second gate line and the third gate line. The method of claim 5, wherein And a pixel electrode in the uppermost pixel cell of the pixel cells of the first pixel region overlaps the first gate line. The method of claim 1, and a pixel electrode of the pixel cell connected to the n-th gate line overlaps the n-th gate line. The method of claim 1, A data driver for supplying a data signal to the data lines; And the data driver is configured to supply data signals of different gradations to pixel cells included in the unit pixel and displaying the same color. The method of claim 1, A vertical auxiliary line formed in the pixel area; And the vertical auxiliary line overlaps the gate lines and the pixel electrodes included in the pixel cells of the pixel area. The method of claim 9, And the vertical auxiliary line is formed of the same material as the data line. The method of claim 9, The vertical auxiliary line is formed of the same material as the gate line; The vertical auxiliary line portion corresponding to the intersection between the vertical auxiliary line and the gate lines is disconnected; The disconnected portion is electrically connected by a connecting portion; And the connection part is made of the same material as the pixel electrode of the pixel cell. The method of claim 1, An upper horizontal auxiliary line located above the gate line; And the upper horizontal auxiliary line overlaps pixel electrodes of pixel cells positioned in each of data lines and pixel areas arranged along the gate line. The method of claim 12, And the upper horizontal auxiliary line is formed of the same material as the gate line. The method of claim 12, The upper horizontal auxiliary line is formed of the same material as the data line; The upper horizontal auxiliary line portion corresponding to the portion where the thin film transistor is formed in the pixel cell is disconnected; The upper horizontal auxiliary line portion corresponding to the intersection between the upper horizontal auxiliary line and the data lines is disconnected; A portion disconnected at the intersection is electrically connected by a connecting portion; And the connection part is made of the same material as the pixel electrode of the pixel cell. The method of claim 1, A lower horizontal auxiliary line located below the gate line; The lower horizontal auxiliary line overlaps the pixel electrodes of the pixel cells positioned in each of the data lines and the pixel regions arranged along the gate line. The method of claim 15, And the lower horizontal auxiliary line is formed of the same material as the gate line. The method of claim 15, The lower horizontal auxiliary line is formed of the same material as the data line; The lower horizontal auxiliary line portion corresponding to the intersection between the lower horizontal auxiliary line and the data lines is disconnected; The disconnected portion is electrically connected by a connecting portion; And the connection part is made of the same material as the pixel electrode of the pixel cell. The method of claim 1, Further comprising a vertical auxiliary line, an upper horizontal auxiliary line, and a lower horizontal auxiliary line; A vertical auxiliary line is positioned in the pixel region, and overlaps the gate lines and the pixel electrode of the pixel cell in the pixel region; The upper horizontal auxiliary line is positioned above the gate line to overlap the pixel electrodes of the pixel cells positioned in each of the data lines and the pixel regions arranged along the gate line;  A lower horizontal auxiliary line is positioned below the gate line to overlap the pixel electrodes of the pixel cells positioned in each of the data lines and the pixel regions arranged along the gate line; The vertical auxiliary line, the upper horizontal auxiliary line, and the lower horizontal auxiliary line are all formed of the same material; And a portion where the vertical auxiliary line, the upper horizontal auxiliary line, and the lower horizontal auxiliary line cross each other.

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