KR20080051296A - Thin film transistor substrate and method of manufacturing the same, and liquid crystal panel having the same - Google Patents

Abstract

A thin film transistor substrate and a method of manufacturing the same, and liquid crystal panel having the same are provided to prevent error by minimizing reaction of an alignment film and impurity. A thin film transistor substrate(100) includes a gate line, a data line, a pixel electrode(151) and an alignment film(171). The gate line is formed by extending in the one direction on the substrate, and the data line is formed by extending to cross with the gate line. The pixel electrode is formed on a pixel area defined by the gate line and the data line. The alignment film is formed on the pixel electrode and is formed by patterning with the pixel electrode in the same time. The thin film transistor substrate further includes a gate electrode, a source electrode, and a drain electrode. The drain electrode overlaps to a portion of the gate electrode.

Description

Thin film transistor substrate and method of manufacturing the same and a liquid crystal panel having the same

1 is a plan view of a liquid crystal display panel according to the present invention.

2 is a cross-sectional view taken along the line II ′ of FIG. 1;

3 is a cross-sectional view taken along the line II-II ′ of FIG. 1.

4 (a) to 4 (d) are cross-sectional views of devices sequentially shown in order to explain a method of manufacturing a thin film transistor substrate taken along the line II ′ of FIG. 1.

5 (a) to 5 (d) are cross-sectional views of devices sequentially shown in order to explain a method for manufacturing a thin film transistor substrate taken along the line II-II 'of FIG.

<Explanation of symbols for the main parts of the drawings>

100 thin film transistor substrate 200 color filter substrate

300: liquid crystal display panel 121: gate line

141: data line 151: pixel electrode

171: first alignment layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display (LCD), and more particularly, to a thin film transistor substrate having an alignment layer formed only on a pixel electrode in a thin film transistor substrate, a manufacturing method thereof, and a liquid crystal display panel having the same.

BACKGROUND ART A liquid crystal display generally includes a thin film transistor substrate on which a pixel electrode is formed, a color filter substrate on which a common electrode is formed, and a liquid crystal layer formed therebetween to display an image, and a backlight unit for irradiating light thereto. It is configured to include. When a voltage is applied to the pixel electrode and the common electrode of the liquid crystal display, an electric field is generated in the liquid crystal layer due to the potential difference between the two electrodes, and the arrangement of the liquid crystal molecules changes according to the intensity of the electric field. The change in the arrangement of the liquid crystal molecules changes the polarization of light passing through the liquid crystal layer, which is represented by a change in the transmittance of light by the polarizer provided on the outer surface of the substrate. Therefore, the transmittance of light passing through the liquid crystal display may be controlled by changing the electric field intensity by adjusting the potential difference between the two electrodes.

However, in order for the liquid crystal display to obtain uniform brightness and high contrast ratio, the liquid crystal molecules in the liquid crystal display panel should be arranged in a certain direction. In order to arrange the liquid crystal molecules in a predetermined direction, an organic polymer material such as polyimide is coated on the substrate to form an alignment layer.

In general, an alignment layer forming process uses a flexography method in which a polyimide solution transferred to an APR plate (Asahikasei Photosensitive Resin plate) is applied onto a glass substrate on which a pixel electrode is patterned. On the surface of the APR plate, protrusions in the form of circular or triangular pyramids are formed for uniform application of polyimide and smooth application of stepped portions. The alignment film formation process using this flexographic method is difficult to uniformly adjust the thickness of the alignment film, has problems such as aggregation of the alignment film, and causes display defects such as diagonal stains. In addition, in the flexographic method, waste of materials is severe and production costs increase.

The alignment layer is formed as a whole after patterning the pixel electrode on the thin film transistor substrate. That is, the conductive layer for forming the pixel electrode is formed on the passivation layer of the thin film transistor substrate, the etching process is performed and patterned to form the alignment layer. In order to form the pixel electrode, a photoresist pattern is formed on the conductive layer, and the conductive layer is etched using an etching mask. An ashing process is performed after the conductive layer is etched to remove the photoresist pattern. However, particles remain in the conductive layer after the conductive layer etching process for forming the pixel electrode, and the photoresist residue remains after the ashing process. For example, aqua regia (acid mixture) is used in the etching process of the conductive layer for forming the pixel electrode, and SO ₄ ^2- ions of sulfuric acid in the used etching solution remain in the conductive layer. In order to remove these residues, a cleaning process using an organic cleaning solution is performed, but impurities are not incorporated completely into the alignment layer. Such impurities cause side effects such as increasing residual DC of the alignment layer or increasing pretilt by the reaction of the organic material and the alignment layer.

In addition, since the distance between the sealine and the active is gradually reduced in the alignment layer formed by using polyimide, defects such as seal bubbles occur due to overlap of the seal and the alignment layer, thereby degrading display quality. Is generated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate, a method of manufacturing the same, and a liquid crystal display panel having the same, by forming an alignment layer only on the pixel electrode.

Another object of the present invention is to form an alignment layer on the conductive layer for forming a pixel electrode, and then patterning the alignment layer and the conductive layer at the same time to form an alignment layer only on the pixel electrode, a method of manufacturing the same and having the same It is to provide a liquid crystal display panel.

A thin film transistor substrate according to the present invention includes a gate line extending in one direction on the substrate; A data line extending to intersect the gate line; A pixel electrode formed in the pixel region defined by the gate line and the data line; And an alignment layer formed on the pixel electrode and patterned and formed simultaneously with the pixel electrode.

A gate electrode protruding from the gate line; A source electrode protruding from the data line and partially overlapping the gate electrode; And a drain electrode partially overlapping the gate electrode and spaced apart from the source electrode by a predetermined distance.

According to an aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, the method comprising: forming a first conductive layer on the substrate and patterning the gate electrode to extend in one direction and a gate electrode protruding therefrom; Forming an active layer and an ohmic contact layer to cover the gate electrode after forming a gate insulating film over the entire substrate; Forming a second conductive layer over the entire substrate and patterning the second conductive layer to form a data line extending across the gate line and a source electrode and a drain electrode partially overlapping the gate electrode; Forming a contact hole exposing the drain electrode after forming a passivation layer over the entire substrate; Forming a third conductive layer and a polymer material layer over the entire substrate; And patterning the third conductive layer and the polymer material layer to form a pixel electrode and an alignment layer.

The polymer material layer is formed by spin coating, and the polymer material layer is formed using polyimide.

According to an exemplary embodiment of the present invention, a liquid crystal display panel includes a gate line extending in one direction on a first substrate, a data line extending to cross the pixel line, a pixel electrode formed in a pixel region defined by the same, and the pixel electrode. A thin film transistor substrate including a patterned first alignment layer formed over the pixel electrode; And a black matrix formed on a second substrate corresponding to a region other than the pixel region, a color filter formed corresponding to the pixel region, a common electrode formed on the upper portion, and a second alignment layer formed on the common electrode. It includes a substrate.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a plan view of a liquid crystal display panel according to the present invention, FIG. 2 is a cross-sectional view of the liquid crystal display panel of FIG. 1 taken along line II ′, and FIG. 3 is a line II-II ′ of FIG. It is sectional drawing of the state cut along.

1, 2, and 3, the liquid crystal display panel 300 includes a thin film transistor substrate 100 and a color filter substrate 200 facing each other, and a liquid crystal layer (not shown) disposed therebetween. do.

The thin film transistor substrate 100 includes a plurality of gate lines 121 extending in one direction on the first insulating substrate 110, a plurality of data lines 141 crossing the gate lines 121, and a gate line ( A pixel electrode 151 formed in the pixel region defined by 121 and the data line 141, and a thin film transistor 125 connected to the gate line 121, the data line 141, and the pixel electrode 151. do. The semiconductor device may further include a first alignment layer 171 formed on the pixel electrode 151.

The gate line 121 is formed so as to extend in the horizontal direction by patterning the first conductive layer, and a portion of the gate line 121 protrudes upward or downward to form the gate electrode 122.

The data line 141 is formed to extend perpendicularly to the gate line 121 by patterning the second conductive layer, and a portion of the data line 141 protrudes to form the source electrode 142. In addition, when the data line 141 is formed, the drain electrode 143 is formed to be spaced apart from the source electrode 142 by a predetermined interval.

In addition, the first conductive layer for forming the gate line 121 is aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta) and molybdenum (Mo). It is preferably formed of at least one of the metals or alloys containing them. In addition, the first conductive layer may be formed of not only a single layer but also multiple layers of a plurality of metal layers. That is, a double layer including a metal layer such as chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo) having excellent physicochemical properties, and an aluminum (Al) -based or silver (Ag) -based metal layer having a low specific resistance. It can also be formed. In addition, the second conductive layer for forming the data line 141, the source electrode 142, and the drain electrode 143 may also be formed of the above-described metal, or may be formed of multiple layers.

The thin film transistor 125 allows the pixel signal supplied to the data line 141 to be charged in the pixel electrode 151 in response to the signal supplied to the gate line 121. Accordingly, the thin film transistor 125 includes a gate electrode 122 connected to the gate line 121, a source electrode 142 connected to the data line 141, and a drain electrode 143 connected to the pixel electrode 151. ), The crystallized ohmic contact formed on at least a portion of the active layer 132 and the gate insulating layer 131 and the active layer 132 sequentially formed between the gate electrode 122, the source electrode 142, and the drain electrode 143. Layer 133. In this case, the ohmic contact layer 133 crystallizes the amorphous silicon film doped as described above by applying an excimer laser or performing a heat treatment process in a nitrogen atmosphere.

The passivation layer 144 is formed on the gate line 121, the data line 141, and the thin film transistor 125. The passivation layer 144 may be formed of an inorganic material such as silicon nitride or silicon oxide, or may be formed of a low dielectric constant organic insulating layer. Of course, it may be formed of a double film of an inorganic insulating film and an organic insulating film.

The pixel electrode 151 is formed on the substrate 110 of the pixel region determined by the gate line 121 and the data line 141 by patterning the transparent third conductive layer and connected to the drain electrode 143. Is formed.

The first alignment layer 171 is to align the liquid crystal molecules of the liquid crystal display panel 300 in a predetermined direction. The first alignment layer 171 is formed only on the pixel electrode 151 using an organic polymer material such as polyimide.

Meanwhile, a storage capacitor line (not shown) may be formed to stably maintain the liquid crystal voltage applied to the liquid crystal layer (not shown) positioned between the thin film transistor substrate 100 and the color filter substrate 200. For example, the storage capacitor line (not shown) may be formed in a direction parallel to the gate line 121 when the gate line 121 is formed.

The color filter substrate 200 includes a black matrix 221 formed on the second insulating substrate 210, a color filter 231, an overcoat layer 241, and a common electrode 251. The semiconductor device may further include a second alignment layer 271 formed on the common electrode 251.

The black matrix 221 is formed in a region other than the pixel region to prevent light leakage from the region other than the pixel region and optical interference between adjacent pixel regions. That is, the black matrix 221 has an opening that opens an area where the pixel electrode 151 of the thin film transistor substrate 100 is formed.

The color filter 231 is formed by repeating the red, green, and blue filters on the black matrix 221. The color filter 231 serves to impart color to light emitted from the light source and passing through the liquid crystal layer (not shown). The color filter 231 may be formed of a photosensitive organic material.

The overcoat film 241 is formed on the black matrix 221 not covered by the color filter 231 and the color filter 231. The overcoat layer 241 serves to protect the color filter 231 and to insulate the upper and lower conductive layers while planarizing the color filter 231, and may be formed using an acrylic epoxy material.

The common electrode 251 is formed on the overcoat layer 241. The common electrode 251 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The common electrode 251 applies a voltage to the liquid crystal layer (not shown) together with the pixel electrode 151 of the thin film transistor substrate.

The second alignment layer 271 is to align the liquid crystal molecules of the liquid crystal display panel 300 in a predetermined direction. The second alignment layer 271 is formed on the common electrode 251 using an organic polymer material such as polyimide.

4 (a) to 4 (d) are cross-sectional views of devices sequentially shown to explain a method of manufacturing a thin film transistor substrate according to the present invention, taken along the line II ′ of FIG. 1. 5A to 5D are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to the present invention, taken along the line II-II ′ of FIG. 1.

Referring to FIGS. 4A and 5A, after forming the first conductive layer on the substrate 110, the first conductive layer is patterned by photolithography and etching using a first mask. As a result, the gate line 121 extending in the horizontal direction at predetermined intervals and the gate electrode 122 partially protruding from the gate line 121 are formed. The gate insulating film 131 is formed on the entire upper surface. The gate insulating film 131 is formed using an inorganic insulating film including a silicon oxide film or a silicon nitride film. For example, a hydrogenated amorphous silicon film and a doped amorphous silicon film are sequentially formed on the whole. The active layer 132 and the ohmic contact layer 133 are formed by patterning the hydrogenated amorphous silicon layer and the doped amorphous silicon layer to overlap the gate electrode 122 by a photolithography and an etching process using a second mask.

Referring to FIGS. 4B and 5B, after forming the second conductive layer over the entire surface, the second conductive layer is patterned by a photolithography and an etching process using a third mask. As a result, the data line 141 is formed to intersect the gate line 121, and a source electrode 142 and a drain electrode 143 partially overlapping each other and spaced apart from each other by the gate electrode 122 are formed. In this case, the source electrode 142 protrudes from the data line 141, and the active layer 132 exposed by the source electrode 142 and the drain electrode 143 becomes a channel region. Here, it is preferable to use a metal single layer or multiple layers as the second conductive layer, and the second conductive layer may use the same material as the first conductive layer for forming the gate line 121.

Referring to FIGS. 4C and 5C, the passivation layer 144 is formed on the entire upper portion. The protective film 144 may be formed using an inorganic insulating film such as a silicon oxide film or a silicon nitride film, or may be formed by using an organic insulating film such as benzocyclobutane (BCB) or acrylic resin (acryl resine), or may be formed by laminating them. . Subsequently, the contact hole 161 is formed to expose the drain electrode 143 by etching a predetermined region of the passivation layer 144 by a photolithography and an etching process using a third mask. A third conductive layer 151a is formed on the entire structure, and a polyimide or the like forms the polymer material layer 171a thereon. The polymer material layer 171a is formed by using a coating method such as spin coating without using a conventional flexographic type alignment film forming apparatus. Here, the third conductive layer 151a may be a transparent conductive layer including indium tin oxide (ITO) or indium zinc oxide (IZO).

Referring to FIGS. 4D and 5D, the polymer material layer 171a and the third conductive layer 151a are patterned by a photolithography and an etching process using a fourth mask to form the pixel electrode 151 and the first. An alignment film 171 is formed. That is, the pixel electrode 151 is formed in the pixel area where the gate line 121 and the data line 141 intersect, and the first alignment layer 171 is formed only on the pixel electrode 151.

As described above, the color filter substrate 200 is manufactured separately from the manufacturing of the thin film transistor substrate 100. In order to manufacture the color filter substrate 200, the black matrix 221 is formed in a predetermined region of the second substrate 211, that is, a region corresponding to a region where the pixel electrode 151 of the thin film transistor substrate 100 is not formed. The color filter 231 is formed in a region corresponding to the region where the pixel electrode 151 is formed. The overcoat film 241 is selectively formed to remove the step between the black matrix 221 and the color filter 231. In addition, after the common electrode 251 is formed over the entirety of the color filter substrate 200, the second alignment layer 271 is formed over the common electrode 251.

The thin film transistor substrate 100 and the color filter substrate 200 manufactured as described above are pressed by pressing the two substrates such that each pixel electrode 151 and the common electrode 251 face each other. In this case, a predetermined sealing film may be applied to seal the two substrates. In addition, a spacer may be provided to maintain a cell gap between the two substrates. Thereafter, a liquid crystal is injected and sealed between the two bonded substrates to manufacture a liquid crystal display panel.

The liquid crystal display panel fabricated as described above turns on the thin film transistor 125 of the thin film transistor substrate 100 to apply an electrical signal necessary for pixel formation to the pixel electrode 151, and the common electrode of the color filter substrate 200. When a common voltage is applied to 251, an electric field is formed between the pixel electrode 151 and the common electrode 251. The arrangement of the liquid crystal layer is changed by such an electric field, and the light transmittance is changed according to the changed arrangement to display a target image.

As described above, according to the present invention, the alignment layer may be selectively formed only on the pixel electrode by forming an alignment layer on the conductive layer for forming the pixel electrode of the thin film transistor substrate and simultaneously patterning the same by using a predetermined etching mask. Therefore, in the process of etching the pixel electrode and the alignment layer, impurities can be prevented from being mixed in the alignment layer, thereby minimizing the reaction between the alignment layer and the impurity and preventing defects. In addition, by simultaneously patterning the pixel electrode and the alignment film, overlap between the alignment film and the yarn can be prevented, thereby preventing the defect. By forming the alignment film by coating without using the APR plate, the thickness and uniformity of the alignment film can be easily adjusted, and the process material cost can be reduced.

Claims (6)

A gate line extending in one direction on the substrate; A data line extending to intersect the gate line; A pixel electrode formed in the pixel region defined by the gate line and the data line; And A thin film transistor substrate including an alignment layer formed on the pixel electrode and patterned at the same time as the pixel electrode. The semiconductor device of claim 1, further comprising: a gate electrode protruding from the gate line; A source electrode protruding from the data line and partially overlapping the gate electrode; And A thin film transistor substrate further comprising a drain electrode partially overlapping the gate electrode and spaced apart from the source electrode by a predetermined distance. Forming a first conductive layer on the substrate and patterning the first conductive layer to form a gate electrode extending in one direction and a gate electrode protruding therefrom; Forming a gate insulating film over the entire substrate and forming an active layer and an ohmic contact layer to cover the gate electrode; Forming a second conductive layer over the entire substrate and patterning the second conductive layer to form a data line extending across the gate line and a source electrode and a drain electrode partially overlapping the gate electrode; Forming a contact hole exposing the drain electrode after forming a passivation layer over the entire substrate; Forming a third conductive layer and a polymer material layer over the entire substrate; And Patterning the third conductive layer and the polymer material layer to form a pixel electrode and an alignment layer. The method of claim 3, wherein the polymer material layer is formed by spin coating. The method of claim 3, wherein the polymer material layer is formed using polyimide. A gate line extending in one direction on the first substrate, a data line extending to intersect the pixel line, a pixel electrode formed in the pixel region defined by them, and a pattern formed on the pixel electrode at the same time as the pixel electrode A thin film transistor substrate including one alignment layer; And A color filter substrate including a black matrix formed on a second substrate corresponding to a region other than the pixel region, a color filter formed corresponding to the pixel region, a common electrode formed on the upper portion thereof, and a second alignment layer formed on the common electrode; Liquid crystal display panel comprising a.

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