KR20080013417A - Segment-interlaced driving apparatus for display panel and driving method using the apparatus thereof - Google Patents

Abstract

A method and an apparatus for driving a display panel are provided to drive a driving circuit at a low voltage by decreasing a size of the driving circuit by half. A driving controller receives image data to be displayed from a CPU(Central Processing Unit), generates various control signals, and transmits a scan signal to a scan driving circuit. The driving controller transmits the image data to be displayed to a data driving circuit. The scan driving circuit receives scan signals from the driving controller and outputs scan driving signals to scan lines(S0-S7). The data driving circuit receives the image data from the driving controller, generates a data driving signal, and outputs the data driving signal to data lines(D0-D7). A demultiplexer applies the signal from the data driving circuit to one of two output lines according to a select signal which is generated at the driving controller.

Description

Segment-Interlaced Driving Apparatus for Display Panel and Driving Method using the Apparatus

1 is a block diagram of a conventional display driving chip;

2 is a structural view of a typical display panel;

3 is a diagram illustrating an example of a timing diagram according to sequential driving of a conventional display driving chip;

4 is a block diagram of a lattice driving chip which is a display driving chip according to the present invention;

FIG. 5 shows an example of a drive timing diagram of the display drive chip of FIG. 4; FIG.

The present invention relates to a lattice order driving device for display panels such as flat panel displays, LCD displays, organic EL displays, and the like.

More particularly, the present invention relates to a lattice order driving device for a display panel which cuts the data driving circuit in half and inserts a 1: 2 demux to reduce the chip area of the display panel driving circuit.

1 is a block diagram of a conventional display driving chip.

As shown in FIG. 1, the display driving chip includes a driving controller for receiving and storing image data from a CPU, generating a control signal for displaying the stored image data on a panel, and outputting a scan signal and image data; A scan driving circuit that is provided in a one-to-one correspondence with the scan lines S0 to S7, and outputs a scan driving signal to the scan lines S0 to S7 in response to a scan signal input from the driving controller, and the data line D0 And a data driver circuit that is provided in a one-to-one correspondence and generates a driving signal corresponding to the image data input from the driving controller and outputs the driving signal to the data lines D0 to D7.

In brief, the operation of the display driving chip configured as described above, the driving control unit receives and stores image data from the CPU, and generates various control signals for displaying the stored image data on the panel. In addition, the driving controller transmits a scan signal to the scan driving circuit and transmits the image data to the data driving circuit.

Then, the scan driving circuit receives the scan signal from the driving controller and outputs the scan driving signal to the scan lines S0 to S7. The scan lines S0 to S7 are driven by independent scan driving circuits, respectively.

The data driving circuit receives the image data from the driving control unit, generates a corresponding driving signal, outputs the corresponding driving signal to the data lines D0 to D7, and the data lines D0 to D7 are driven by independent data driving circuits.

2 is an example of a conventional general display panel structure.

In the conventional display panel structure, as illustrated in FIG. 2, scan lines S0 to S7 and data lines D0 to D7 cross each other in a matrix shape, and the scan lines S0 to S7. And the pixels p00 to p77 are positioned at the point where the data lines D0 to D7 meet.

FIG. 3 is a diagram illustrating an example of a timing diagram when driving the display panel of FIG. 1 using the display driving chip of FIG. 2, in which scan lines S0 to S7 are driven one at a time and scan lines S0. While ~ S7) is driven, the data lines D0-D7 are driven by corresponding image data values.

The driving controller 10 drives the scan line S0 and transmits image data values corresponding to the pixels p00 to p07 to the data driving circuit to drive the data lines D0 to D7.

Then, the brightness of the pixels p00 to p07 is changed by one scan line S0 and the data lines D0 to D7. That is, the pixels P00 to P07 have brightness corresponding to values driven by the data lines D0 to D7.

As shown in FIG. 3, the other scan lines S1 to S7 are also driven in the same manner as the scan line SO described above. That is, in progressive scan, the scan line S0 is driven sequentially from the scan line S0. In interlace scan, the odd scan line and the even scan line are alternately driven. , S4, S6, S1, S3, S5, S7.

According to the conventional driving method, as shown in FIG. 3, all data lines must be driven simultaneously when each scan line is driven. Therefore, in order to drive all the data lines at the same time, each independent data driving circuit must be provided. In this case, the data driving circuit is not only very complicated but also requires a large current to be driven at a high voltage, thus occupying a large chip area.

In addition, if the chip area is large, there is a problem that the image quality is lowered by worsening the electrical characteristics, and also the price competitiveness in the market.

The present invention solves the problems of the prior art as described above, and the object of the present invention is to reduce the data driving circuit in half, by inserting a 1: 2 demux (demux) of the display panel driving circuit The present invention provides a lattice order driving device for a display panel which can reduce chip area and a driving method using the driving device.

In addition, the present invention provides a lattice order driving device and a driving method for a display panel that can be controlled to alternately drive even data lines and odd data lines using a 1: 2 demux.

In addition, another object of the present invention is to reduce the area of the display driving chip by reducing the data driving circuit by half the existing display driving chip, and replacing the rest with 1: 2 demux (demux) A grid order driving device and a driving method for a panel are provided.

In addition, another object of the present invention is to provide a lattice order driving apparatus and driving method for a display panel that can improve the electrical characteristics of the chip to improve the image quality as well as reduce the chip price.

The present invention proposed to solve the above technical problem,

A lattice order driving device for a display panel in which scan lines and data lines are interconnected in a matrix form,

A driving controller which receives and stores image data from a CPU, generates a control signal for displaying the stored image data on a panel, and outputs a scan signal and the image data;

A scan driving circuit provided in a one-to-one correspondence with the scan line and outputting a scan driving signal to the scan line in response to a scan signal input from the driving controller;

A data driving circuit which generates and outputs a driving signal corresponding to the image data input from the driving controller; And

A demux for selectively outputting a signal input from the data driving circuit according to a selection signal SEL;

Characterized in that comprises a.

The selection signal SEL is generated by the driving controller and is supplied to the demux.

The selection signal SEL may output a signal output from the data driver to one of the two output lines of the demux.

The demux causes the data driving circuit to output an input of an even data driving circuit to the demux when the selection signal SEL is "0", and the data when the selection signal SEL is "1". The driving circuit is characterized in that the input of the odd data driving circuit is output to the demux.

Hereinafter, a grid order driving apparatus for a display panel according to the present invention will be described with reference to the accompanying drawings.

An exemplary embodiment of a lattice order driving apparatus for a display panel in which scan lines S0 to S7 and data lines D0 to D7 are connected to each other in a matrix form is shown in FIG. 4. A driving control unit for receiving and storing image data from a CPU, generating a control signal for displaying the stored image data on a panel, and outputting a scan signal and image data, and one-to-one matching with the scan lines S0 to S7. And a scan driving circuit for outputting a scan driving signal to scan lines S0 to S7 in response to the scan signal input from the driving controller, and generating and outputting a driving signal corresponding to the image data input from the driving controller. A data driver circuit and a demux for selectively outputting a signal input from the data driver circuit according to a selection signal SEL. It is.

The selection signal SEL is generated by the driving controller and supplied to the demux. In particular, the selection signal SEL is an output line of one of two output lines of the demux. Output the signal output from.

The demux transmits the input of the even data driving circuit to the demux when the selection signal SEL is "0", and the select signal SEL is "0". When 1 ", the data driver circuit outputs an input of an odd data driver circuit to a demux.

The operation of the lattice order driving apparatus for the display panel according to the present invention configured as described above is as follows.

4 is a configuration diagram of a display driving chip according to the present invention.

As shown in FIG. 4, the driving controller receives image data to be displayed from the CPU, generates various control signals for displaying the received image, transmits a scan signal to the scan driving circuit, and the data driving circuit. Transfer the image data to be displayed on the screen.

Then, the scan driving circuit receives the scan signal from the driving controller and outputs the scan driving signal to the scan lines S0 to S7, and the data driving circuit receives the image data to be displayed from the driving controller to generate a data driving signal to generate the data driving signal. Output to the line D0 ~ D7.

In addition, the demux connects a signal input from the data driving circuit to an appropriate one of two output lines according to the value of the selection signal SEL to be output. At this time, the selection signal SEL is generated by the driving controller. When the selection signal SEL is '0', the output of the data driving circuit is connected to output terminals of even numbers D0, D2, D4, and D6, and the selection signal SEL. ) Is '1', the output of the data driving circuit is connected to the output terminals of odd D1, D3, D5, D7.

FIG. 5 is a diagram illustrating driving timing for driving the display panel of FIG. 2 using the display driving chip of FIG. 4.

When the driving control unit generates a scan signal and transmits the scan signal to the scan driving circuit, the scan driving circuit outputs the scan driving signal to the scan lines S0 to S7 as shown in FIG. 5 to be transmitted to the panel. At this time, when the scan driving signals S0 to S7 are 'L' (low, '0'), the scan driving circuit drives the panel, and the scan driving signals S0 to S7 are 'H' (high, '1'). Scan drive circuit does not drive the panel.

The driving controller drives the start scan line S0 of the even scan lines S0, S2, S4, and S6 through the scan driving circuit, and simultaneously performs the even pixels p00, p02, p04, and p06 (the '0' row on the matrix). Image data corresponding to the even columns of?) Is transmitted to the data driving circuit, and the selection signal SEL is output as '0' so that the output of the data driving circuit is connected to the even data lines D0, D2, D4, and D6. do. At this time, the image data value output to the odd data lines D1, D3, D5, and D7 becomes '0'. Then, the pixels p00, p02, p04, and p06 are driven by the scan line S0 and the data lines D0, D2, D4, and D6, and the pixels p01, p03, p05, and p07 (row '0' on the matrix). Odd columns) are not driven.

Next, the driving control unit drives the scan line S1 next to the scan line S0 of the odd scan lines S1, S3, S5, and S7, and at the same time the pixels p11, p13, p15, and p17 (on the matrix). The data of the data driving circuit is connected to the odd data lines D1, D3, D5, and D7 by transmitting data corresponding to the odd column of row '1' to the data driving circuit and setting the selection signal SEL to '1'. Be sure to At this time, the image data value output to the even data lines D0, D2, D4, and D6 becomes '0'. Then, the pixels p11, p13, p15, and p17 are driven by the scan line S1 and the data lines D1, D3, D5, and D7, and the pixels p10, p12, p14, and p16 ('1' rows on the matrix) are driven. Even columns) are not driven.

In the same manner as above, the remaining scan lines S2 to S7 are sequentially driven.

Next, the driving scan line S0 of the scan lines S0 to S7 is driven again, and data corresponding to the odd pixels p01, p03, p05, and p07 (the odd column of the row '0' on the matrix) is again driven. Is transmitted to the data driving circuit and the selection signal SEL is set to '1' so that the output of the data driving circuit is connected to the odd data lines D1, D3, D5, and D7. At this time, the image data value output to the even data lines D0, D2, D4, and D6 becomes '0'. Then, the odd pixels p01, p03, p05, p07 are driven by the scan line S0 and the data lines D1, D3, D5, D7, and the even pixels p00, p02, p04, p06 ('0 on the matrix). Even rows of rows) are not driven.

After that, the driving controller drives the scan line S1, which is the next order of the scan line S0, and corresponds to even-numbered pixels p10, p12, p14, and p16 (even columns of '1' rows on the matrix). The data of the data driving circuit is transferred to the data driving circuit and the selection signal SEL is set to '0' so that the output of the data driving circuit is connected to the even data lines D0, D2, D4, and D6. At this time, the image data value output to the odd data lines D1, D3, D5, and D7 becomes '0'. Then, the pixels p10, p12, p14, and p16 are driven by the scan line S1 and the data lines D0, D2, D4, and D6, and the pixels p11, p13, p15, and p17 ('1' rows on the matrix). Odd columns) are not driven.

In this manner, the scan lines S2 to S7 are sequentially driven.

After the above 1 cycle process is finished, it returns to the initial process and becomes the circular drive. That is, while driving the scan line S0, the image data corresponding to the even pixels p00, p02, p04, and p06 are transmitted to the data driving circuit, and the selection signal SEL is output as '0' to output the data driving circuit. The first step is to start the output of the signal to be connected to the even data lines D0, D2, D4, and D6. The above process is repeated to drive the display panel until the signal is terminated.

The present invention is not limited to the above embodiments, and various modifications and changes can be made by those skilled in the art, which are included in the spirit and scope of the present invention included in the appended claims.

According to the present invention having the above-described configuration and operation and the preferred embodiment, the area of the driving chip is reduced by simplifying the driving circuit by reducing the data driving circuit in half, and the driving circuit is reduced in half so that the driving circuit can be driven at low voltage. As the chip area is reduced, the electrical characteristics are improved to improve the image quality and additionally to reduce the price of the chip.

Claims (9)

A lattice order driving device for a display panel in which scan lines and data lines are interconnected in a matrix form, A drive controller for receiving and storing image data from a CPU, generating a control signal for displaying the stored image data on a panel, and outputting a scan signal and image data; A scan driving circuit provided in a one-to-one correspondence with the scan line and outputting a scan driving signal to the scan line in response to a scan signal input from the driving controller; A data driving circuit which generates and outputs a driving signal corresponding to the image data input from the driving controller; And A demux for selectively outputting a signal input from the data driving circuit according to a selection signal SEL; Grid order driving apparatus for a display panel comprising a. The method of claim 1, wherein the selection signal (SEL), The lattice order driving apparatus for a display panel which is generated by the driving control unit and supplied to the demux. The method of claim 1, wherein the selection signal (SEL), And a signal output from the data driver to one output line of the two output lines of the demux. The method of claim 2, wherein the selection signal (SEL), And a signal output from the data driver to one output line of the two output lines of the demux. The method of claim 1, wherein the demux, When the selection signal SEL is "0", the data driving circuit outputs the input of the even data driving circuit to the demux. And the data driving circuit outputs an input of an odd data driving circuit to the demux when the selection signal (SEL) is "1". The method of claim 2, wherein the demux, When the selection signal SEL is "0", the data driving circuit outputs the input of the even data driving circuit to the demux. And the data driving circuit outputs an input of an odd data driving circuit to the demux when the selection signal (SEL) is "1". The method of claim 3, wherein the demux, When the selection signal SEL is "0", the data driving circuit outputs the input of the even data driving circuit to the demux. And the data driving circuit outputs an input of an odd data driving circuit to the demux when the selection signal (SEL) is "1". The method of claim 4, wherein the demux, When the selection signal SEL is "0", the data driving circuit outputs the input of the even data driving circuit to the demux. And the data driving circuit outputs an input of an odd data driving circuit to the demux when the selection signal (SEL) is "1". In driving the display panel using the driving device of any one of claims 1 to 8, The driving control unit driving one of the even scan lines through the scan driving circuit and simultaneously transmitting image data corresponding to even (even row, even column) pixels of a matrix to the data driving circuit; A second step of causing the output of the data driving circuit to be connected to the plurality of even data lines by setting the selection signal SEL to '0'; Subsequently, the driving control unit drives one odd scan line in the next order after the first step through the scan driving circuit, and simultaneously transfers image data corresponding to odd (odd rows and odd columns) pixels of the matrix to the data driving circuit. Transmitting a third step; A fourth step of connecting the output of the data driving circuit to the plurality of odd data lines by setting the selection signal SEL to '1'; A fifth step of sequentially driving the first to fourth steps with respect to the remaining even and odd scan lines; A sixth step of driving the start even scan line of the first step and transmitting image data corresponding to odd (even row, odd column) pixels of the matrix to the data driving circuit; A seventh step of allowing the output of the data driving circuit to be connected to the plurality of odd data lines by setting the selection signal SEL to '1'; An eighth step of the driving control unit driving the odd scan line of the third step and simultaneously transmitting image data corresponding to even (odd and even columns) pixels of a matrix to the data driving circuit; A ninth step of setting the selection signal SEL to '0' so that the output of the data driving circuit is connected to the plurality of even data lines; A tenth step of sequentially driving the first to fourth steps with respect to the remaining even and odd scan lines; And An eleventh step of repeatedly performing the processes of the first to tenth steps; Grid order driving method for a display panel, characterized in that consisting of.

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