KR20080003329U - A jig for memory-module test - Google Patents
A jig for memory-module testInfo
- Publication number
- KR20080003329U KR20080003329U KR20-2008-0007783U KR20080007783U KR20080003329U KR 20080003329 U KR20080003329 U KR 20080003329U KR 20080007783 U KR20080007783 U KR 20080007783U KR 20080003329 U KR20080003329 U KR 20080003329U
- Authority
- KR
- South Korea
- Prior art keywords
- jig
- memory
- module test
- test
- module
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2020080007783U KR200444336Y1 (en) | 2008-06-11 | 2008-06-11 | A jig for memory-module test |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2020080007783U KR200444336Y1 (en) | 2008-06-11 | 2008-06-11 | A jig for memory-module test |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020060115105A Division KR20080045877A (en) | 2006-11-21 | 2006-11-21 | A jig for memory-module test |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20080003329U true KR20080003329U (en) | 2008-08-13 |
KR200444336Y1 KR200444336Y1 (en) | 2009-05-07 |
Family
ID=41325644
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2020080007783U KR200444336Y1 (en) | 2008-06-11 | 2008-06-11 | A jig for memory-module test |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR200444336Y1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110036337A (en) * | 2009-10-01 | 2011-04-07 | (주)씨앤씨테크 | Jig for memory module of notebook computer |
KR101029122B1 (en) | 2009-10-08 | 2011-04-13 | (주)씨앤씨테크 | Jig for memory module test |
KR200460742Y1 (en) | 2010-03-12 | 2012-06-08 | (주)마이크로컨텍솔루션 | Test board assembly structure of memory module test socket |
KR101532758B1 (en) * | 2013-11-07 | 2015-07-02 | 주식회사 오킨스전자 | Latch and the socket for semiconductor package comprising the same |
KR102048448B1 (en) * | 2018-09-18 | 2019-11-25 | 주식회사 마이크로컨텍솔루션 | Zig apparatus |
-
2008
- 2008-06-11 KR KR2020080007783U patent/KR200444336Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR200444336Y1 (en) | 2009-05-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20130415 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20140522 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |