KR20080000691A - Thin film transistor and method for fabricating thereof and method for fabricating liquid crystal display device having thereof - Google Patents

Abstract

A thin film transistor, a method for manufacturing the same, and a method for manufacturing an LCD device are provided to simplify a manufacturing process by forming a channel layer and an ohmic contact layer at the same time. A thin film transistor includes a gate electrode(101), a gate insulation film(102), an ohmic contact layer(107b), and source/drain electrodes(110a,110b). The gate insulation film is formed on the gate electrode. A channel layer is formed on the gate insulation film corresponding to the gate electrode. The ohmic contact layers are formed at both sides of the channel layer. The source/drain electrodes are contacted with the ohmic contact layer and formed on an overall surface of the ohmic contact layer. The channel layer contains cyclopentasilane(Si5H10). The ohmic contact layer contains at least one of a PSG(Phosphor Silicate Glass), an ITO(Indium Tin Oxide) metal, and N+ or P+-doped amorphous silicon film.

Description

Thin film transistor, method for manufacturing same, and method for manufacturing liquid crystal display device having the same {THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THEREOF AND METHOD FOR FABRICATING LIQUID CRYSTAL DISPLAY DEVICE HAVING THEREOF}

1 is a cross-sectional view showing a thin film transistor manufactured according to the prior art.

2A to 2H are cross-sectional views illustrating a thin film transistor manufacturing process according to the present invention.

3 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

4A to 4G are cross-sectional views illustrating a process of manufacturing a liquid crystal display device along the line II ′ of FIG. 3.

* Description of the symbols for the main parts of the drawings

100: insulating substrate 102: gate insulating film

103: liquid silicon 103a: silicon film

106: conductive film 170: photoresist pattern

107a: channel layer 107b: ohmic contact layer

110a: source electrode 110b: drain electrode

206: first storage electrode 207: second storage electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to thin film transistors, and more particularly, to a thin film transistor that simplifies the process by simultaneously performing channel layer crystallization and ohmic contact region formation of a thin film transistor, a method of manufacturing the same, and a method of manufacturing a liquid crystal display device having the same.

As an imaging device, an active matrix liquid crystal display device having a wide range of applications mainly uses a thin film transistor as a switching element. The semiconductor layer of the thin film transistor (TFT) uses an amorphous silicon layer, which is advantageous for manufacturing a small-size TFT LCD, but is difficult to apply to manufacturing a large-screen TFT LCD due to its low mobility.

Therefore, in recent years, research on polysilicon TFTs using a polysilicon layer having excellent mobility as a semiconductor layer has been actively conducted. Such a polysilicon TFT can be easily applied to fabrication of a large-screen TFT LCD, and of course, driven on a TFT array substrate. Drive ICs can be integrated together, providing an integrated density and competitive price.

As a method for forming a polysilicon layer, there are a method of directly depositing polysilicon and a method of depositing amorphous silicon and then crystallizing it with polysilicon. After forming an amorphous silicon layer on a substrate, a crystallization process is generally performed. The latter method is used to carry out and convert the amorphous silicon layer into a polysilicon layer.

Meanwhile, the polysilicon thin film transistor is composed of a gate electrode, an active layer, and a source / drain electrode, and the patterns are selectively insulated by an insulating film to operate independently.

As the insulating film, an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx) having excellent handling characteristics, good adhesion to metal, and high dielectric breakdown voltage is mainly used.

1 is a cross-sectional view showing a thin film transistor manufactured according to the prior art.

As shown in FIG. 1, a thin film transistor forms a buffer layer 2 as an insulating film on a substrate 10, and then forms an amorphous silicon (a-Si) layer on the buffer layer 2.

The insulating film constituting the buffer layer 2 is uniformly deposited at 300-400 ° C. using a method such as plasma-enhanced CVD (PECVD), low-pressure CVD (LPCVD), or sputtering using a siren (SiH 4) gas. Form. In this case, the buffer layer 2 formed on the substrate 10 is an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx).

As described above, when an amorphous silicon layer made of amorphous silicon (a-Si) is formed on the buffer layer 2, the polysilicon layer is formed by performing an annealing process using an excimer laser on the amorphous silicon layer. After crystallization, the polysilicon layer is patterned to form a channel layer 4.

Thereafter, an inorganic insulating film such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface of the substrate 10 including the channel layer 3 to form the gate insulating film 5.

Thereafter, a conductive material such as aluminum (Al) or Al alloy is deposited on the entire surface of the gate insulating layer 5 and patterned by photolithography to form a gate electrode (or a gate electrode) on a predetermined portion above the channel layer 4. 1) and N-type impurities are ion implanted using the gate electrode 1 as a mask to form an ohmic contact layer 6 in the channel layer 4.

In this case, the ion implantation region is a region where the source / drain electrodes 9a and 9b are formed, and the channel layer 4 which is masked by the gate electrode 1 and where impurities are not implanted becomes a channel region.

Then, an interlayer insulating film 7 is formed by depositing an inorganic insulating film such as silicon nitride or silicon oxide on the entire surface of the substrate 10 on which the gate electrode 1 is formed. The deposition method is the same as that of the gate insulating film 5. Subsequently, the interlayer insulating film 7 formed on the source / drain electrodes 9a and 9b and the gate insulating film 5 are etched by using a photolithography process on the entire surface of the substrate 10 on which the interlayer insulating film 7 is formed. Form a hole.

A metal film is formed on the substrate 10 on which the contact hole is formed, and then etched to form source / drain electrodes 9a and 9b to complete the polysilicon thin film transistor.

However, the thin film transistor manufacturing process as described above has a disadvantage in that the manufacturing process is complicated because it is formed through a plurality of mask processes.

In particular, since the ohmic contact layer formed by the channel layer and the ion implantation process of the thin film transistor are performed in separate processes, the manufacturing process is complicated and the manufacturing cost increases.

It is an object of the present invention to provide a thin film transistor and a method of manufacturing the same, which simplify the manufacturing process by simultaneously forming a channel layer and an ohmic contact layer of a thin film transistor using liquid silicon.

In addition, an object of the present invention is to provide a liquid crystal display device manufacturing method which can simplify the manufacturing process and reduce the production cost by simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor of the liquid crystal display using liquid silicon. have.

In order to achieve the above object, a thin film transistor according to the present invention,

A gate electrode;

A gate insulating film formed on the gate electrode;

A channel layer formed on the gate insulating layer corresponding to the gate electrode, and an ohmic contact layer formed on both sides of the channel layer; And

A source / drain electrode is formed to be in contact with the ohmic contact layer and cover the entire area of the ohmic contact layer.

According to another embodiment of the present invention, a thin film transistor manufacturing method includes

Forming a gate electrode on the substrate;

 Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a liquid silicon film;

Forming a photoresist pattern in the channel region on the liquid silicon;

Forming a conductive film on an entire surface of the substrate on which the photoresist pattern is formed;

Removing the photoresist pattern to perform a lift off process exposing the channel region;

Simultaneously forming an ohmic contact layer and a channel layer in the channel region; And

And forming a metal film on the substrate on which the ohmic contact layer and the channel layer are formed, and then etching to form a source / drain electrode.

According to another embodiment of the present invention, a method of manufacturing a liquid crystal display device is provided.

Forming a gate electrode and a gate wiring on the substrate;

 Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a liquid silicon film;

Forming a photoresist pattern in the channel region on the liquid silicon;

Forming a conductive film on an entire surface of the substrate on which the photoresist pattern is formed;

Performing a lift-off process of removing the photoresist pattern to expose a channel region;

Simultaneously forming an ohmic contact layer and a channel layer in the channel region; And

Forming a metal film on the substrate on which the ohmic contact layer and the channel layer are formed and then etching to form source / drain electrodes and data lines;

Forming a protective film on the substrate on which the source / drain is formed; And

And forming a pixel electrode on the passivation layer, and then forming a pixel electrode.

According to the present invention, the liquid crystal silicon is used to simultaneously form the channel layer and the ohmic contact layer of the thin film transistor to simplify the manufacturing process.

In addition, the present invention simplifies the manufacturing process and reduces the production cost by simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor of the liquid crystal display using liquid silicon.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2H are cross-sectional views illustrating a thin film transistor manufacturing process according to the present invention.

2A and 2B, a metal film is deposited on the transparent insulating substrate 100 and etched to form a gate electrode 101, and on the insulating substrate 100 on which the gate electrode 101 is formed. The gate insulating film 102 is formed. The gate insulating layer 102 is an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx).

Then, the liquid silicon film 103 is formed on the entire surface of the insulating substrate 100 on which the gate insulating film 102 is formed. The liquid silicon film 103 uses silicon such as Si ₅ H ₁₀ (CyclopentaSilane).

When the liquid silicon film 103 is formed on the insulating substrate 100 as described above, the silicon film may be formed by removing the solvent included in the liquid silicon film 103 according to the heat treatment process.

When the heat treatment process for the liquid silicon film 103 is completed as described above, as shown in FIG. 2C, a photoresist is applied to the entire surface of the insulating substrate 100, exposed and developed to correspond to the gate electrode 101. The photoresist pattern 170 is formed on the silicon film 103a.

That is, the photoresist pattern 170 is formed in the region where the channel layer of the thin film transistor is to be formed.

In this case, in the method of forming the photoresist pattern 170, an exposure process is performed using the gate electrode 101 formed on the insulating substrate 100 as an exposure mask.

Then, as illustrated in FIG. 2D, the conductive film 106 is formed on the entire surface of the insulating substrate 100 on which the photoresist pattern 170 is formed.

The conductive layer 106 is an electrical conductive layer serving as an ohmic contact layer for electrically contacting the source / drain electrodes and the channel layer region of the thin film transistor.

Usable as the conductive film 106 include PSG (Phospher-Silicate-Glass), or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ .

When the conductive film 106 is formed on the insulating substrate 100 as described above, as shown in FIG. 2E, a lift-off process is performed to remove the photoresist pattern.

Therefore, when the photoresist pattern is removed in the lift-off process, the conductive layer 106 formed on the photoresist pattern is also removed to expose the silicon layer 103a on the gate electrode 101 to the outside.

That is, the conductive film 106a is formed on the silicon film 103a in addition to the region where the channel layer is to be formed.

Then, as shown in FIG. 2F, when the insulating substrate 100 is subjected to an annealing process using a laser and a contact layer forming process, the conductive film 106a is diffused perpendicularly to the silicon film 106a to form an ohmic contact. In the silicon film region where the layer 107b is formed and no conductive film is formed, the channel layer 107a is formed by crystallization of polysilicon by annealing with a laser.

That is, the present invention has the advantage of simultaneously forming a channel layer and an ohmic contact layer of a thin film transistor without using a mask process.

In the annealing process and the contact layer forming process, the substrate is heated to a temperature range of 200 to 800 ° C. (usually about 540 ° C.), and the wavelength 308 nm and the amount of energy are performed by irradiating a laser of 345 mJ / cm 2.

When the channel layer 107a and the ohmic contact layer 107b are formed on the insulating substrate 100 as described above, as shown in FIGS. 2G and 2H, a metal film is formed on the entire surface of the insulating substrate 100. The mask process and the etching process are performed to form the source / drain electrodes 110a and 110b.

Thus, the source electrode 110a and the drain electrode 110b are formed on the ohmic contact layer 107b to complete the thin film transistor.

As described above, when the thin film transistor is completed, a protective film (insulating film) is additionally formed on the insulating substrate 100, and the contact hole process of exposing the source / drain electrodes 110a and 110b to the outside is performed.

Then, a metal film may be deposited and patterned on the insulating substrate 100 to form a power terminal electrically contacting the source / drain electrodes 110a and 110b.

In the thin film transistor of the present invention, an active layer composed of a channel layer and an ohmic contact layer can be formed simultaneously without using a mask.

In addition, the present invention can form a channel layer without a deposition process by PECVD, there is an advantage of reducing the process burden.

3 is a plan view illustrating a pixel structure of a liquid crystal display according to the present invention.

As shown in FIG. 3, the gate wiring 201 for applying the driving signal and the data wiring 205 for applying the data signal are alternately arranged to define a unit pixel area, and the gate wiring 201 and the data wiring ( A thin film transistor (TFT), which is a switching element, is disposed in an area where 205 intersects.

A first common wiring 203 is formed in the unit pixel region in parallel with the gate wiring 201 and intersects with the data wiring 205, and is branched from both sides of the first common wiring 203. One common electrode 203a is formed in a direction parallel to the data line 205.

Here, the data line 205 and the first common electrode 203a are formed in a structure (bent structure) bent at a predetermined angle to secure a viewing angle.

In addition, a first storage electrode 206 is formed in an area adjacent to the gate wiring 201 and the gate electrode 201a, and the first storage electrode 206 is connected to the first common electrode 203a. have.

Therefore, a closed loop structure is formed integrally with the first common wiring 203, the first common electrode 203a, and the first storage electrode 206.

The second common line 213 is formed to overlap the center area of the first common line 203 formed in the unit pixel area, and is electrically connected to the first common line 203.

The second common electrode 213a is branched from the second common wire 213 along the unit pixel area.

The second common electrode 213a is also bent (folded) at a predetermined angle for a wide viewing angle and disposed in parallel with the first common electrode 203a and the data line 205.

The second storage electrode 207 for forming storage capacitance overlaps the first storage electrode 206, and the first pixel electrode 207a and the second pixel electrode are formed from the second storage electrode 207. 207a branches to the unit pixel region.

In particular, the first pixel electrode 207a is branched from the second storage electrode 207 and alternately disposed with the second common electrode 213a in the transmission region of the unit pixel region.

The first pixel electrode 207a is also bent at a predetermined angle.

In addition, the second pixel electrode 207b is formed to overlap the upper portion of the first common electrode 203a branched from the second storage electrode 207 and branched from the first common line 203.

That is, a storage capacitance is formed between the first storage electrode 206 and the second storage electrode 207, and an additional storage capacitance is also formed between the first common electrode 203a and the second pixel electrode 207b. The storage capacitance capacity is larger than before.

As such, as the storage capacitance in the unit pixel area increases, screen quality can be improved.

In addition, in the present invention, the liquid crystal silicon is used as the channel layer of the thin film transistor, thereby reducing the process burden by not performing a deposition process by PECVD.

4A to 4G are cross-sectional views illustrating a process of manufacturing a liquid crystal display device along the line II ′ of FIG. 3.

As shown in FIG. 4A, a metal film is deposited on the transparent insulating substrate 210 in the region I-I ′, and the gate wiring, the gate electrode 201a, and the first common wiring (not shown) according to the first mask process step. (See FIG. 3) and the first storage electrode 206.

As described above, when the gate electrode 201a, the gate wiring, the first storage electrode 206, the first common electrode and the first common wiring are formed on the insulating substrate 210 (see FIG. 3), shown in FIG. 4B. As described above, the gate insulating film 212 and the liquid silicon film 233 are formed over the entire region of the insulating substrate 210.

The liquid silicon film 233 uses silicon such as Si ₅ H ₁₀ (CyclopentaSilane).

When the gate insulating film 112 and the liquid silicon film 233 are formed on the insulating substrate 210, the liquid silicon film 233 is formed on the insulating substrate 210 as described above. Solvent and the like included in the film 233 may be removed to form a silicon film. Due to the heat treatment as described above, a silicon film is formed thinner than the thickness of the first liquid silicon film 233.

In addition, the gate insulating film 212 is deposited by the PECVD process, but the liquid silicon film 233 is formed on the entire surface of the insulating substrate 210 to reduce the process burden.

When the heat treatment process for the liquid silicon film 233 is completed as described above, as shown in FIG. 4C, a photoresist is coated on the entire surface of the insulating substrate 210, and the photoresist is exposed and developed according to a mask process to expose the gate electrode. A photoresist pattern 350 is formed on the silicon film 233a corresponding to 201a.

That is, the photoresist pattern 350 is formed in the region where the channel layer of the thin film transistor is to be formed.

However, another method of forming the photoresist pattern 350 may be formed by performing an exposure process using the gate electrode 201a formed on the insulating substrate 210 as an exposure mask. In this case, the gate electrode should be formed to consider the channel width. In addition, the use of such a method has the advantage of forming a photoresist pattern without using a mask process.

As described above, when the photoresist pattern 350 is formed on the insulating substrate 210, the conductive film 236 is formed on the entire surface of the insulating substrate 210.

The conductive layer 236 is a conductive layer serving as an ohmic contact layer for electrically contacting the source / drain electrodes and the channel layer region of the thin film transistor.

Usable as the conductive film 236 include PSG (Phospher-Silicate-Glass), or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ .

When the conductive film 236 is formed on the insulating substrate 210 as described above, as shown in FIG. 4D, a lift-off process and an annealing process are performed to remove the photoresist pattern.

The photoresist pattern is removed by the lift-off process to prevent the conductive film 236 from being formed in the channel layer region. Then, the insulating substrate 210 is subjected to an annealing process using a laser and a contact layer forming process. ) Is diffused perpendicularly to the silicon film 233a, thereby forming the channel layer 237a and the ohmic contact layer 237b. At this time, in the silicon film region where the conductive film is not formed, since annealing is performed by a laser, the channel layer 237a is formed by crystallization from polysilicon.

That is, the present invention has the advantage of simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor used in the liquid crystal display device.

In the annealing process and the contact layer forming process, the substrate is heated to a temperature range of 200 to 800 ° C. (usually 540 ° C.), and the wavelength 308 nm and the amount of energy are performed by irradiating a laser of 345 mJ / cm 2.

When the channel layer 237a and the ohmic contact layer 237b are formed on the insulating substrate 210 as described above, as shown in FIG. 4E, a metal film is formed on the entire surface of the insulating substrate 210, and a mask process is performed. The etching process is performed to form source / drain electrodes 217a and 217b and data lines.

Thus, the source electrode 217a and the drain electrode 217b are formed on the ohmic contact layer 237b to complete the thin film transistor.

As described above, when the source / drain electrodes 217a and 217b are formed, as shown in FIG. 4F, a protective film 209 is formed on the entire surface of the insulating substrate 210, and a portion of the drain electrode 217b is exposed. The contact hole process is performed.

As described above, when the contact hole process is completed, as shown in FIG. 4G, a transparent metal film such as ITO is formed on the entire surface of the insulating substrate 210, and then a mask process is performed to form the second storage electrode 207. The first pixel electrode 207a is formed.

In this case, the second pixel electrode, the second common wiring, and the second common electrode shown in FIG. 3 are patterned together.

In the present invention, there is an advantage in that the channel layer and the ohmic contact layer of the thin film transistor can be simultaneously formed.

As described in detail above, the present invention has the effect of simplifying the manufacturing process by simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor using liquid silicon.

In addition, the present invention has the effect of simplifying the manufacturing process and reducing the production cost by simultaneously forming the channel layer and the ohmic contact layer of the thin film transistor of the liquid crystal display using liquid silicon.

In addition, since the channel layer and the ohmic contact layer of the thin film transistor can be formed without the PECVD process, the present invention has an effect of reducing the process burden.

The present invention is not limited to the above-described embodiments, and various changes can be made by those skilled in the art without departing from the gist of the present invention as claimed in the following claims.

Claims (17)

A gate electrode; A gate insulating film formed on the gate electrode; A channel layer formed on the gate insulating layer corresponding to the gate electrode, and an ohmic contact layer formed on both sides of the channel layer; And And a source / drain electrode formed on the ohmic contact layer and covering the entire area of the ohmic contact layer. The thin film transistor of claim 1, wherein the channel layer is made of Si ₅ H ₁₀ (CyclopentaSilane). The thin film transistor of claim 1, wherein the ohmic contact layer comprises any one of PSG (Phospher-Silicate-Glass) or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ . Forming a gate electrode on the substrate;  Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a liquid silicon film; Forming a photoresist pattern in the channel region on the liquid silicon; Forming a conductive film on an entire surface of the substrate on which the photoresist pattern is formed; Performing a lift-off process of removing the photoresist pattern to expose a channel region; Simultaneously forming an ohmic contact layer and a channel layer in the channel region; And And forming a metal film on the substrate on which the ohmic contact layer and the channel layer are formed, and then etching to form a source / drain electrode. The method of claim 4, wherein the liquid silicon film is formed by coating the entire surface of the substrate. The method of claim 4, wherein the liquid silicon film is made of Si ₅ H ₁₀ (CyclopentaSilane). The method of claim 4, wherein the conductive film is any one of PSG (Phospher-Silicate-Glass) or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ . The method of claim 4, wherein the ohmic contact layer is formed in the channel region by diffusing the conductive layer on the liquid silicon layer. 5. The method of claim 4, wherein the step of simultaneously forming an ohmic contact layer and a channel layer in the channel region comprises heating the substrate in a temperature range of 200 to 800 ° C, irradiating a laser having a wavelength of 308 nm and an energy of 345 mJ / cm < 2 > A thin film transistor manufacturing method comprising the step of. The method of claim 4, wherein the photoresist pattern is formed by exposing and developing the gate electrode as a mask. Forming a gate electrode and a gate wiring on the substrate;  Forming a gate insulating film on the entire surface of the substrate on which the gate electrode is formed, and subsequently forming a liquid silicon film; Forming a photoresist pattern in the channel region on the liquid silicon; Forming a conductive film on an entire surface of the substrate on which the photoresist pattern is formed; Performing a lift-off process of removing the photoresist pattern to expose a channel region; Simultaneously forming an ohmic contact layer and a channel layer in the channel region; And Forming a metal film on the substrate on which the ohmic contact layer and the channel layer are formed and then etching to form source / drain electrodes and data lines; Forming a protective film on the substrate on which the source / drain is formed; And And forming a pixel electrode on the passivation layer, and then forming a pixel electrode. 12. The method of claim 11, wherein the liquid silicon film is formed by coating the entire surface of the substrate. The method of claim 11, wherein the liquid silicon film is made of Si ₅ H ₁₀ (CyclopentaSilane). The method of claim 11, wherein the conductive film is any one of PSG (Phospher-Silicate-Glass) or an amorphous silicon film doped with ITO metal, N ⁺ or P ⁺ . 12. The method of claim 11, wherein the ohmic contact layer is formed in the channel region by diffusing the conductive layer on the liquid silicon layer. The process of claim 11, wherein the step of simultaneously forming the ohmic contact layer and the channel layer in the channel region comprises heating the substrate in a temperature range of 200 to 800 ° C, irradiating a laser having a wavelength of 308 nm and an energy of 345 mJ / cm < 2 > Liquid crystal display device manufacturing method comprising the step of. The method of claim 11, wherein the photoresist pattern is formed by exposing and developing the gate electrode as a mask.

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