KR20060036733A - Method for fabrication of semiconductor device - Google Patents

Abstract

The present invention is to provide a method for manufacturing a semiconductor device that can minimize the pattern deformation during the pattern forming process for device isolation, the present invention for solving the above problems, the present invention is a hard on a substrate Forming an insulating film for a mask; Forming a device isolation photoresist pattern on the hard mask insulating layer; Forming a hard mask by etching the insulating layer for hard mask under a chamber pressure of at least 200 mTorr using the photoresist pattern as an etching mask; Removing the photoresist pattern; And forming a trench by etching the substrate using the hard mask as an etching mask.

ArF, F2, device isolation, hard mask, pattern modification.

Description

Semiconductor device manufacturing method {METHOD FOR FABRICATION OF SEMICONDUCTOR DEVICE}             

1 is a cross-sectional view of a semiconductor device in which trenches for forming device isolation films are formed.

2 is a cross-sectional view of a semiconductor device in which a narrow trench for forming an isolation layer is formed.

3A to 3C are cross-sectional views illustrating a device isolation formation process of a semiconductor device using an F ₂ or ArF exposure source according to an embodiment of the present invention.

4 is a planar SEM photograph corresponding to FIG. 3A.

Figure 5a is a SEM photograph showing the process plane in the case of applying a conventional pressure condition when forming a hard mask.

Figure 5b is a SEM photograph showing the process plane in the case of applying a pressure condition of 100mTorr when forming the hard mask.

Figure 5c is a SEM photograph showing the process plane when applying a pressure condition of 300mTorr when forming the hard mask.

* Explanation of symbols for the main parts of the drawings                 

300: substrate 301a: pad

302a: hardmask 305: trench

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a pattern formation method of a semiconductor device. More particularly, the pattern formation of a semiconductor device using a more advanced exposure source such as F ₂ or argon fluoride (ArF), etc. It is about a method.

Since the microfabrication technology that has supported the progress of semiconductor devices is a photolithography technology, it is no exaggeration to say that the improvement in resolution of the technology is directly connected to the future of high integration of semiconductor devices.

The photolithography process is, as is well known, by etching a layer to be etched through a process of forming a photoresist pattern and an etching process using the photoresist pattern as an etch mask, for example, a line of a pattern such as a contact hole or a gate electrode. A process of forming a pattern or the like, wherein the photoresist pattern is a process of applying the photoresist on the etched layer, a process of selectively exposing the photoresist using a prepared exposure mask and a predetermined chemical solution, or Through a developing process to remove unexposed portions of the photoresist.                         

On the other hand, the critical dimension of the pattern that can be implemented by the photolithography process (hereinafter referred to as CD) depends on the wavelength of the light source used in the above exposure process. This is because the CD of the actual pattern is determined by the width of the photoresist pattern that can be realized through the exposure process.

One of the key challenges of the photolithography process using an ArF exposure source and the photolithography process technology using an F ₂ exposure source is the development of a photoresist for F ₂ or ArF. Although F ₂ or ArF is a chemically amplified type such as KrF, it is necessary to fundamentally improve the material. Particularly, development of ArF photoresist material is difficult because benzene rings cannot be used. Benzene rings have been used in photoresists for i-rays and KrF to ensure dry etching resistance. However, for example, when the benzene ring is used in the ArF photoresist, since the absorbance is large at 193 nm, which is the wavelength region of the ArF laser, the transparency is poor and the exposure to the lower portion of the photoresist is impossible. For this reason, research has been conducted on materials that can secure dry etching resistance without having a benzene ring, have good adhesion, and can be developed with 2.38% TMAH (Tetra Methyl Ammonium Hydroxide). To date, many companies and research institutes around the world have been publishing their research results, and the commercialized products are still in the form of polymers of COMA (CycloOlefin-Maleic Anhydride) or Acrylate series, or a mixture thereof. However, the photoresist has a benzene structure.

Therefore, when the KrF photolithography process is applied, the deformation of the mask pattern is hardly generated, whereas when the ArF photolithography process is applied, the deformation of the mask pattern such as striation may be confirmed.

The application of the ArF photolithography process is essential for devices of 80 nm and below, and the deposition thickness of the photoresist should be further reduced in addition to the application of the ArF photolithography process.

This high resolution photolithography process is also applied to the isolation process.

The device isolation process, that is, the device isolation film forming process includes etching the pad insulating film, etching the substrate, and removing the photoresist pattern.

1 is a cross-sectional view of a semiconductor device in which trenches for forming an isolation layer are formed.

Referring to FIG. 1, the trench 102 is formed by etching the substrate 100 using the pad 101 as an etching mask. In a design rule that requires a line width of 70 nm or less, the thickness of the photoresist pattern is inevitably reduced to achieve high resolution, and the thin photoresist pattern does not function properly as an etching mask. Attack 101 occurs.

2 is a cross-sectional view of a semiconductor device in which a narrow trench for forming an isolation layer is formed.

When the device isolation process is performed, as shown in FIG. 2, the width of the trench 102 is often narrow. In this case, when the etching process is performed to minimize the pattern deformation of the photoresist pattern, the etching stops as shown in 'B'. Occurs when the desired trench is not formed.

In order to overcome the limitation of the photoresist pattern as an etching mask, a hard mask using a nitride film or the like has been introduced and used.

However, the deformation of the pattern in the hard mask etching process performed at a pressure of about 50 mTorr is still observed.

On the other hand, the introduction of a metallic hard mask such as tungsten, which is used in the sand portion of the gate electrode or bit line, etc. may be considered, but the device isolation process is a non-metallic process, it is practically impossible to use the metallic hard mask.

The present invention proposed to solve the problems of the prior art as described above, an object of the present invention to provide a method for manufacturing a semiconductor device that can minimize the pattern deformation during the pattern formation process for device separation.

In order to solve the above problems, the present invention comprises the steps of forming an insulating film for a hard mask on the substrate; Forming a device isolation photoresist pattern on the hard mask insulating layer; Forming a hard mask by etching the insulating layer for hard mask under a chamber pressure of at least 200 mTorr using the photoresist pattern as an etching mask; Removing the photoresist pattern; And forming a trench by etching the substrate using the hard mask as an etching mask.

The present invention complements the characteristics of the photoresist pattern as an etching mask by using a nitride film as a hard mask during the trench formation process for device isolation. In addition, the pattern pressure is minimized by advancing the process pressure to a high pressure of 200 mTorr or more during hard mask etching, in which pattern deformation occurs most frequently.

In addition, by maintaining the flow rate (CF) of the etching gas CF ₄ or more to 150SCCM, the deformation of the device isolation pattern due to the loss of the hard mask is minimized.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can more easily implement the present invention.

3A to 3C are cross-sectional views illustrating a device isolation forming process of a semiconductor device using an F ₂ or ArF exposure source according to an embodiment of the present invention, which will be described in detail with reference to the drawings.

First, as shown in FIG. 3A, a pad insulating film 301 is formed on a substrate 300 on which various elements for forming a semiconductor device are formed. Then, a substrate that is an insulating material and an etched layer is formed on the pad insulating film 301. A hard mask nitride film 302 is formed using a thin film such as Si ₃ N ₄ or SiON, which has a selectivity of 300 and is used as a hard mask material.

The pad insulating film 301 includes a structure in which an oxide film and a nitride film are laminated, a single structure of an oxide film, or a single structure of a nitride film.

Subsequently, due to the high light reflectivity of the lower portion during exposure for forming the pattern on the hard mask nitride film 302 during the etching process, that is, the hard mask nitride film 302, high reflection is prevented from forming an unwanted pattern. An antireflection film 303 is formed for the purpose of improving the adhesion between the hard mask nitride film 302 and the subsequent photoresist.

Here, the anti-reflection film 303 may use an organic material similar to the photoresist and its etching characteristics, or may use an inorganic group such as SiON.

Subsequently, a photoresist for an F ₂ exposure source or an ArF exposure source, for example, COMA or acrylate, is used on the antireflection film 303, and these are coated to a suitable thickness by a method such as spin coating, followed by F ₂ exposure. A portion of the photoresist is selectively exposed using a circle or ArF exposure source and a predetermined reticle (not shown) for defining the gate electrode width, and the portion exposed or not exposed by the exposure process through a developing process. Next, the photoresist pattern 304 is formed by removing the etching residues and the like through a post-cleaning process or the like.

4 is a planar SEM photograph corresponding to FIG. 3A.                     

Referring to FIG. 4, it can be seen that the photoresist pattern 304 defining the device isolation region ISO is formed.

As shown in FIG. 3B, the anti-reflection film 303 is selectively etched through a selective etching process using the photoresist pattern 304 as an etching mask.

In this case, in order to minimize the loss of the photoresist pattern 304, an etching process is performed using a plasma using a chlorine-based gas such as Cl ₂ , BCl ₃ , CCl _4, or HCl, or C when using a CF-based gas. It is preferable to perform the etching process using a plasma using any one gas selected from the group consisting of a gas having a low / F ratio, such as CF ₄ , C ₂ F ₂ , CHF ₃ and CH ₂ F ₂ .

This is because the CD should be easily controlled during the anti-reflection film 303, so that the etching may be performed under conditions that hardly generate polymer.

Next, the hard mask nitride film 302 is etched using the photoresist pattern 303 as an etch mask to form a hard mask 302a.

A photoresist strip process is performed to remove the photoresist pattern 304. When the anti-reflection film 303 is an organic group, the anti-reflection film 303 is removed at the same time as the photoresist pattern 304. A cleaning process is performed to remove the residue.

In the etching process for forming the hard mask 302a, CF ₄ is used as the stock angle gas. CHF ₃ , O _2, and Ar are added thereto.

5A is a SEM photograph showing a process plane when a conventional pressure condition is applied when a hard mask is formed.

Referring to FIG. 5A, as a result of performing the hard mask 302a etching process under the pressure of the chamber, that is, 50 mTorr, as shown in FIG. 5A, it can be seen that deformation occurs as 'C' in the side portion of the hard mask 302a.

FIG. 5B is a SEM photograph showing a process plane when a pressure condition of 100 mTorr is applied when a hard mask is formed. FIG.

Referring to FIG. 5B, although the deformation of the pattern is less than that of performing the hard mask 302a etching process under 50 mTorr as shown in FIG. 5A, even when the pressure is 100 mTorr, the side portion of the hard mask 302a is 'D'. You can see that the transformation still occurs.

FIG. 5C is a SEM photograph showing a process plane when a pressure condition of 300 mTorr is applied when forming a hard mask. FIG.

Referring to FIG. 5C, the pattern deformation is considerably reduced than the hard mask 302a etching process is performed under a pressure of 100 mTorr as shown in FIGS. 5A and 5B, so that at the side portion of the hard mask 302a such as 'E'. It can be seen that deformation hardly occurs.

It was confirmed through experiment that the minimum pressure of the chamber that can minimize the pattern deformation, it is preferable to perform the etching process of the hard mask 302a under the pressure of 200mTorr ~ 500mTorr in the chamber.                     

In the above-described embodiment, the nitride film is used as the material of the hard mask 302a, but an oxide film and a nitride film may be stacked or a nitride / oxide / nitride film structure may be used.

In case of using the nitride structure alone, the thickness of the hard mask 302a remaining after the subsequent trench etching is greatly changed at the front of the wafer, so that the thickness of the moat and the effective field oxide height in the subsequent process is increased. It has a direct impact. Therefore, it is also preferable to use a nitride film / oxide film / nitride film.

Increasing the flow amount of CF ₄ , the main etching gas during the etching process, can minimize pattern deformation. At this time, it was confirmed through experiments that when the flow amount of CF ₄ or more to 150SCCM can almost prevent the deformation of the pattern.

Even if the thickness of the hard mask 302a is increased, pattern deformation can be minimized by adjusting the pressure of the chamber and the flow amount of CF ₄ gas as described above.

As illustrated in FIG. 3C, the pad insulating layer 301 is etched using the hard mask 302a as an etch mask to form the pad 301a, and then the substrate 300 is etched to form the trench 305.

On the other hand, although not shown in the drawing, a device isolation process is completed by depositing a high density plasma (HDP) oxide film or the like on the entire surface to fill the trench 305 and then performing a planarization process.

The present invention made as described above, using the nitride film as a hard mask during the trench formation process for device isolation to compensate for the characteristics of the photoresist pattern as an etching mask, and to reduce the process pressure during the hard mask etching that the pattern deformation occurs the most In the high pressure of 200mTorr or more, and by maintaining the flow amount of the stock gas gas CF ₄ or more than 150SCCM, it was found through the embodiment that the deformation of the device isolation pattern due to the loss of the hard mask can be minimized.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

The present invention described above can prevent deformation and loss of the pattern during the device separation process using a photolithography process using an exposure source such as F ₂ or ArF, and thus, the yield of semiconductor devices can be greatly improved. .

Claims (5)

Forming an insulating film for a hard mask on the substrate; Forming a device isolation photoresist pattern on the hard mask insulating layer; Forming a hard mask by etching the insulating layer for hard mask under a chamber pressure of at least 200 mTorr using the photoresist pattern as an etching mask; Removing the photoresist pattern; And Forming a trench by etching the substrate using the hard mask as an etch mask Semiconductor device manufacturing method comprising a. The method of claim 1, The hard mask insulating film is a semiconductor device manufacturing method characterized in that it comprises any one of an oxide film, a nitride film or a laminated structure of the oxide film and the nitride film. The method according to claim 1 or 2, Forming a hard mask, and using CF ₄ as a stock angle gas, and using the CF ₄ gas in a flow amount of at least 150 SCCM. The method of claim 3, wherein In the step of forming the hard mask, the semiconductor device manufacturing method characterized in that it further comprises CHF ₃ , O ₂ and Ar gas in the stock gas. The method of claim 1, In the step of forming the photoresist pattern, a semiconductor device manufacturing method characterized in that using an ArF or F ₂ photolithography process.

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