KR20050009407A - Method for forming pattern in semiconductor device using ArF light source - Google Patents
Method for forming pattern in semiconductor device using ArF light source Download PDFInfo
- Publication number
- KR20050009407A KR20050009407A KR1020030048709A KR20030048709A KR20050009407A KR 20050009407 A KR20050009407 A KR 20050009407A KR 1020030048709 A KR1020030048709 A KR 1020030048709A KR 20030048709 A KR20030048709 A KR 20030048709A KR 20050009407 A KR20050009407 A KR 20050009407A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- forming
- barc
- pattern
- film
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 33
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 32
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 21
- 238000000206 photolithography Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000006117 anti-reflective coating Substances 0.000 claims abstract description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 8
- 229910052731 fluorine Inorganic materials 0.000 claims description 8
- 239000011737 fluorine Substances 0.000 claims description 8
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- -1 tungsten nitride Chemical class 0.000 claims description 3
- 229910010272 inorganic material Inorganic materials 0.000 claims description 2
- 239000011147 inorganic material Substances 0.000 claims description 2
- 239000011368 organic material Substances 0.000 claims description 2
- 230000007261 regionalization Effects 0.000 claims 1
- 230000007547 defect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0275—Photolithographic processes using lasers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
본 발명은 반도체 소자의 패턴 형성방법에 관한 것으로, 보다 구체적으로 ArF 광원을 이용하여 반도체 소자의 패턴을 형성하는 방법에 관한 것이다.The present invention relates to a method of forming a pattern of a semiconductor device, and more particularly to a method of forming a pattern of a semiconductor device using an ArF light source.
최근, 반도체 집적 회로는 고집적화가 진행되어, 집적 회로의 최소 선폭이 서브 하프 마이크론 영역에 이르게 되었다. 이러한 미세화를 뒷받침하는 리소그라피 기술은, 피식각층이 형성된 기판상에 레지스트막을 도포하는 공정, 레지스트막을 노광시키는 공정, 노광된 레지스트막을 현상하여 레지스트 패턴을 형성하는 공정, 레지스트 패턴을 이용하여 피 식각층을 식각하는 공정을 포함한다.In recent years, semiconductor integrated circuits have been highly integrated, and the minimum line width of the integrated circuits has reached the sub-half micron region. Lithography technology to support such miniaturization includes applying a resist film on a substrate on which an etched layer is formed, exposing a resist film, developing a resist pattern by developing an exposed resist film, and forming an etched layer using a resist pattern. Etching process is included.
현재에는 0.1㎛ 이하의 미세 패턴을 형성하는 리소그라피 공정이 요구되고 있으며, 이러한 미세화를 도모하기 위하여 단파장을 갖는 광원이 요구된다. 이러한 광원으로는 ArF 광원(193nm), F2 엑시머 레이저(157nm), X 선 및 전자선 등이 있으며, 그중 ArF 광원이 해상도 면에서 가장 우수하다.At present, there is a need for a lithography process for forming a fine pattern of 0.1 µm or less, and a light source having a short wavelength is required to achieve such miniaturization. Such light sources include ArF light sources (193 nm), F2 excimer lasers (157 nm), X-rays and electron beams, among which ArF light source is the best in terms of resolution.
그러나, 일반적인 레지스트 물질에 ArF 광원을 조사하게 되면, 수지내의 방향환이 광을 흡수하기 때문에 투과율이 극단적으로 약화되는 문제점이 있다.However, when the ArF light source is irradiated to a general resist material, the transmittance is extremely weakened because the aromatic ring in the resin absorbs light.
이에 따라, 현재에는 ArF 광원을 사용하는 경우는 ArF 광원에 대하여 높은 해상력을 갖는 레지스트 물질을 사용하고 있다.Accordingly, in the case of using an ArF light source, a resist material having a high resolution with respect to the ArF light source is currently used.
그러나, 이러한 ArF용 레지스트 물질은 근본적으로 단단하지 못하고, 식각 가스에 대한 내성이 낮기 때문에, 식각 공정시 특히 불소(F) 성분을 포함하는 식각 가스에 의해 쉽게 변형되고, 이로 인하여, 하부의 하드 마스크막의 형태까지 변형시키게 된다. 이로 인하여 패턴 결함을 야기한다. 도 1a 및 도 1b는 ArF용 레지스트를 마스크로 해서 불소 포함 가스에 의해 피식각층을 식각하였을 때의 패턴 사진이다. 도 1a는 패턴이 조밀하게 배치된 영역을 나타내고, 도 1b는 패턴이 독립적으로 배치된 영역을 나타내며, 각각 패턴이 변형되거나 붕괴(collapse)됨을 보여준다.However, since the ArF resist material is not fundamentally hard and has low resistance to the etching gas, it is easily deformed by the etching gas including the fluorine (F) component during the etching process, and thus, the lower hard mask It even changes the shape of the membrane. This causes pattern defects. 1A and 1B are pattern photographs when the etching target layer is etched by a fluorine-containing gas using the ArF resist as a mask. FIG. 1A shows the areas where the patterns are densely arranged, and FIG. 1B shows the areas where the patterns are arranged independently, showing that the patterns deform or collapse, respectively.
따라서, 본 발명의 목적은 패턴 변형 및 붕괴를 방지할 수 있는 ArF 광원을 이용한 반도체 소자의 패턴 형성방법을 제공하는 것이다.Accordingly, an object of the present invention is to provide a method of forming a pattern of a semiconductor device using an ArF light source capable of preventing pattern deformation and collapse.
도 1a 및 도 1b는 종래의 불소 포함 가스를 이용하여 식각을 진행하였을 때 패턴 결함이 일어난 상태를 보여주는 사진.1A and 1B are photographs showing a state where a pattern defect occurs when etching is performed using a conventional fluorine-containing gas.
도 2는 본 발명에 따른 반도체 소자의 패턴 형성방법을 설명하기 위한 단면도.2 is a cross-sectional view illustrating a method of forming a pattern of a semiconductor device according to the present invention.
도 3a 및 도 3b는 본 발명과 같이 Cl2/Ar 혼합 가스를 이용하여 패턴을 식각하였을 때, 반도체 패턴을 보여주는 사진.3A and 3B are photographs showing a semiconductor pattern when the pattern is etched using the Cl 2 / Ar mixed gas as in the present invention.
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
10 : 반도체 기판 20 : 피식각층10 semiconductor substrate 20 etching target layer
30 : 하드 마스크막 40 : BARC막30: hard mask film 40: BARC film
50 : 포토레지스트 패턴50: photoresist pattern
본 발명의 목적과 더불어 그의 다른 목적 및 신규한 특징은, 본 명세서의 기재 및 첨부 도면에 의하여 명료해질 것이다.Other objects and novel features as well as the objects of the present invention will become apparent from the description of the specification and the accompanying drawings.
본원에서 개시된 발명중, 대표적 특징의 개요를 간단하게 설명하면 다음과 같다.Among the inventions disclosed herein, an outline of representative features is briefly described as follows.
본 발명은, 우선, 반도체 기판상에 피식각층을 형성하고, 상기 피식각층 상부에 BARC(bottom anti reflective coating)막을 형성한다. 그후, 상기 BARC막 상부에 ArF광 리소그라피 공정에 의하여 포토레지스트 패턴을 형성하고, 상기 포토레지스트 패턴의 형태로 BARC막을 Cl2/Ar 가스로 식각한다. 상기 패터닝된 BARC막을 마스크로 해서 하부의 피식각층을 패터닝하여, 패턴을 형성한다.In the present invention, first, an etching target layer is formed on a semiconductor substrate, and a BARC (bottom anti reflective coating) film is formed on the etching target layer. Thereafter, a photoresist pattern is formed on the BARC film by an ArF optical lithography process, and the BARC film is etched with Cl 2 / Ar gas in the form of the photoresist pattern. By using the patterned BARC film as a mask, the underlying etching layer is patterned to form a pattern.
상기 피식각층을 형성하는 단계와, 상기 BARC막을 형성하는 단계 사이에 하드 마스크막을 형성하는 단계를 더 포함한다. 상기 하드 마스크막은 텅스텐, 티타늄, 티타늄 질화막, 알루미늄 및 텅스텐 질화막 중 선택되는 하나이다. 또한, 상기 하드 마스크막은 상기 Cl2/Ar 가스에 의하여 BARC막 식각시, 상기 포토레지스트 패턴이 유실되지 않을때까지 일부 식각된다.And forming a hard mask layer between the forming of the etching target layer and the forming of the BARC layer. The hard mask film is one selected from tungsten, titanium, titanium nitride film, aluminum and tungsten nitride film. In addition, the hard mask layer is partially etched until the photoresist pattern is not lost when the BARC layer is etched by the Cl 2 / Ar gas.
상기 BARC막을 Cl2/Ar 가스로 식각하는 단계와, 상기 패터닝된 BARC막을 마스크로 해서 하부의 피식각층을 패터닝하는 단계 사이에, 상기 포토레지스트 패턴을 제거하는 단계를 더 포함한다. 상기 패터닝된 BARC막을 마스크로 해서 하부의 피식각층을 패터닝하는 단계는 불소 포함 가스를 식각 가스로 하여 진행한다.And removing the photoresist pattern between etching the BARC film with Cl 2 / Ar gas and patterning a lower etched layer using the patterned BARC film as a mask. The patterning of the underlying etching layer using the patterned BARC film as a mask is performed by using a fluorine-containing gas as an etching gas.
상기 Cl2/Ar의 혼합 가스에 O2가스를 더 첨가할 수 있다.O 2 gas may be further added to the mixed gas of Cl 2 / Ar.
상기 BARC막은 유기물 또는 무기물일 수 있고, 상기 피식각층은 절연막 또는 도전층일 수 있다.The BARC film may be an organic material or an inorganic material, and the etched layer may be an insulating film or a conductive layer.
(실시예)(Example)
이하 첨부한 도면에 의거하여 본 발명의 바람직한 실시예를 설명한다.Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
도 2는 본 발명에 따른 반도체 소자의 패턴 형성방법을 설명하기 위한 단면도이다.2 is a cross-sectional view illustrating a method of forming a pattern of a semiconductor device according to the present invention.
도 2에 도시된 바와 같이, 반도체 기판(10)상에 피식각층(20)을 형성하고, 피식각층(20) 상부에 하드 마스크막(30)을 형성한다. 이때, 피식각층(20)은 실리콘 산화막 및 실리콘 질화막과 같은 절연막 또는 폴리실리콘막 및 금속층과 같은 도전층일 수 있다. 하드 마스크막(30)은 피식각층(20)상에 선택적으로 제공될 수 있으며, 예를 들어 텅스텐, 티타늄, 티타늄 질화막, 알루미늄, 텅스텐 질화막 등이 이용될 수 있고, 약 500 내지 1000Å 두께로 증착할 수 있다. 본 실시예에서는 예를 들어 하드 마스크막(30)을 채용한 경우에 대하여 설명한다.As shown in FIG. 2, an etched layer 20 is formed on the semiconductor substrate 10, and a hard mask layer 30 is formed on the etched layer 20. In this case, the etched layer 20 may be an insulating layer such as a silicon oxide layer and a silicon nitride layer or a conductive layer such as a polysilicon layer and a metal layer. The hard mask layer 30 may be selectively provided on the etched layer 20. For example, tungsten, titanium, titanium nitride, aluminum, tungsten nitride, or the like may be used, and the hard mask layer 30 may be deposited to a thickness of about 500 to 1000 mm. Can be. In the present embodiment, a case where the hard mask film 30 is adopted is described, for example.
하드 마스크막(30) 상부에 BARC(bottom anti reflective coating)막(40)을 스핀 코팅 방식에 의해 형성한다. BARC막(40)은 명칭에서 의미하는 바와 같이 이후 진행될 포토리소그라피 공정시 난반사를 방지하기 위하여 제공되며, BARC막(40)은 유기물 또는 무기물일 수 있다. BARC막(40) 상부에 패턴을 한정하기 위한 포토레지스트 패턴(50)을 공지의 포토리소그라피 방식으로 형성한다. 상기 포토리소그라피 공정의 광원으로는 ArF 광원이 이용되고, 포토레지스트 패턴(50) 역시 ArF 광원용 레지스트가 이용된다.A bottom anti reflective coating (BARC) film 40 is formed on the hard mask film 30 by a spin coating method. As the name implies, the BARC film 40 is provided to prevent diffuse reflection in a subsequent photolithography process, and the BARC film 40 may be organic or inorganic. A photoresist pattern 50 for defining a pattern on the BARC film 40 is formed by a known photolithography method. As the light source of the photolithography process, an ArF light source is used, and the photoresist pattern 50 also uses an ArF light source resist.
그후, 포토레지스트 패턴(50)을 마스크로 하여, 하부의 BARC막(40)을 식각한다. 하부 BARC막(40)을 식각하는데 이용되는 식각 가스로는 포토레지스트 패턴(50)이 유실이 최소화할 수 있도록 종래의 불소(F) 포함 가스 대신 Cl2/Ar의 혼합 가스가 이용된다. Cl2/Ar의 혼합 가스에 의한 식각 공정은 하부 BARC막(40)을 식각하는데 그치지 않고, 그 하부의 하드 마스크막(30)도 일부 식각할 수 있는데, 단, 포토레지스트 패턴(50)이 유실되지 않을 범위까지 진행한다. 이때, 상기 Cl2/Ar의 혼합 가스에 O2가스를 선택적으로 혼합시킬 수 있다.Thereafter, the lower BARC film 40 is etched using the photoresist pattern 50 as a mask. As an etching gas used to etch the lower BARC layer 40, a mixed gas of Cl 2 / Ar is used instead of the conventional fluorine (F) -containing gas so that the loss of the photoresist pattern 50 can be minimized. The etching process using the mixed gas of Cl 2 / Ar does not only etch the lower BARC film 40, but also the lower hard mask film 30 may be partially etched, provided that the photoresist pattern 50 is lost. Proceed to the extent that it will not. In this case, O 2 gas may be selectively mixed with the mixed gas of Cl 2 / Ar.
그후, 잔류하는 포토레지스트 패턴(50)을 제거한다음, 패터닝된 BARC막(40)을 마스크로 하여, 하부의 잔류의 하드 마스크막(30) 및 피식각층을 식각한다. 이때, 식각 공정은 이미 포토레지스트 패턴(50)이 제거된 후이므로, 불소를 포함하는 가스 CF4, CHF3, SF6가스를 이용하여 진행할 수 있다.Thereafter, the remaining photoresist pattern 50 is removed, and then the remaining hard mask film 30 and the etched layer are etched using the patterned BARC film 40 as a mask. In this case, since the etching process is already removed after the photoresist pattern 50, the etching process may be performed using the gas CF 4 , CHF 3 , SF 6 gas containing fluorine.
이와같이, Cl2/Ar의 혼합 가스를 이용하여 식각 공정을 진행하면, 도 3a 및 도 3b와 같이 패턴 결함이 없는 라인 패턴을 형성할 수 있다.As such, when the etching process is performed using the mixed gas of Cl 2 / Ar, a line pattern without a pattern defect may be formed as shown in FIGS. 3A and 3B.
이상에서 자세히 설명한 바와 같이, 본 발명에 의하면, ArF 광원 및 ArF 광원용 포토레지스트 패턴을 이용하여 패턴 형성을 위한 식각 공정시, 1차적으로 포토레지스트 패턴과 식각 선택비가 우수한 Cl2/Ar의 혼합 가스를 이용하여 식각을 진행한 후, 상기 가스에 의해 패터닝된 식각물을 마스크로 하여 2차적으로 불소를 포함하는 가스로 피식각층을 식각한다.As described in detail above, according to the present invention, in the etching process for forming the pattern using the ArF light source and the photoresist pattern for the ArF light source, a mixed gas of Cl 2 / Ar having an excellent photoresist pattern and an etch selectivity primarily After etching is performed, the etching target layer is etched with a gas containing fluorine secondary using the etching patterned by the gas as a mask.
이에따라, ArF 포토레지스트 패턴의 유실을 방지하여, 패턴 변형 및 패턴 붕괴를 방지할 수 있다.Accordingly, the loss of the ArF photoresist pattern can be prevented, so that pattern deformation and pattern collapse can be prevented.
기타 본 발명의 요지를 변경하지 않는 범위에서 다양하게 변경 실시할 수 있다.Other changes can be made without departing from the spirit of the invention.
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020030048709A KR20050009407A (en) | 2003-07-16 | 2003-07-16 | Method for forming pattern in semiconductor device using ArF light source |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020030048709A KR20050009407A (en) | 2003-07-16 | 2003-07-16 | Method for forming pattern in semiconductor device using ArF light source |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20050009407A true KR20050009407A (en) | 2005-01-25 |
Family
ID=37222139
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020030048709A KR20050009407A (en) | 2003-07-16 | 2003-07-16 | Method for forming pattern in semiconductor device using ArF light source |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR20050009407A (en) |
-
2003
- 2003-07-16 KR KR1020030048709A patent/KR20050009407A/en not_active Application Discontinuation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6524964B2 (en) | Method for forming contact by using ArF lithography | |
| US7358111B2 (en) | Imageable bottom anti-reflective coating for high resolution lithography | |
| TWI305013B (en) | Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication | |
| US6630288B2 (en) | Process for forming sub-lithographic photoresist features by modification of the photoresist surface | |
| JP2003051443A (en) | Method of forming fine pattern in semiconductor device | |
| KR20070007090A (en) | Reticle fabrication using a removable hard mask | |
| KR20040094706A (en) | Self-aligned pattern formation using dual wavelengths | |
| US6100010A (en) | Photoresist film and method for forming pattern thereof | |
| KR20030044476A (en) | A forming method of pattern using ArF photolithography | |
| KR20030002145A (en) | Method for forming pattern in semiconductor device | |
| US7399709B1 (en) | Complementary replacement of material | |
| US7294908B2 (en) | Method of forming a gate pattern in a semiconductor device | |
| US6015640A (en) | Mask fabrication process | |
| KR20050009407A (en) | Method for forming pattern in semiconductor device using ArF light source | |
| KR100902100B1 (en) | Method for forming fine pattern in semiconductor device | |
| KR100853461B1 (en) | Method for forming patterns in semiconductor device using ArF light source | |
| KR100510616B1 (en) | Patterning and etching method in a semiconductor manufacturing process | |
| KR20030050172A (en) | Method for forming a photo resist pattern of semiconductor device | |
| KR100350762B1 (en) | Formation method of micropattern | |
| KR20030001134A (en) | A forming method of self align contact | |
| KR20030058247A (en) | A forming method of semiconductor device with improved protection of pattern deformation | |
| TW505978B (en) | Residue-free bi-layer lithographic process | |
| KR100265361B1 (en) | Method for improving etching selectivity of photoresist | |
| KR20050052658A (en) | Method for forming fine patterns of semiconductor device | |
| KR20000045425A (en) | Method for fabricating fine pattern |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Withdrawal due to no request for examination |