KR20020007576A - Chip-on-board type memory card - Google Patents
Chip-on-board type memory card Download PDFInfo
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- KR20020007576A KR20020007576A KR1020000040939A KR20000040939A KR20020007576A KR 20020007576 A KR20020007576 A KR 20020007576A KR 1020000040939 A KR1020000040939 A KR 1020000040939A KR 20000040939 A KR20000040939 A KR 20000040939A KR 20020007576 A KR20020007576 A KR 20020007576A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
Abstract
Description
본 발명은 칩 온 보드 타입의 메모리 카드에 관한 것으로, 더욱 상세하게는 적어도 두 개 이상의 반도체 칩이 실장되는 메모리 카드에 외부 장치와 메모리 카드를 전기적으로 연결시키는 접속영역을 메모리용 반도체 칩들과 대응되는 개수만큼 형성하여 각각의 메모리용 반도체 칩이 독립적인 기능을 갖도록 하고, 메모리 카드의 불량률을 저하시키는 칩 온 보드 타입의 메모리 카드에 관한 것이다.The present invention relates to a chip on board type memory card, and more particularly, a connection area for electrically connecting an external device and a memory card to a memory card on which at least two semiconductor chips are mounted corresponds to the semiconductor chips for memory. The present invention relates to a chip-on-board type memory card which is formed in number so that each memory semiconductor chip has an independent function and reduces the defective rate of the memory card.
최근, 각종 전자기술의 발달로 인해 다량의 정보를 하나의 카드에 집적시킨 메모리 카드가 개발되었다. 이러한 메모리 카드는 크기가 작고 두께가 얇아 소지가 편리할 뿐만 아니라, 정보처리과정이 소정의 전산 입·출력 과정을 통해 자동으로 이루어져 사용이 날로 급증하는 추세에 있다.Recently, due to the development of various electronic technologies, a memory card in which a large amount of information is integrated in one card has been developed. These memory cards are small in size and thin in thickness, which makes them convenient to carry, and the information processing process is automatically used through a predetermined computer input / output process.
메모리 카드는 인쇄회로기판(PCB;Printed Circuit Board) 상에 반도체 칩을 실장하고, 인쇄회로기판을 베이스 카드로 감싸 반도체 칩과 인쇄회로기판을 보호하는 것으로, 칩 온 보드(Chip on Board) 타입의 패키징 방법으로 제작된다.A memory card mounts a semiconductor chip on a printed circuit board (PCB) and wraps the printed circuit board with a base card to protect the semiconductor chip and the printed circuit board, and is a chip on board type. It is produced by the packaging method.
최근들어 전자기기와 정보기기의 메모리 용량이 대용량화되고 크기는 소형화 박형화됨에 따라 반도체 칩을 복수개 적층시켜 반도체 칩 패키지를 소형화, 박형화시키고 메모리 용량은 증대시키는 멀티 칩 패키지의 개발이 활발히 진행되고 있다.Recently, as the memory capacities of electronic devices and information devices are increased in size, and the size is reduced, the development of multi-chip packages for miniaturizing, thinning, and increasing the memory capacity of semiconductor chips by stacking a plurality of semiconductor chips is being actively conducted.
이에 따라 메모리 카드에도 메모리용 반도체 칩을 적어도 2개이상 실장하는 멀티 칩 방식을 도입되고 있다.As a result, a multi-chip method in which at least two semiconductor chips for memory are mounted is also introduced to a memory card.
이와 같이 메모리 카드에 메모리용 반도체 칩을 적어도 2개이상 실장하면 고밀도 실장을 할 수 있고 메모리 용량도 증대되지만 메모리 카드의 불량률이 증가되고, 또한 복수개의 메모리용 반도체 칩이 하나의 기능밖에 수행할 수 없어 소비자의 욕구를 충족시키지 못한다.In this way, when at least two memory semiconductor chips are mounted on the memory card, high-density mounting is possible and memory capacity is increased, but the defect rate of the memory card is increased, and a plurality of memory semiconductor chips can perform only one function. It does not meet the needs of consumers.
이는 복수개의 메모리용 반도체 칩들이 외부 장치와 메모리 카드를 전기적으로 연결시키는 하나의 접속영역을 공유하기 때문에 메모리 카드에 실장된 복수개의 메모리용 반도체 칩들 중에서 어느 하나의 메모리용 반도체 칩이 기능을 상실한 경우에 메모리 카드 전체를 사용할 수 없기 때문이다.This is because a plurality of memory semiconductor chips share one connection area electrically connecting an external device and a memory card, so that any one of the memory semiconductor chips mounted on the memory card has lost its function. This is because the entire memory card cannot be used.
그리고, 메모리 카드에 실장된 반도체 칩들이 하나의 접속영역을 공유하면 메모리 카드에 실장된 메모리용 반도체 칩들의 개수와 관계없이 모든 메모리용 반도체 칩들은 동일한 기능만을 수행한다. 예를 들어 메모리 카드가 디지털 카메라와 접속된 경우에 모든 메모리용 반도체 칩들은 이미지 파일을 저장하는데 사용된다.When the semiconductor chips mounted on the memory card share one connection area, all the memory semiconductor chips perform the same function regardless of the number of the semiconductor chips for the memory mounted on the memory card. For example, when a memory card is connected with a digital camera, all memory semiconductor chips are used to store image files.
따라서, 본 발명의 목적은 메모리 카드에 실장된 복수개의 메모리용 반도체 칩들 중에서 어느 하나의 메모리용 반도체 칩에 불량이 발생되더라도 나머지 메모리용 반도체 칩들은 불량이 발생된 메모리용 반도체 칩과 별개로 동작될 수 있도록 하는데 있다.Accordingly, an object of the present invention is that even if a defect occurs in any one of the plurality of memory semiconductor chips mounted in the memory card, the remaining memory semiconductor chips may be operated separately from the defective memory semiconductor chip. It is to make it possible.
본 발명의 다른 목적은 메모리 카드에 실장된 각각의 메모리용 반도체 칩들이 독립적으로 기능을 발휘할 수 있도록 하여 사용자의 편의를 제공하는데 있다.Another object of the present invention is to provide a user's convenience by allowing each of the semiconductor chips for memory mounted on the memory card to function independently.
본 발명의 또 다른 목적은 다음의 상세한 설명과 첨부된 도면으로부터 보다 명확해 질 것이다.Still other objects of the present invention will become more apparent from the following detailed description and the accompanying drawings.
도 1은 본 발명의 제 1 실시예에 의한 인쇄회로기판에 반도체 칩들이 실장된 상태를 나타낸 사시도.1 is a perspective view showing a semiconductor chip mounted on a printed circuit board according to a first embodiment of the present invention.
도 2는 본 발명의 제 1 실시예에 의한 인쇄회로기판의 배면을 나타낸 사시도.Figure 2 is a perspective view showing the back of the printed circuit board according to the first embodiment of the present invention.
도 3은 제 1 실시예에 의한 메모리 카드의 구조를 나타낸 단면도.Fig. 3 is a sectional view showing the structure of the memory card according to the first embodiment.
도 4는 본 발명의 제 2 실시예에 의한 인쇄회로기판에 반도체 칩들이 실장된 상태를 나타낸 사시도.4 is a perspective view illustrating a semiconductor chip mounted on a printed circuit board according to a second exemplary embodiment of the present invention.
도 5는 제 2 실시예에 의한 메모리 카드의 구조를 나타낸 단면도.Fig. 5 is a sectional view showing the structure of the memory card according to the second embodiment.
이와 같은 목적을 달성하기 위해서 본 발명은 신호 전달 배선들 및 접속패드들이 형성된 인쇄회로기판에 적어도 두 개 이상의 메모리용 반도체 칩들을 실장하고, 인쇄회로기판의 소정영역에 각각의 반도체 칩들과 전기적으로 연결되는 접속영역들을 적어도 두 개이상 형성하여 각각의 반도체 칩들이 독립적인 기능을 가질 수 있도록 한다.In order to achieve the above object, the present invention mounts at least two semiconductor chips for memory on a printed circuit board on which signal transmission lines and connection pads are formed, and is electrically connected to respective semiconductor chips in a predetermined region of the printed circuit board. At least two connection regions are formed so that each semiconductor chip can have an independent function.
이하, 본 발명에 의한 칩 온 보드 타입의 메모리 카드의 구조를 첨부된 도 1내지 도 5를 참조하여 설명하면 다음과 같다.Hereinafter, a structure of a chip on board type memory card according to the present invention will be described with reference to FIGS. 1 to 5.
먼저, 본 발명의 제 1 실시예에 의한 메모리 카드(100)는 도 1내지 도 3에 도시된 바와 같이 인쇄회로기판(110), 인쇄회로기판(110)의 일면에 접착제(130)를 개재하여 접착되며 외부장치로부터 전달된 데이터를 저장하는 적어도 2개 이상의 메모리용 반도체 칩들(140), 인쇄회로기판(110)과 메모리용 반도체 칩들(140)을 전기적으로 연결시키는 와이어(160), 메모리용 반도체 칩들(140)이 실장된 인쇄회로기판(110)의 일면을 감싸 메모리용 반도체 칩(140)과 인쇄회로기판(110)을 보호하는 몰딩물(170) 및 몰딩물(170)의 주변을 감싸 메모리 카드(100)를 카드 형상으로 만드는 베이스 카드(180)로 구성된다.First, as illustrated in FIGS. 1 to 3, the memory card 100 according to the first embodiment of the present invention may include a printed circuit board 110 and an adhesive 130 on one surface of the printed circuit board 110. Bonded and at least two or more memory semiconductor chips 140 for storing data transferred from an external device, a wire 160 for electrically connecting the printed circuit board 110 and the memory semiconductor chips 140, memory semiconductor The memory 140 is wrapped around one surface of the printed circuit board 110 on which the chips 140 are mounted, and the molding 170 protects the semiconductor chip 140 and the printed circuit board 110. It consists of a base card 180 that makes the card 100 into a card shape.
도 1에 도시된 바와 같이 메모리용 반도체 칩들(141,145)이 실장된 인쇄회로기판(110)의 일면에는 와이어(160)에 의해 각각의 메모리용 반도체 칩(141,145)에 형성된 본딩패드들(143,147)과 전기적으로 연결되는 접속패드들(113,117)이 형성되는데, 접속패드들(113,117)은 각각의 메모리용 반도체 칩들(141,145)을 기준으로 메모리용 반도체 칩(141,145)의 폭방향 양단에 형성되며 각 메모리용 반도체 칩(141,145)의 길이방향을 따라 일렬로 배열된다.As shown in FIG. 1, bonding pads 143 and 147 formed on the memory semiconductor chips 141 and 145 by wires 160 are formed on one surface of the printed circuit board 110 on which the memory semiconductor chips 141 and 145 are mounted. Electrically connected connection pads 113 and 117 are formed. The connection pads 113 and 117 are formed at both ends of the width direction of the memory semiconductor chips 141 and 145 based on the respective memory semiconductor chips 141 and 145. The semiconductor chips 141 and 145 are arranged in a line along the longitudinal direction.
그리고, 도 2에 도시된 바와 같이 인쇄회로기판(110)의 이면에는 메모리 카드(100)와 외부 장치를 전기적으로 연결시키기 위한 접속영역들(121,125)이 인쇄회로기판(110)의 상부면에 실장된 메모리용 반도체 칩들(141,145)과 동일한 개수로 형성되는데, 여기서는 두 개의 접속영역(121,125)이 인쇄회로기판(110)의 길이방향 양단에 각각 하나씩 형성된다.As shown in FIG. 2, connection regions 121 and 125 for electrically connecting the memory card 100 and an external device are mounted on the upper surface of the printed circuit board 110 on the rear surface of the printed circuit board 110. The semiconductor memory chips 141 and 145 are formed in the same number. Here, two connection regions 121 and 125 are formed at both ends of the printed circuit board 110 in the longitudinal direction, respectively.
인쇄회로기판(110)의 길이방향 일단과 타단에 각각 하나씩 형성된 접속영역들(121,125)은 인쇄회로기판의 일면에 형성된 접속패드들(113,117)과 신호전달배선 및 비아홀에 의해 전기적으로 연결되는 복수개의 접속패드들(123,127)의 묶음이다.The connection regions 121 and 125 formed at one end and the other end in the longitudinal direction of the printed circuit board 110 may be electrically connected to the connection pads 113 and 117 formed on one surface of the printed circuit board by signal transmission lines and via holes. This is a bundle of connection pads 123 and 127.
이와 같이 구성된 제 1 실시예에 의한 메모리 카드의 제조과정에 대해서 개략적으로 설명하면 다음과 같다.A manufacturing process of the memory card according to the first embodiment configured as described above will be described below.
인쇄회로기판(110)의 일면 중에서 접속패드들(113,117) 사이에 접착제(130)를 도포하고, 접착제(130)의 상부면에 예를 들어 두 개의 메모리용 반도체 칩(141,145)을 접착시킨다.An adhesive 130 is applied between the connection pads 113 and 117 on one surface of the printed circuit board 110, and for example, two memory semiconductor chips 141 and 145 are adhered to an upper surface of the adhesive 130.
그리고, 인쇄회로기판(110)에서 메모리용 반도체 칩들(141,145)을 기준으로 각 메모리용 반도체 칩(141,145)의 폭방향 양단에 형성된 접속패드들(113,117)과 반도체 칩(141,145))의 상부면에 형성된 본딩패드들(143,147)을 와이어(160)를 통해 전기적으로 연결시킨다. 여기서, 와이어(160)에 의해 본딩패드들(143,147)과 전기적으로 연결되는 접속패드들(113,117)은 도 3에 도시된 바와 같이 신호전달 배선들 및 비아홀을 통해 각각의 메모리용 반도체 칩(141,145)과 대응되는 부분에 형성된 접속영역(121,125)과 전기적으로 연결된다.In addition, the printed circuit board 110 may be formed on the upper surfaces of the connection pads 113 and 117 and the semiconductor chips 141 and 145 formed at both ends in the width direction of each of the memory semiconductor chips 141 and 145 based on the memory semiconductor chips 141 and 145. The formed bonding pads 143 and 147 are electrically connected to each other through the wire 160. Herein, the connection pads 113 and 117 electrically connected to the bonding pads 143 and 147 by the wire 160 are connected to the memory semiconductor chips 141 and 145 through the signal transmission lines and the via holes, as shown in FIG. 3. Are electrically connected to the connection areas 121 and 125 formed in the corresponding portions.
상술한 과정을 통해서 인쇄회로기판(110)에 메모리용 반도체 칩들(141,145)이 전기적으로 연결되면, 도 3에 도시된 바와 같이 메모리용 반도체 칩들(141,145)을 포함하여 인쇄회로기판(110)의 일면에 형성된 접속패드들(113,117)을 몰딩물(170)로 감싸 외부 환경으로부터 메모리용 반도체 칩들(141,145) 및 인쇄회로기판(110)을 보호한다.When the memory semiconductor chips 141 and 145 are electrically connected to the printed circuit board 110 through the above-described process, as shown in FIG. 3, one surface of the printed circuit board 110 including the memory semiconductor chips 141 and 145 is illustrated. The connection pads 113 and 117 formed on the substrate 170 are wrapped with the molding 170 to protect the semiconductor chips 141 and 145 and the printed circuit board 110 from the external environment.
이후에, 몰딩물(170)의 주변을 몰딩물(170)과 동일한 높이를 갖는 얇은 플라스틱 재질의 베이스 카드(180)로 감싸 메모리 카드(100)를 제작한다.Thereafter, the memory card 100 is manufactured by wrapping the periphery of the molding 170 with the base card 180 made of a thin plastic material having the same height as the molding 170.
한편, 제 2 실시예에 의한 인쇄회로기판(210)의 일면(211)과 이면(220)에는 외부장치로부터 전달된 소정의 데이터를 저장하는 적어도 2개 이상의 메모리용 반도체 칩들(241,245)과 각각의 메모리용 반도체 칩들(241,245)을 제어하는 제어용 반도체 칩들(251,255)이 접착제(230)를 개재하여 실장되며, 와이어(260)에 의해서 메모리용 및 제어용 반도체 칩들(240)(250)은 인쇄회로기판(210)에 전기적으로 연결된다.Meanwhile, at least two or more memory semiconductor chips 241 and 245 for storing predetermined data transmitted from an external device are formed on one surface 211 and the rear surface 220 of the printed circuit board 210 according to the second embodiment. The control semiconductor chips 251 and 255 for controlling the memory semiconductor chips 241 and 245 are mounted through the adhesive 230, and the memory and control semiconductor chips 240 and 250 are connected to the printed circuit board by the wire 260. And electrically connected to 210.
그리고, 인쇄회로기판(210)의 일면(211)과 이면(220)에 형성된 메모리용 및 제어용 반도체 칩들(240)(250)은 몰딩물(270)에 의해 보호된다.In addition, the memory and control semiconductor chips 240 and 250 formed on one surface 211 and the rear surface 220 of the printed circuit board 210 are protected by the molding 270.
도 4에 도시된 바와 같이 인쇄회로기판(210)의 일면(211)과 이면(220)에는 와이어(260)에 의해 메모리 및 제어용 반도체 칩들(240,250)과 전기적으로 연결되는 접속패드들(213,217)과, 외부 장치와 메모리 카드(200)를 전기적으로 연결시켜 소정의 데이터를 주고받는 접속영역들(221,225) 및 접속패드들(213,217)과 접속영역(221,225)을 도통시켜 메모리 및 제어용 반도체 칩들(240,250)과 접속영역들(221,225)을 전기적으로 연결시키는 신호전달 배선들이 형성된다.As shown in FIG. 4, the one surface 211 and the rear surface 220 of the printed circuit board 210 may include connection pads 213 and 217 electrically connected to the memory and control semiconductor chips 240 and 250 by a wire 260. And electrically connecting the external device and the memory card 200 to connect the connection areas 221 and 225 and the connection pads 213 and 217 and the connection areas 221 and 225 to transmit and receive data, thereby controlling the memory and control semiconductor chips 240 and 250. Signal transmission lines for electrically connecting the connection regions 221 and 225 are formed.
여기서, 인쇄회로기판(210)의 일면(211)과 이면(220)에 형성된 접속패드들(213,217)은 각각의 메모리 및 제어용 반도체 칩들(240,250)의 폭방향 양단에 형성되고 메모리 및 제어용 반도체 칩들(240,250)의 길이방향을 따라서 일렬로 배열되어 있으며, 와이어(260)에 의해 각각의 메모리 및 제어용 반도체칩(240,250)의 상부면에 형성된 본딩패드들(243,253)(247,257)과 전기적으로 연결된다.Here, the connection pads 213 and 217 formed on one surface 211 and the rear surface 220 of the printed circuit board 210 are formed at both ends in the width direction of each of the memory and control semiconductor chips 240 and 250, respectively. 240 and 250 are arranged in a line along the length direction, and are electrically connected to the bonding pads 243 and 253 and 247 and 257 formed on the upper surfaces of the memory and control semiconductor chips 240 and 250 by wires 260.
그리고, 접속영역들(221,225)은 인쇄회로기판(210)의 일면(211)과 이면(220)에 메모리용 반도체 칩들(241,245)과 동일한 개수로 형성되어 인쇄회로기판(210)의 일면(211)에 형성된 메모리용 반도체 칩(241)과 인쇄회로기판(210)의 이면(220)에 형성된 메모리용 반도체 칩(245)이 독립적인 기능을 발휘할 수 있도록 한다. 여기서, 접속영역들(221,225)이 형성된 위치는 인쇄회로기판(210)의 길이방향 일단이며, 접속영역들(221,225)은 와이어(260)에 의해 메모리 및 제어용 반도체 칩들(240,250)과 전기적으로 연결되는 접속패드들(213,217)과 신호전달배선에 의해 전기적으로 연결되는 복수개의 접속패드들(223,227)의 묶음이다.In addition, the connection regions 221 and 225 are formed on the one surface 211 and the rear surface 220 of the printed circuit board 210 in the same number as the semiconductor chips 241 and 245 for the memory, so that one surface 211 of the printed circuit board 210 is formed. The memory semiconductor chip 241 formed in the memory chip 245 formed on the back surface 220 of the printed circuit board 210 may have an independent function. Here, the positions where the connection regions 221 and 225 are formed are one end in the longitudinal direction of the printed circuit board 210, and the connection regions 221 and 225 are electrically connected to the memory and control semiconductor chips 240 and 250 by the wire 260. This is a bundle of a plurality of connection pads 223 and 227 electrically connected to the connection pads 213 and 217 by signal transmission wiring.
제 2 실시예에 의한 메모리 카드의 제조하는 방법은 제 1 실시예에서 설명한 메모리 카드의 제조 방법과 거의 동일한 방법으로 이루어지기 때문에 이에 대한 상세한 설명은 생략하기로 한다.Since the manufacturing method of the memory card according to the second embodiment is made in substantially the same manner as the manufacturing method of the memory card described in the first embodiment, a detailed description thereof will be omitted.
제 1 실시예와 제 2 실시예에서 설명한 바와 같이 메모리 카드에 실장된 각각의 메모리용 반도체 칩들이 하나씩의 접속영역을 가지면 각각 독립적인 기능을 발휘할 수 있다.As described in the first and second embodiments, when each memory semiconductor chip mounted on the memory card has one connection area, each function can be independently performed.
예를 들어 제 1 실시예에 의한 메모리 카드(100)가 디지털 카메라와 접속된 경우 메모리 카드(100)에 실장된 메모리용 반도체 칩들(240) 중에서 어느 하나의 메모리용 반도체 칩(141)만이 디지털 카메라에서 출력된 이미지 데이터를 저장하게 된다. 그리고, 나머지 하나의 메모리용 반도체 칩(245)에는 이미지 데이터가 아닌다른 데이터 예를 들어 음악 데이터를 저장할 수 있다.For example, when the memory card 100 according to the first embodiment is connected to a digital camera, only one of the memory semiconductor chips 141 of the memory semiconductor chips 240 mounted on the memory card 100 is used. Save the image data output from. The other memory semiconductor chip 245 may store data other than image data, for example, music data.
이상에서 설명한 바와 같이 복수개의 메모리용 반도체 칩이 실장되는 메모리 카드에서 외부 장치와 메모리 카드를 전기적으로 접속시켜 소정의 데이터를 입,출력시키는 접속영역을 메모리용 반도체 칩들의 개수만큼 형성한다.As described above, in a memory card on which a plurality of memory semiconductor chips are mounted, an external device and a memory card are electrically connected to form a connection area for inputting and outputting predetermined data as many as the number of memory semiconductor chips.
그러면, 메모리 카드에 실장된 복수개의 메모리용 반도체 칩들 중에서 어느 하나의 메모리용 반도체 칩에 불량이 발생되어도 다른 메모리용 반도체 칩에는 영향을 미치지 않기 때문에 메모리 카드의 수율이 향상될 수 있다.Then, even if a defect occurs in any one of the plurality of memory semiconductor chips mounted in the memory card, the yield of the memory card may be improved because it does not affect other memory semiconductor chips.
그리고, 메모리용 반도체 칩들이 독립적으로 동작하여 각각의 메모리용 반도체 칩에 서로 다른 데이터를 저장할 수 있어 사용자의 편의성을 제공할 수 있다.In addition, the memory semiconductor chips may operate independently to store different data in each memory semiconductor chip, thereby providing user convenience.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020000040939A KR20020007576A (en) | 2000-07-18 | 2000-07-18 | Chip-on-board type memory card |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020000040939A KR20020007576A (en) | 2000-07-18 | 2000-07-18 | Chip-on-board type memory card |
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| Publication Number | Publication Date |
|---|---|
| KR20020007576A true KR20020007576A (en) | 2002-01-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020000040939A KR20020007576A (en) | 2000-07-18 | 2000-07-18 | Chip-on-board type memory card |
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| KR (1) | KR20020007576A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100695864B1 (en) * | 2004-10-07 | 2007-03-19 | 어드밴스드 플래시 메모리 카드 테크놀로지 씨오.,엘티디 | Memory card structure and manufacturing method thereof |
| KR100695863B1 (en) * | 2004-10-07 | 2007-03-20 | 어드밴스드 플래시 메모리 카드 테크놀로지 씨오.,엘티디 | Memory card structure and manufacturing method thereof |
| KR100818593B1 (en) * | 2006-12-18 | 2008-04-02 | (주) 윈팩 | Momory device |
| US7629679B2 (en) | 2004-11-25 | 2009-12-08 | Samsung Electronics Co., Ltd. | Semiconductor package, memory card including the same, and mold for fabricating the memory card |
| EP2278564A1 (en) | 2005-09-08 | 2011-01-26 | Cardlab ApS | A dynamic transaction card and a method of writing information to the same |
| EP3035230A1 (en) | 2014-12-19 | 2016-06-22 | Cardlab ApS | A method and an assembly for generating a magnetic field |
| US10095968B2 (en) | 2014-12-19 | 2018-10-09 | Cardlabs Aps | Method and an assembly for generating a magnetic field and a method of manufacturing an assembly |
| US10558901B2 (en) | 2015-04-17 | 2020-02-11 | Cardlab Aps | Device for outputting a magnetic field and a method of outputting a magnetic field |
-
2000
- 2000-07-18 KR KR1020000040939A patent/KR20020007576A/en not_active Application Discontinuation
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100695864B1 (en) * | 2004-10-07 | 2007-03-19 | 어드밴스드 플래시 메모리 카드 테크놀로지 씨오.,엘티디 | Memory card structure and manufacturing method thereof |
| KR100695863B1 (en) * | 2004-10-07 | 2007-03-20 | 어드밴스드 플래시 메모리 카드 테크놀로지 씨오.,엘티디 | Memory card structure and manufacturing method thereof |
| US7629679B2 (en) | 2004-11-25 | 2009-12-08 | Samsung Electronics Co., Ltd. | Semiconductor package, memory card including the same, and mold for fabricating the memory card |
| EP2278564A1 (en) | 2005-09-08 | 2011-01-26 | Cardlab ApS | A dynamic transaction card and a method of writing information to the same |
| KR100818593B1 (en) * | 2006-12-18 | 2008-04-02 | (주) 윈팩 | Momory device |
| EP3035230A1 (en) | 2014-12-19 | 2016-06-22 | Cardlab ApS | A method and an assembly for generating a magnetic field |
| US10095968B2 (en) | 2014-12-19 | 2018-10-09 | Cardlabs Aps | Method and an assembly for generating a magnetic field and a method of manufacturing an assembly |
| US10614351B2 (en) | 2014-12-19 | 2020-04-07 | Cardlab Aps | Method and an assembly for generating a magnetic field and a method of manufacturing an assembly |
| US10558901B2 (en) | 2015-04-17 | 2020-02-11 | Cardlab Aps | Device for outputting a magnetic field and a method of outputting a magnetic field |
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