KR20010101330A - Variable-length decoding - Google Patents

Abstract

Variable length coded data according to the Huffman tree HT is decoded by the following method. The memory MEM in which the Huffman tree is stored is used so that the branch of the Huffman tree is represented by the memory location ML. If the memory location represents a branch following a subsequent branch, the memory location includes a pointer P to the memory location representing these subsequent branches. If the memory location represents a branch where subsequent branches do not follow, the memory location includes an ECI and output symbol data (OSD). The decoding processor DPR executes the selection step SEL and the evaluation step EVA with each data element DE in the sequence of data elements. In the selection step, the decoding processor selects a memory location based on the content of the data element and the most recently selected memory location. In the evaluation step, it is checked whether the selected memory location includes ECI, and if so, provide an output symbol based on the output symbol data. This type of variable length decoding makes it possible to implement cost-effectively, especially when it is necessary to decode various types of variable length codes. It is particularly suitable for use in MPEG decoders.

Description

Variable-length decoding

Variable length coding is based on the following principle. The data to be encoded is composed of several different symbols, just as text is composed of various different words. Frequently occurring symbols in data are encoded by a relatively short code word, that is, a code word containing a relatively few bits. Rarely occurring symbols in data are encoded by longer code words. For example, assume that data is composed of four symbols A, B, C, and D. It is also assumed that the data consists of 50% symbol A, 25% symbol B, and 12.5% symbols C and D, respectively. Symbol A may be represented by a 1-bit binary code word, symbol B by a 2-bit binary code word, and symbols C and D by a 3-bit binary code word. When data is encoded with these code words, the average code word length in the coded data will be less than two bits.

The basic aspect of variable length coding is how to distinguish between different code words. If the length of the sign word is fixed, i.e. each sign word has a length of two bits, for example, it is known that there will be a new sign word every two bits. If the length of the code word is not fixed, i.e. in the case of variable length coding, another technique will have to be applied to distinguish between different code words.

Variable length coding according to the Huffman tree makes it possible to efficiently distinguish between different codewords. The following is an example of a Huffman tree that encodes the four symbols A, B, C, and D shown above. The first level node constitutes the beginning of the tree. There are two first level branches connected to this node. One first level branch has a leaf at its end representing symbol A. Binary zeros are associated with this branch. The other first level branch has a second level node at its end. Binary 1 is associated with this branch. There are two second level branches connected to the second level node. One second level branch has a leaf at its end, and the leaf represents symbol B. Binary 0 is associated with this branch. The other second level branch has a third level node at its end. Binary 1 is associated with this second level branch. There are two third level branches connected to the third level node. Each third level branch has a leaf at its end, one leaf represents symbol C and the other represents symbol D. Binary zero is associated with the branch where the leaf represents symbol C. Binary 1 is associated with the branch where the leaf represents symbol D.

The Huffman tree described above provides the following code words. In order to reach the leaf representing symbol A, binary 0 must pass through the associated first level branch. Therefore, the sign word for symbol A is zero. In order to reach the leaf representing symbol B, it must pass through the first level branch with which binary 1 is associated, followed by the second level branch with which binary 0 is associated. Therefore, the sign word for symbol B is 10. In order to reach the leaf representing symbol C, one must pass through the first level branch with which binary 1 is associated, followed by the second level branch with which binary 1 is associated, and then the third level branch with which binary 0 is associated. Therefore, the sign word for symbol C is 110. In order to reach the leaf representing symbol D, one must pass through the first level branch with which binary 1 is associated, followed by the second level branch with which binary 1 is associated, and then the third level branch with which binary 1 is associated. Therefore, the sign word for symbol D is 111.

Variable length coded data according to the Huffman tree may be decoded as follows. The data register selects a sequence of bits from the data and supplies this sequence to the decoding logic circuit. The decoding logic circuit recognizes the sign word included in the sequence of bits as it is. Thus, the decoding logic circuit selects a symbol representing the sign word from the memory. For example, it is assumed that data is encoded by code words 0, 10, 110, and 111 representing symbols A, B, C, and D as described above. In this case, the decoding logic reads symbols A, B, C, D from the memory if the data registers contain-0,-10, 110 or 111 respectively. Here, the sign-represents a don not care value. The decoding method described herein is disclosed in US Pat. No. 5,828,907.

The present invention relates to decoding variable length coded data according to the Huffman tree. The invention may be applied to, for example, a Motion Pictures Expert Group (MPEG) decoder.

1 is a conceptual diagram illustrating the basic features of the invention claimed in claim 1;

2 shows a Huffman tree.

3 is a block diagram illustrating a decoder for decoding data encoded according to the Huffman tree shown in FIG. 2;

4 is a flowchart showing a method of operating the decoder shown in FIG.

5 is a block diagram illustrating an MPEG decoder according to the present invention.

It is an object of the present invention to enable cost-effective implementation of the decoding of data encoded according to the Huffman tree.

The present invention contemplates the following aspects. The data compression factor that can be achieved by variable length coding basically depends on two factors. It depends on the statistical properties of the data to be encoded and the Huffman tree, and accordingly the data is encoded. Huffman Trees that provide satisfactory compression factors for certain types of data may not provide satisfactory compression factors for other types of data because the two types of data have different statistical characteristics. . For this reason, it is preferable that each code has its own specific Huffman tree, while having different variable length codes from each other for different types of data.

For many applications such as multimedia, for example, it is desirable to handle different types of data that are variable length coded in different ways. In practice this can be achieved by providing a dedicated variable length decoder as described in the background section for each variable length code. This solution requires dedicated decoding logic circuitry for each code. Decoding logic circuits will generally be relatively complex because variable length codes are generally relatively complex. After all, this solution requires a significant amount of circuitry and is therefore relatively expensive. Another solution is to use a general purpose processor to provide variable length decoding software for each variable length code. However, this software solution will be relatively slow in terms of decoding throughput. Achieving a satisfactory decoding rate may require a fast general purpose processor. Such processors are relatively expensive, so software solutions will also be expensive.

According to the present invention, variable length coded data according to the Huffman tree is decoded in the following manner. The memory that stores the Huffman tree is used so that the branches of the Huffman tree are represented by memory locations. If the memory location represents a branch following a subsequent branch, the memory location includes a pointer to the memory location representing these subsequent branches. If the memory location represents a branch that is not followed by a subsequent branch, this means that the branch has a leaf at its end, where the memory location includes an end-of-code indication and output symbol data. The decoding processor executes a selection step and an evaluation step by each data element in the sequence of data elements. In the selection step, the decoding processor selects a memory location based on the content of the data element and the most recently selected memory location. In the evaluation phase, the decoding processor checks whether the selected memory location includes an end-of-code indication (ECI). If so, the decoding processor provides an output symbol based on the output symbol data.

The decoding processor can be relatively simple because it executes a relatively simple standard procedure with each data element in the data to be decoded. Moreover, the standard process does not depend on the Huffman tree. That is, the decoding processor can be used to perform different types of variable length decoding. Thus, to enable different types of variable length decoding, it is sufficient to select a Huffman tree by replacing one Huffman tree stored in memory with another Huffman tree or by storing different Huffman trees in memory and defining the starting address. Do.

Accordingly, the present invention makes it possible to decode various variable length codes with a relatively simple decoding circuit. In contrast, the variable length decoding method described in the background section requires a relatively complex decoding circuit to achieve the same as the present invention. Variable length decoding according to the present invention may require somewhat more memory than variable length decoding described in the background section. However, in many applications, the present invention will provide cost savings for the decoding circuit, which may even be worth more than the cost of additional storage capacity even if there is a cost there. Therefore, the present invention can be realized cost effectively.

The invention and additional features that may optionally be used to realize the invention advantageously will be apparent from the following description and will be described with reference to the drawings.

The following relates to reference signs. Like elements are designated by like reference numerals in the drawings. Several similar components may appear in a single drawing. In this case, numbers or suffixes are added to the characters to distinguish the same components. Numbers or suffixes can be omitted for convenience, or replaced with an asterisk if the value is not important (money care value). This also applies to the claims and the detailed description.

1 illustrates the basic feature of decoding variable length coded data according to the Huffman tree (HT). The memory MEM in which the Huffman tree HT is stored is used so that the branch of the Huffman tree is represented by the memory location ML. If the memory location represents a branch following a subsequent branch, the memory location includes a pointer P to the memory locations representing these subsequent branches. If the memory location represents a branch where the subsequent branch is not followed, the memory location includes an end-of-code indication (ECI) and output symbol data (OSD). The decoding processor DPR executes the selection step SEL and the evaluation step EVA by each data element ED in the sequence of data elements. In the selection step, the decoding processor selects a memory location based on the content of the data element and the most recently selected memory location. In the evaluation phase, the decoding processor checks whether the selected memory location includes an end-of-code indication (ECI). If so, the decoding processor provides an output symbol based on the output symbol data.

2 shows an example of a Huffman tree. Huffman tree defines variable length coding of four symbols, A, B, C, D. Huffman tree includes a node NO, a branch BR, and a leaf LF. There are first, second, and third level nodes NO1, NO2, NO3, respectively. There are two first, second and third branches BR1 *, BR2 *, BR3 *, respectively. Binary values, which can be zero or one, are assigned to each branch BR. Leaves LF1, LF2, LF3, and LF4 represent symbols A, B, C, and D, respectively.

The Huffman tree defines the sign word for each symbol A, B, C, D in the following manner. The first level node NO1 is taken as the start node. There is a specific path from this node to each symbol. The sign word is formed by the binary value assigned to the branch BR in the path in order of decreasing significant digits. For example, the path to symbol C is formed by branches BR12, BR22, BR31 assigned binary values 1, 1, 0, respectively. As a result, the sign word for symbol C is 110.

3 illustrates a decoder for decoding data encoded according to the Huffman tree shown in FIG. 2. The decoder includes a decoding processor (DPR) and a memory (MEM). The memory contains several memory cells (@). Each memory cell @ has a specific address. The memory cells @ 0, @ 1, @ 2 are divided into two halves. These memory cells include a left half and a right half. Each part contains an address. It also includes a flag √. For example, the left half of the memory cell @ 0 includes a flag √ and the address of the memory cell @ 10. The memory cells @ 10, @ 11, @ 12, and @ 13 include symbols A, B, C, and D, respectively.

The memory MEM of the decoder shown in FIG. 3 includes the Huffman tree shown in FIG. Huffman trees are stored in a particular way. The memory cells @ 1, @ 1, and @ 2 include first, second, and third level branches BR1 *, BR2 *, and BR3 *, respectively. The left half of these memory cells represents a branch BR * 1 to which binary zeros are assigned. The right half represents the branch (BR * 2) to which binary 1 is assigned. If a portion of memory cell @ represents a branch BR connected to a subsequent branch, that portion contains the addresses of the memory cells representing these further branches. For example, the right half of the memory cell @ 0 represents the branch BR12 of the Huffman tree. This branch is also connected to branches BR21 and BR22. Memory cells @ 1 represent these branches. Therefore, the right half of the memory cell @ 0 contains the address of the memory cell @ 1. If a portion of the memory cell @ represents a branch BR with a leaf LF at its end, the portion includes a flag √. This portion further includes the address of the memory cell containing the symbols belonging to this leaf.

4 illustrates a method of operating the decoder shown in FIG. The method comprises six steps S1-S6. Steps S1-S4 are executed with each subsequent bit of data to be decoded. Steps S5 and S6 are executed only when the current bit forms the last bit of the sign word. In this case, the decoder provides an output symbol.

In step S1, the decoding processor reads the selected memory cell @ as the next memory cell to be read during the series of steps S1-S6 previously executed: RD [NXT @]. The memory cell read in step S1 is a memory cell (@ 0, or @ 1, or @ 2). This will be described later.

In step S2, the decoding processor selects input data from the memory cells @ 0, @ 1, @ 2 read in step S1. The input data is the left half or right half of the memory cell. The left half is selected for input data when the current bit is binary 0: CB = 0 => LH @ = ID. The right half is selected for input data if the current bit is binary 1: CB = 1 => RF @ = ID.

In step S3, the decoding processor extracts an address included in the input data. This address defines the memory cell to be read: NXT @ = @ ∈ ID.

In step S4, the decoding processor checks whether the input data contains a flag: √∈ ID?. If so, the decoding processor executes steps S5 and S6. If not, the decoding processor will directly execute step S1 again for subsequent bits in the data to decode.

In step S5, the decoding processor reads the selected memory cell as the memory cell to be read next in step S3: RD [NXT @]. These memory cells are memory cells @ 10, @ 11, @ 12 or @ 13. Thus it contains a symbol. This symbol is output.

In step S6, the decoding processor selects memory cell @ 0 as the next memory cell to read: NXT @ = @ 0. The decoding processor will then execute step S1 again for the next bit in the data to decode.

When the decoding processor first executes a series of steps S1-S6, the current bit may not be the first bit of the sign word. This is not important. The effect is that only the first decoded symbol will be wrong. Subsequently decoded symbols will be correct. This automatic adjustment feature is because data is variable length coded according to the Huffman tree.

The decoder shown in FIG. 3 operating in accordance with the method shown in FIG. 4 is an implementation of the basic features shown in FIG. In this regard, it can be described as follows. The memory location ML in FIG. 1 is implemented in FIG. 3 in the form of the right and left halves of the memory cells @ 1, @ 2, and @ 3. In FIG. 1, the output symbol data OSD is implemented in FIG. 3 in the form of addresses of memory cells @ 10, @ 11, @ 12, and @ 13, and these addresses are represented by the memory cells @ 0, @ 1, and @ 2. It is included in the left half of and the right half of the memory cell (@ 2), respectively. The selection step SEL in FIG. 1 is implemented in FIG. 4 in the form of steps S1-S3, S6. In this regard, it is noted that the content of the memory location most recently selected in FIG. 4 is the memory cell (@ 1 or @ 2) or the flag (√) constituting the ECI. In the latter case, the decoding processor reads in succession the memory cell @ 0 that represents the beginning of the Huffman tree. The evaluation step EVA in FIG. 1 is implemented in FIG. 4 in the form of steps S4, S5.

5 illustrates an MPEG decoder in accordance with the present invention. The MPEG decoder provides various types of decoded data, such as video data (VID) and audio data (AUD), in response to an MPEG data stream (MDS). The MPEG decoder includes an input selection (INP), a variable length decoder (VLD) and another decoding circuit (FDC). The variable length decoder VLD includes a memory MEM and a decoding processor DPR. The memory MEM includes various Huffman trees belonging to various types of data (HT [1] .... HT [N]). The Huffman tree is stored in the manner described above with reference to FIG. 1.

The MPEG decoder basically works as follows. The input unit INP recognizes the type of data currently being received. For example, the input unit INP may recognize, for example, that data elements of an MPEG data stream represent a series of DCT coefficients or motion vectors. The input unit INP supplies the identification signal IS to the variable length decoder VLD. The identification signal IS informs the current variable length decoder VLD of what type of data is being received. The decoding processor DPR uses the identification signal IS to read the correct Huffman tree HT from the memory MEM. More specifically, the identification signal IS determines an address from which the decoding processor DPR will read the memory to decode the code word. Accordingly, the variable length decoder VLD supplies variable length decoded data to another decoding circuit FDC, which may be of different types. The another decoding circuit (FDC) further processes this data, which may include, for example, inverse quantization, discrete cosine transform and motion compensation.

As shown in FIG. 5, the Huffman trees HT [1]... HT [N] included in the memory MEM may be previously stored at the factory. However, one or more Huffman trees may also be stored after the MPEG decoder leaves the factory. For example, the Huffman tree may be stored by the memory configuration data supplied to the MPEG decoder. Memory configuration data will typically include data to be stored in memory MEM and information that this data should be stored, for example in coded form. The memory configuration data may be supplied to the MPEG decoder by, for example, a communication network such as the Internet.

The drawings and the foregoing description are illustrative rather than limiting the invention. It is apparent that numerous alternatives exist within the scope of the appended claims. In this respect, the following words are described.

Certain types of Huffman trees may be stored in memory in the manner shown in FIG. The Huffman tree shown in this figure is relatively simple. The Huffman tree shown in FIG. 3 is also relatively simple. The reason for this is to make the present invention understandable with a brief description. In fact, Huffman trees will be more complex. For example, the Huffman tree used in MPEG for encoding DCT coefficients is much more complicated. Nevertheless, this Huffman tree can be stored in the memory according to the principle shown in FIG. The Huffman tree shown in FIGS. 1 and 3 is somewhat specific in that each node has one branch with leaves at the end of the node and another branch followed by another branch. This never excludes the storage of Huffman trees that do not have this particular feature.

There are several ways to store Huffman trees in memory. 3 illustrates only one possible implementation where the branch is represented by the left half or right half of the memory cell. Another possible implementation is that each branch is represented by a different memory cell. In this case, a memory cell representing a branch followed by another branch includes a pointer to the memory cell representing these next branches. The value of the current bit from the data to be decoded will then determine which of these memory cells will be read.

There are several ways to provide output symbols. 3 illustrates only one possible implementation where the output symbols are stored in dedicated memory cells. The memory location representing the branch with leaves at the end contains the address of the memory cell containing the appropriate output symbol. Another possible implementation is to store the output symbols directly in memory locations representing branches with leaves at the ends. The advantage of this implementation is that it would require less than one step to provide the output symbols compared to the possibilities shown in FIG.

There are many ways to implement functionality by hardware or software or by them. In this respect, the drawings are very schematic, each representing only one possible embodiment of the invention. Thus, although the figures show different functions as different blocks, this does not exclude that a single piece of hardware or software performs some function. In addition, it does not exclude that a function is performed by hardware, software, or both assembly.

For example, the decoding processor DPR shown in FIG. 3 may be implemented by suitably programmed computer circuitry. The set of instructions contained in the program memory may cause the computer circuit to accomplish the various operations described above with reference to FIGS. 3 and 4. A set of instructions can be loaded into the program memory by reading a data carrier, such as a disk, containing it. Readout may be accomplished via a communication network such as, for example, the Internet. In this case, the service provider will make the instruction set available to the public.

Reference signs in the claims should not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. Elements or steps shown in the singular do not exclude the presence of a plurality.

Claims (5)

A decoder for decoding variable length coded data according to a Huffman tree (HT), A memory MEM in which the Huffman tree is stored such that the branches of the Huffman tree are represented by memory locations ML, where the memory locations represent the branches following subsequent branches, the memory locations representing these subsequent branches. And a pointer (P) to the memory, wherein if the memory location represents a branch where subsequent branches are not followed, the memory location is an end-of-code indication and output symbol data (output-symbol). the memory MEM including data (OSD), With each data element DE in the sequence of data elements each of the following steps, namely A selection step (SEL) in which a memory location is selected based on the data element and the contents of the most recently selected memory location, and Check if the selected memory location includes an end-of-code indication (ECI), and if so the evaluation step (EVA) in which an output symbol (OS) is provided based on the output symbol data A decoder comprising a decoding processor (DPR) to execute. A method for decoding variable length coded data according to a Huffman tree (HT), the method comprising: A memory in which the Huffman tree is stored such that the branches B of the Huffman tree are represented by memory locations ML, where the memory locations represent a branch following subsequent branches, the memory locations represent these subsequent branches. And a pointer (P) to the locations, wherein if the memory location represents a branch where subsequent branches do not follow, the memory location is an end-of-code indication (ECI) and output symbol data (OSD). Employing the memory, including, The method also comprises the following respective steps, i.e., with each data element DE in the sequence of data elements: A selection step (SEL) in which a memory location is selected based on the data element and the contents of the most recently selected memory location, and It is checked if the selected memory location contains a sign end indication (ECI), and if so the evaluation step (VA) is provided on which the output symbol OS is provided based on the output symbol data Characterized in that it is executed. A method of configuring a decoder for decoding variable length coded data according to a Huffman tree (HT), the method comprising: If the Huffman tree is stored in a memory such that the branches of the Huffman tree are represented by memory locations ML, and the memory location represents a branch followed by subsequent branches, the memory location represents the memory locations ML representing these subsequent branches. And a pointer (P), wherein the memory location represents a branch where subsequent branches are not followed, the memory location is an output symbol data (output-symbol) that generates a sign end indication (ECI) and an output symbol (OS). data) (OSD). In the memory configuration data providing method, Enable the Huffman tree to be stored in memory such that the branches of the Huffman tree are represented by memory locations ML, and if the memory location represents a branch that is subsequent branches to, then the memory location is the memory locations representing these subsequent branches. A pointer (P) to ML, wherein if the memory location represents a branch where subsequent branches are not followed, the memory location is an output symbol data OSD that generates a sign end indication (ECI) and an output symbol (OS). Memory configuration data; In a computer program product for a decoder, The decoder is a memory MEM in which the Huffman tree is stored such that the branches of the Huffman tree are represented by memory locations ML, where the memory locations represent these subsequent branches if the memory location represents a branch following the subsequent branches. And a pointer to memory locations, wherein if the memory location represents a branch where subsequent branches do not follow, the memory location includes a sign end indication (ECI) and an output symbol data (OSD). MEM), The computer program product includes a set of instructions that, when loaded into the decoder, cause the decoder to take each of the following steps into each data element DE in the sequence of data elements, i.e. A selection step (SEL) in which a memory location is selected based on the data element and the contents of the most recently selected memory location, and Checking whether the selected memory location includes an end-of-code indication, and if so, executing an evaluation step (EVA) in which an output symbol (OS) is provided based on the output symbol data.