KR20010091565A - Flash memory structure and managing method thereof - Google Patents

Abstract

PURPOSE: A structure of a flash memory and a method for managing the same are provided to find and manage a defect of a sector after a recording process and a deleting process are performed. CONSTITUTION: A position of a sector for recording is confirmed by referring to a sector information table(402). A data recording process is performed(404). A process for deleting previous data is performed if the previous data are recorded in the sector for recording the data(406). The data are recorded in a corresponding sector if the previous data are not recorded in the sector for recording the data(408). A defect test for the corresponding data is performed if the data are recorded in the corresponding sector(410). The read date are compared with the data stored in a memory(412). All operations are finished if there is not a defect in the read data, or the defect state of the corresponding sector is decided if the there is the defect in the read data(414). A usable sector is selected from dummy sectors(416).

Description

Flash memory structure and its management method {FLASH MEMORY STRUCTURE AND MANAGING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to flash memory, which identifies and manages defective sectors during product manufacturing, and particularly, identifies and manages defective sectors that occur when a write and erase operation is performed a certain number of times. Memory structure and method.

In recent years, various devices controlled by a computer or microprocessor require the development of nonvolatile memory devices that are electrically erasable and programmable at higher densities and speeds. In developing a memory device, the use of a hard disk device having a rotating magnetic disk is a problem for designers of such systems because of the relatively large footprint and mechanical failure problems. I am very interested in development.

Flash memory includes an array of MOS transistor memory cells, each having a floating gate and a control gate thereon. While the entire memory cells of such flash memory may be configured to be erased entirely, most flash memories typically consist of a plurality of sectors (or blocks) of several tens of Kbytes that divide the entire memory cell array, selected from among them. And to erase the memory cells temporarily by sector.

Such a flash memory is durable and can have a relatively large memory capacity, but as data writing continues, the transistor is degraded by the influence of the high voltage provided to the transistor of the memory cell. Therefore, after the data writing and erasing operation is performed a certain number of times, the data storing function cannot be safely performed. Since a flash memory processes data in sectors in general, a defect occurs in a corresponding sector as the transistor of the memory cell deteriorates.

Therefore, various techniques related to the identification and processing of defective sectors generated in the flash memory have been developed, and these technologies are mainly concerned with identifying the defective sectors and not using them. However, as the flash memory is configured to identify the defective sector and not to use the defective sector, the usable capacity of the memory is gradually reduced, which may cause a problem in product reliability of the memory capacity.

Accordingly, an object of the present invention is to provide a flash memory structure and a management method thereof for solving the problem of a defective sector generated after a write and erase operation is performed a certain number of times.

Another object of the present invention is to provide a flash memory structure and a method of managing the same, which can immediately identify the occurrence of a defective sector and replace the defective sector with another normal sector.

In order to achieve the above object, the present invention includes redundant dummy sectors in a flash memory in advance, and writes data in a sector in a data write operation, reads the recorded data, and compares it with original write data to determine whether the corresponding sector is defective. And the defective sector is replaced with the normal dummy sector.

1 is a structural diagram of a flash memory 200 according to an embodiment of the present invention,

2 is a diagram illustrating the structure of any one of the sectors of the sector unit 210 shown in FIG.

3 is a structural diagram of the sector information table 320 shown in FIG.

4 is a flowchart of a flash memory management operation according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, specific matters such as the structure and progress of a specific table are shown, which are provided to help a more general understanding of the present invention. Such specific matters may be modified or changed within the scope of the present invention. It will be apparent to those of ordinary skill in the art.

1 is a diagram illustrating the structure of a flash memory according to an embodiment of the present invention. Referring to FIG. 1, the flash memory 200 includes a sector unit 210 and a memory controller 300 including a plurality of sectors. The sector unit 210 may include basic sectors (sectors 0, 1, 2, ... n) corresponding to the capacities set in the flash memory 200, and dummy sectors (sector n +) further provided according to the present invention. 1, n + 2, ... n + m). The total capacity of the dummy sectors may be configured to have about 5-15% of the total amount of the basic sectors. The memory controller 300 includes an address translator 310 and a sector information table 320. The address conversion unit 310 converts a logical address provided from the host 100 (usually a microprocessor) into a corresponding physical address, and writes data to or reads data from a sector corresponding to the physical address. The memory controller 300 controls data write / erase operations for sectors and periodically rearranges the relationship between logical addresses and physical addresses.

Also, when each sector is erased, the memory controller 300 may perform an operation of comparing the erase count of the sector with a preset value. This comparison operation can be made using a reference value of the sector erase count appropriately set by the test in advance. This test is performed to determine the maximum allowable number of data writes and erases, based on the operating characteristics of the memory cell. The memory controller 300 compares the actual erase count of each sector with the reference value, and remaps the memory when the two values are the same.

The flash memory 200 illustrated in FIG. 1 has a memory controller 300 embedded therein, and the memory controller 300 and the flash memory 200 are described as forming one device, which is determined by the host 100 through a logical address. This is to access the flash memory 200 directly.

FIG. 2 is a diagram illustrating a structure of one sector of FIG. 1. Referring to FIG. 2, each sector includes an overhead portion divided into the erase count area 212 and the other information area 214, and a user divided into a data area 216 and a cyclic redundancy check (CRC) area 218. It can have a data part. The erase count area 212 records the erase count of the corresponding sector, and the other information area 214 may record various sector information such as a physical address or a bad bit of the sector.

According to the present invention, when data is recorded in each sector of the flash memory, whether or not the corresponding sector can be written, that is, whether the sector is defective or not, is determined. Replace with the appropriate one of the provided dummy sectors. This replacement is made possible by marking the defective sector as a defect and giving a logical address pointing to the defective sector to one of the dummy sectors. At this time, the operation of determining whether the sector is defective or the sector remapping operation is performed based on the sector information table 320 in the memory controller 300.

3 is an exemplary diagram of a sector information table 320 according to an embodiment of the present invention. Referring to FIG. 3, the sector information table 320 may include a logical address item 322 and a sector number item (physical item) of each sector. Address) 324, and a status item 326. The logical address of each sector, the corresponding sector number, and the state of the sector are recorded.

In the example of Fig. 3, two sector states are represented using two bits, for example, " 00 " is set to a non-write state, " 01 " is a data write state, and " 11 " That is, the non-recorded state and data write state of "00" and "01" are states in which data can be recorded in the corresponding sector, and the defect state of "11" is a state in which data writing is not allowed because the corresponding sector is defective. .

In the example of FIG. 3, the state of the sector having the logical address " 00011 " and the sector number " 7 " Such defective state sectors are replaced with dummy sectors according to the characteristics of the present invention. In the dummy sector having a sector number of " n + 1 " as indicated by B, the logical address " 00011 " It can be seen that a dummy sector is substituted for the defective sector. In the present invention, when a corresponding sector is in a defective state at the time of data recording, the sector which replaces the defective state is identified from the dummy sector and data is recorded in the dummy sector.

As described above, the replacement of the defective sector with the normal dummy sector may be performed in the final test process in the manufacturing process of the flash memory. By identifying defective sectors and replacing them with dummy sectors in the final test process, even if several sectors are defective, the specified capacity set in the corresponding flash memory can be satisfied. That is, in the related art, when a defect occurs in a sector of the flash memory, the corresponding flash memory may fall short of a prescribed capacity. In contrast, the present invention can satisfy the prescribed capacity by replacing a defective sector with a normal dummy sector.

Next, an operation of identifying which sectors are actually tested in the flash memory to determine whether a defect has occurred will be described. In the present invention, after performing a data write operation on a sector of a flash memory, the data of the sector is read, and the read data is compared with the data in the original write operation to test whether the sector is defective. Such a test operation may of course be performed with data of a specific test pattern in a memory manufacturing process. However, in accordance with a feature of the present invention, this test operation is not always performed with any test pattern data or periodically, but is performed whenever the user's data is recorded in each sector.

That is, the memory controller 300 of FIG. 1 compares write data temporarily stored in a memory such as internal RAM and data read from the corresponding sector whenever a user data write operation is performed in units of sectors. Will be identified.

In flash memory, when data is written first, data previously recorded in sector units must be erased. Therefore, the data writing speed of the flash memory is considerably slow, and occupies most of the data processing speed of the flash memory. As such, the data read speed in the flash memory is very fast compared to the write speed, so that a large amount of time is not required to perform the test process every time data is written. Hereinafter, the test operation and the data recording operation will be described in more detail with reference to the accompanying drawings.

FIG. 4 is a flowchart of a flash memory management operation according to an embodiment of the present invention, and may be performed by the memory controller 300 as shown in FIG. 1. Referring to FIG. 4, when data recording is started, a sector position to be recorded is first determined by referring to the sector information table 320 shown in FIG. 3 in step 402. 3, when the logical address is "00001", it is converted into sector number "0" which is a physical address, and it can be seen that the state of the corresponding sector is a recordable state as "01". On the other hand, as indicated by A, when the logical address is " 00011 ", the sector state of the corresponding sector number " 7 " is " 11 " At this time, the dummy sector having the corresponding logical address "00011", that is, the sector having sector number "n + 1", is identified and the logical address "00011" is converted into the sector number "n + 1". In this case, of course, it is first determined whether the state of the sector number " n + 1 " is a recordable state.

If the position of the sector to be recorded is determined in step 402 as described above, the process proceeds to step 404 to perform the actual data recording operation thereafter. In step 404, if the state of the sector to record data is already recorded, the process proceeds to step 406, and then proceeds to step 408 after performing the previous data erasing operation. If the previous data is not recorded, proceeds directly to step 408. do. In step 408, data is recorded in the sector. At this time, the write data is temporarily stored in a memory such as internal RAM of the memory controller 300.

When data recording is completed in step 408, the process proceeds to step 410 and thereafter, the defect test of the corresponding sector is performed. In step 410, data written in the corresponding sector is first read. Thereafter, in step 412, whether the read data is equal to the original data temporarily stored in the memory is compared. If there is no abnormality as a result of the comparison, the recording operation is terminated. In step 414, the state of the sector is set to a defective state. This may be done by setting the value of the state item 326 of the corresponding sector number to "11" in the sector information table 320 as shown in FIG. Thereafter, in step 416, an available sector is selected from the dummy sectors so as to replace the defective sector. Thereafter, the process returns to step 404 to repeat the above process of writing data and testing the dummy sector.

Through the above process, the data is recorded in a specific sector, and then the recorded data is read and compared with the original recorded data to determine whether the corresponding sector is defective, and also to replace the defective sector with a normal dummy sector. Flash memory management is performed accordingly. According to the memory management of the present invention, when a defect occurs in a specific sector, it can be immediately known at the time of data writing. Furthermore, the memory controller according to the present invention immediately knows a defect of a sector, and therefore, does not perform a comparison operation to compare the erase count of a sector with a preset value when each sector is erased to determine whether each sector is defective. It may be.

Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. For example, in FIG. 1, the memory controller is configured in the flash memory so that the memory controller and the flash memory form one device. In addition, the flash memory and the memory controller may be configured as separate devices. In addition, in the present invention, the bit indicating the state of the sector in the sector information table has been described as indicating the state of the sector using two bits. In addition to this, a plurality of bits may be further allocated to indicate the state of various sectors. For example, the number of erasing of the corresponding sector, other information, or the like may be recorded. In such a case, it may not be necessary to record the number of erasing of the sector in the overhead portion of each sector.

There may be various modifications of the present invention as described above, and thus the scope of the present invention should be determined by the equivalents of the claims and the claims, rather than by the embodiments described.

As described above, the present invention compares the data written to the sector with the data read back to the sector during data write operation to the flash memory to determine whether the sector is defective, and replaces the defective sector with a normal dummy sector. The defective sector generated after the low write and erase operations are performed can be replaced with a normal sector, and the occurrence of the defective sector can be immediately identified in each data write operation.

Claims (3)

A method of managing a flash memory having extra dummy sectors, A process of testing whether there is a defect in a corresponding sector by reading the recorded data in sector-by-sector operation and comparing the recorded data with original recording data; And remapping the memory so that the corresponding sector is regarded as a defect and replaced with one of the dummy sectors if there is an abnormality as a result of the comparison. The method of claim 1, wherein the determining of whether the sector is defective comprises: Temporarily storing recorded data when data is recorded in the sector, reading the data recorded in the sector in which the data is recorded, and comparing the recorded data with the temporarily stored data; According to the flash memory management method characterized in that it comprises the step of determining whether the sector is defective. In the structure of the flash memory, A sector portion comprising basic sectors providing basic recording capacity set in the flash memory, dummy sector sectors providing further capacity; An address translation unit for converting a logical address provided from the host into a corresponding physical address, and a sector information table having information on whether each sector is defective. And a memory controller for replacing a defective sector with a normal one of the dummy sectors.