KR20010077401A - Video decoder and its method for buffer control - Google Patents

Abstract

PURPOSE: A video encoder and a buffer control method thereof are provided to optimize a buffer size by preventing an input of unnecessary data to a buffer through a usage of PSC(Picture Start Code) detection, and to prevent saturation or emptiness of the buffer by controlling an encoding operation according to the number of times of the PSC detection. CONSTITUTION: A video encoder includes the first PSC(Picture Start Code) detector(200), a buffer(201), the counter(203), and the second PSC detector(202). The first PSC detector(200) detects a PSC in order to detect a start of a video frame from received data. The buffer(201) stores pertinent data in case that the PSC is detected by the first PSC detector(200). The counter(203) increases a count value whenever the PSC is detected by the first PSC detector(200), and generates a control signal for decoding the video data stored at the buffer(201) in case that the count value is over a predetermined threshold. The second PSC detector(202) detects a PSC of the video data output by the buffer(201) according to the control signal of the counter(203), and decreases the count value of the counter(203) according to the detection result of the second PSC detector(202). At this time, because the first PSC detector(200) removes the data inputted until the detection of the PSC, the video encoder prevents an input of unnecessary data, and the counter(203) decides the output of the buffer according to the counter value.

Description

Video decoder and its method for buffer control

The present invention relates to a video terminal, and more particularly, to a video decoder for efficiently decoding a video and a buffer control method using the same.

In general, a video terminal includes a video codec for processing image data. The video codec is composed of an encoder and a decoder. The encoder performs a function of coding, compressing and transmitting image data, and the decoder decodes and decompresses the received image data and restores the original image. In such a video codec, the encoder and the decoder have a buffer for efficient transmission of image data.

Here, since the decoder focuses on the present invention, the decoder according to the related art will be described in detail below.

1 is a block diagram showing a decoder of a conventional video terminal (see ITU-T, H.263).

Referring to FIG. 1, a decoder includes a buffer 100 for receiving and storing received image data, a demux 101 for demuxing image data output from the buffer 100, and the demux. A first variable length decoder (VLD) 102 which decompresses the information of the image data output from 101 and converts the information into the information of the original image; and analyzes the image data output from the demux 101 to analyze the image. A second variable length extracting a motion vector by decompressing information of the image data output from the demux 101 and a determiner 106 that determines an intra mode or an inter mode during decoding; An inverse quantizer (IQ) 103 for inverse quantizing the original image information output from the first variable length decoder 102 and the image information output from the inverse quantizer 103 Inverse Discrete Cosine Converter (IDCT) 104 for Inverse Discrete Cosine Transform A compensator for comparing the motion vector output from the second variable length decoder 107 and the previous video frame stored in the memory 109 and calculating a motion compensation value. 108 and the motion compensation value calculated by the compensator 108 and the image data output from the inverse discrete cosine converter 104 according to the decoding operation mode determined by the determiner 106 to add the motion of the image. Compensator adder 105.

The operation of the decoder configured as described above is as follows.

The received image data is input to the buffer 100, and the image data input to the buffer 100 is demuxed through the demux 101 so that the first variable length decoder 102, the determiner 106, and the first image data are demuxed. It is input separately by two variable length decoders 107.

Subsequently, the first variable length decoder 102 decodes the bit string compressed by the variable length encoder (not shown) and converts the bit string compressed into information of the original image data. The dequantizer 103 performs the first variable length. Information of the original image data output from the length decoder 102 is restored to the original image data according to the quantization level. Subsequently, the inverse discrete cosine converter 104 converts the image data of the frequency domain output from the inverse quantizer 103 into the image data of the spatial domain. In this case, the information of the original image data output from the first variable length decoder 102 has image information excluding motion compensation information.

On the other hand, the determiner 106 analyzes the header information of the input image data to determine which decoding operation mode, intra mode or inter mode, is used for decoding. In this case, the first frame of the image data is decoded in the intra mode, and the frames after the first are decoded in parallel with the inter mode and the intra mode.

The second variable length decoder 107 decodes a compressed bit string of the input image data to extract a motion vector, and the compensator 108 decodes the extracted motion vector and the previous image frame stored in the memory 109. After comparing the motion compensation value is calculated, the calculated motion compensation value is transmitted to the adder 105. The adder 105 then motion-compensates the image data output from the inverse discrete cosine converter 104 according to the motion compensation value transmitted from the compensator 108 and outputs the finally reconstructed image data.

However, in the conventional decoder, all image data is input to the buffer regardless of the validity of the image data. That is, image data or undefined meaningless data that cannot be normally decoded due to an error occurred during transmission through a wireless channel are input to the buffer without any limitation. As a result, the buffer stores unnecessary data that cannot be decoded, resulting in a saturation situation. As a result, the decoder cannot normally perform a decoding operation. In order to prevent the saturation of the buffer, a method of increasing the size of the buffer may be used, but this causes another problem of increased system burden and increased power consumption.

In addition, when the decoding speed of the image data is faster than the buffer input speed, there is a problem in that efficient decoding cannot be performed because the buffer is empty above a predetermined threshold value and a delay of the decoding operation occurs.

Accordingly, an object of the present invention is to provide a video decoder for efficiently decoding video data and a buffer control method using the same.

According to an apparatus feature of the present invention for achieving the above object, the image decoder is a buffer for storing the image data, and when the image start information is detected by analyzing the received image data and stored in the buffer from the image data A first detector to increase the count value each time the image start information is detected by the first detector, and output or decode the image data stored in the buffer when the increased count value exceeds a preset threshold. And a counter for generating a control signal for analyzing the image data output from the buffer according to the generated control signal, and redetecting the image start information. A second detector for decreasing and in the buffer in accordance with a control signal generated from the counter It is composed of a decoding for decoding the video data ryeokdoen.

Preferably, the first detector detects the image start information of the received image data using the memory storing the reference image start information and the stored reference image start information, and if the image start information is detected, the corresponding image data is detected. And a comparator for generating a control signal for storing in the buffer or for increasing the count value, wherein the counter comprises: an accelerometer for adjusting a count value according to control of the first detector or the second detector; And a control signal generator for outputting image data stored in the buffer or generating a control signal for driving the decoding unit according to the count value adjusted by the accelerometer.

According to the method feature of the present invention for achieving the other object as described above, the buffer control method of the image decoder detects the image start information by analyzing the received image data. At this time, when the image start information is detected, the corresponding image data is stored in the buffer and the counter value is increased. Thereafter, it is checked whether the increased count value exceeds a predetermined threshold value, and when the increased count value exceeds the threshold value, image data stored in the buffer is output and decoded.

Preferably, if the image start information is not detected, the received image data is deleted. In addition, after the process of outputting the image data, a process of adjusting the count value of the counter by re-detecting the image start information of the output image data is added, and if the number of detected image start information is lower than the predetermined threshold, A process of preventing output of the image data stored in the buffer is added.

1 is a block diagram illustrating a decoder of a conventional video terminal.

2 is a block diagram illustrating a decoder of a video terminal according to the present invention.

3 is a detailed circuit diagram of the decoder shown in FIG.

4 is a flowchart illustrating a buffer control method of a decoder according to the present invention.

* Description of the symbols for the main parts of the drawings *

200, 202: PSC detector 201: buffer

203: Counter 204: Demux

205 and 210: variable length decoder 206: inverse quantizer

207: Inverse Discrete Cosine Converter 208: Adder

209 Determinant 211 Compensator

212: memory

Hereinafter, a configuration and an operation according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

The present invention provides an image decoder for efficiently decoding image data by controlling image data input / output of a buffer, and a buffer control method using the same.

To this end, the decoder according to the present invention further includes a PSC detector for detecting the start of the image data and adjusting the amount of the image data input to the buffer, and a counter for determining the output of the image data stored in the buffer.

Particularly, in the present invention, the size of the buffer can be reduced and the saturation state can be prevented by analyzing the initial image data input to the buffer and automatically deleting the input of meaningless data. In addition, by adjusting the decoding speed according to the amount of video data stored in the buffer, it is possible to prevent the buffer from emptying.

2 is a block diagram illustrating a decoder of a video terminal according to the present invention.

Referring to FIG. 2, the decoder according to the present invention detects a picture start code (PSC) in order to detect the start of an image frame in the received data, and the first PSC detector 200. When the PSC is detected at, the buffer 201 storing the corresponding image data and the count value are increased each time the PSC is detected by the first PSC detector 200, and the count value exceeds the preset threshold. In this case, a counter 203 for generating a control signal for decoding the image data stored in the buffer 201 and PSC of the image data output from the buffer 201 are detected according to the control signal of the counter 203. Accordingly, the second PSC detector 202 decrementing the count value of the counter 203 and the demux demuxing the image data output from the buffer 201 according to the control signal generated from the counter 203. ( DEMUX) 204, a first variable length decoder (VLD) 205 for decompressing and converting the information of the image data output from the demux 204 into information of the original image, and the demux 204 A determinator 209 for determining an intra mode or an inter mode during image decoding by analyzing the image data output from the decoded image; and decompressing information of the image data output from the demux 204. A second variable length decoder 210 for extracting a motion vector, an inverse quantizer (IQ) 206 for inversely quantizing the original image information output from the first variable length decoder 205, and the inverse An inverse discrete cosine transformer (IDCT) 207 for inverse discrete cosine transforming the image information output from the quantizer 206, a memory 212 for storing the decoded previous image frame, and the second variable length decoder ( The motion vector output from 210 and the previous zero stored in the memory 212. A compensator 211 that compares frames to calculate a motion compensation value, and a motion compensation value calculated by the compensator 211 and the inverse discrete cosine converter 207 according to a decoding operation mode determined by the determiner 209. And an adder 208 for compensating for the motion of the image by adding the image data output from the image.

The operation of the decoder configured as described above is as follows.

First, the first PSC detector 200 analyzes the input data to detect a PSC indicating the start of an image frame. At this time, if the PSC is not detected, the first PSC detector 200 deletes the input data. That is, the first PSC detector 200 deletes data input until the PSC is detected. However, when the PSC is detected from the input data, the first PSC detector 200 stores the image frame corresponding to the detected PSC in the buffer 201 and simultaneously increases the count value of the counter 203. Here, the first PSC detector 200 increments the count value of the counter 203 by '1' each time the PSC is detected.

The buffer 201 receives image data transmitted through the first PSC detector 200 and stores the image data transmitted from the counter 203 until an output control signal is generated.

The counter 203 increases the count value according to the control of the first PSC detector 200, and when the count value exceeds a preset threshold, a control signal for outputting image data stored in the buffer 201 and the count value. A control signal for operating the demux 204 is generated to start decoding the output image data. In the present invention, when the threshold value set in the counter 203 is set to '2' and two or more image frames are stored in the buffer 201, a control signal for starting decoding is generated.

The second PSC detector 202 detects the PSC of the image data output from the buffer 201 and decreases the count value of the counter 203 when the PSC is detected. Here, the second PSC detector 202 decrements the count value of the counter 203 by '1' each time PSC is detected.

Accordingly, the counter 203 adjusts the count value according to the control of the first PSC detector 200 and the second PSC detector 202, and the adjusted count value may exceed the threshold value (ie, 2) already set. If a control signal is generated. At this time, the counter 203 generates a control signal to the buffer 201 and the demux 204, the buffer 201 outputs the image data according to the control signal, the demux 204 is the buffer 201 After demuxing the image data outputted from the N-th data, the first variable length decoder 205, the determiner 209, and the second variable length decoder 210 are input separately.

Thereafter, the first variable length decoder 205 decodes the bit stream compressed by the variable length encoder (not shown) and converts the bit string compressed into information of the original image data. The dequantizer 206 converts the first variable into the information of the original image data. Information of the original image data output from the length decoder 205 is restored to the original image data according to the quantization level. Subsequently, the inverse discrete cosine converter 207 converts the image data of the frequency domain output from the inverse quantizer 206 into the image data of the spatial domain. In this case, the information of the original image data output from the first variable length decoder 205 has image information excluding motion compensation information.

On the other hand, the determiner 209 analyzes the header information of the input image data to determine which decoding operation mode, either intra mode or inter mode, is used for decoding. In this case, the first frame of the image data is decoded in the intra mode, and the frames after the first are decoded in parallel with the inter mode and the intra mode.

The second variable length decoder 210 decodes a compressed bit string of the input image data to extract a motion vector, and the compensator 211 extracts the extracted motion vector and the previous image frame stored in the memory 212. After comparing the motion compensation values, the calculated motion compensation values are transmitted to the adder 208. The adder 208 motion-compensates the image data output from the inverse discrete cosine converter 207 according to the motion compensation value transmitted from the compensator 211 and outputs the finally reconstructed image data.

As described above, the decoder according to the present invention should pay attention to the first PSC detector 200 to delete the data input until the detection of the PSC to prevent the input of meaningless data, and to drive a separate counter 203 The output of the buffer 201 is determined according to the counter value.

3 is a detailed circuit diagram of the decoder shown in FIG.

3 shows a detailed circuit diagram of the first PSC detector, the buffer, the counter and the second PSC detector shown in FIG. 2 in particular.

Referring to FIG. 3, a first PSC detector according to the present invention detects a PSC of data input using a memory 300 storing a reference PSC, a reference PSC stored in the memory 300, and the PSC is detected. And a comparator 501 for generating a control signal to the buffer 303 and the retarder 304 of the counter, and a delayer 302 for synchronizing by delaying the input data with a predetermined delay. The PSC of the image data output from the buffer 303 is detected by using the memory 307 storing the PSC and the reference PSC stored in the memory 307, and when the PSC is detected, the PSC is counted by the counter retarder 304. A comparator 308 for generating a control signal for decreasing a value, and a delay 309 for synchronizing and synchronizing the image data output from the buffer 303 with a counter. According to the control signal provided from the second PSC detector A retarder 304 for adjusting a counter value, a retarder 305 for data retention, and a buffer 303 and a demux 310 for operating the count according to the count value output from the retarder 304. Control signal generator 306 for generating a control signal.

The operation of the first PSC detector, the buffer, the second PSC detector, and the counter configured as described above is as follows.

First, the delayer 302 of the first PSC detector constantly delays the input data, during which the comparator 501 detects whether a PSC exists in the input data by using the reference PSC provided from the memory 300. do. At this time, when the PSC is detected from the input data, the comparator 501 generates a control signal (ie, an enable signal) to the buffer 303 to store the corresponding image data, and also adds and subtracts 304 of the counter. The control signal is generated to increase the count value. Here, the delay unit 302 performs an operation of matching the transfer time of the input data with the operation delay time in the PSC detection process.

Then, the counter's modulator 304 increments the count value according to the control signal provided by the first PSC detector, and the control signal generator 306 checks whether the adjusted count value exceeds a preset threshold. do. At this time, if the count value does not exceed the threshold value, the process of inputting the image data through the first PSC detector is repeatedly performed. If the count value exceeds the threshold value, the control signal generator 306 performs the buffer 303. And a control signal is generated by the demux 310 to start decoding the image data stored in the buffer 303. Here, the delay unit 309 performs an operation for maintaining data.

As such, the counter controls to start decoding by generating a control signal when the image data of a predetermined threshold or more is stored in the buffer 303. That is, in the present invention, preferably, the counter outputs the image data of the buffer when the count value is '2' or more, and operates in the standby state when the count value is '2' or less.

On the other hand, the second PSC detector detects the PSC of the image data output from the buffer 303 according to the control of the counter, and when the PSC is detected, generates a control signal to the counter's modulator 304 to decrease the counter value. Let's do it. Then, the counter re-determines whether the counter value does not exceed a preset threshold value and generates a control signal to the buffer 303 and the demux 310 to stop the decoding operation accordingly.

4 is a flowchart illustrating a buffer control method of a decoder according to the present invention.

Referring to FIG. 4, when arbitrary data is input, the first PSC detector detects the PSC by analyzing the input data (S400 and S401). At this time, if the PSC is not detected, the first PSC detector deletes all input data and continues the data input and detection process. However, when the PSC is detected, the input data is determined to be decodable image data and stored in the buffer (S404), and at the same time, the counter value is increased (S402). In step S402, the first PSC detector increments the count value by one each time a PSC is detected.

The counter then determines whether the incremented count value exceeds a predetermined threshold value (S403). At this time, if the count value does not exceed the threshold, the PSC detection and buffer storage operations for other data are repeatedly performed. However, if the count value exceeds the threshold value, the image data stored in the buffer is output (S405). Preferably, in the present invention, the threshold value is set to '2', and if the count value is 2 or more, it means that the video frame is stored in the buffer because there are two or more video frames. It means that there are two or less stored image frames, so keep storing image data.

Thereafter, the second PSC detector detects the PSC of the output image data (S406), and when the PSC is detected, decreases the count value of the counter by a predetermined amount. The counter then adjusts the decoding speed by generating a control signal for stopping the decoding operation according to the count value.

In this manner, the counter adjusts the count value according to the control signals of the first PSC detector and the second PSC detector, and generates a control signal for proceeding or stopping the decoding operation accordingly.

As described above, the decoder and the buffer control method using the same according to the present invention have the effect of optimizing the size of the buffer by preventing unnecessary data from being input to the buffer using PSC detection.

In addition, the present invention can prevent the situation in which the buffer is saturated or the buffer is empty by controlling the decoding operation according to the number of times PSC detection of the input image data has an effect that can perform a stable decoding operation.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the examples, but should be defined by the claims.

Claims (6)

A buffer for storing image data, A first detector for analyzing the received image data and storing the image start information in the buffer from the image data when the image start information is detected; The first detector increases a count value each time the image start information is detected, and generates a control signal for outputting or decoding image data stored in the buffer when the increased count value exceeds a preset threshold. With counter to say, A second detector for analyzing the image data output from the buffer according to the generated control signal to redetect the image start information and to decrease the count value of the counter when the image start information is redetected; And a decoder which decodes the image data output from the buffer according to the control signal generated from the counter. The method of claim 1, wherein the first detector, A memory for storing reference image start information; A comparator for detecting image start information of received image data using the stored reference image start information, and generating control signals for storing the image data in the buffer or increasing the count value when the image start information is detected. An image decoder comprising a. The method of claim 1, wherein the counter, An accelerometer for adjusting a count value according to the control of the first detector or the second detector, And a control signal generator for outputting image data stored in the buffer or generating a control signal for driving the decoding unit according to the count value adjusted by the adder / receiver. A first step of analyzing the received image data to detect image start information; A second step of, when the image start information is detected, storing the image data in a buffer and increasing a counter value; A third step of checking whether the incremented count value exceeds a predetermined threshold value; And a fourth step of outputting and decoding the image data stored in the buffer when the increased count value exceeds the threshold value. The method of claim 4, wherein in the second step, And if the image start information is not detected, deleting the received image data. The method of claim 4, wherein after the fourth step, And re-detecting image start information of the image data output from the buffer to adjust a count value of the counter.