KR20010002990A - Cache memory for 3D graphic texture and its cache miss penalty reducing method - Google Patents

Abstract

PURPOSE: A cache memory for mapping of a three-dimension graphic texture and method for reducing a cache miss penalty is provided to reduce a penalty generated upon a cache miss by predicting and prefetching the texture to be needed later . CONSTITUTION: The first and second DRAM bank(10,20) have a SAM port for reading texture for a trilinear interpolation and for bringing sub-clip of a new texture from exterior. A sub-clip board loader(30) is connected to the first and second DRAM bank(10,20). The trilinear interpolation(40) bring 4 texels from 2 layers on a mipmap to implements trilinear interpolation. A control part(60) control each component as a whole. A CAM(21) determines which 8 texels that is in location of an integer coordinate exist in the first and second bank(10,20).

Description

Cache memory for 3D graphic texture and its cache miss penalty reducing method

The present invention relates to a cache memory for texture mapping applicable to fields requiring high performance 3D graphics cards for PCs, 3D game machines and other small high performance 3D graphics, and in particular, textures by mipmapping using trilinear interpolation. Cache memory for 3D graphics texture mapping and hardware-predicted prefetching for future textures that can accelerate mapping, reducing cache miss penalties to reduce penalties for cache misses It is about a method.

In order to obtain a more realistic scene in a 3D graphics system, texture mapping technique is mainly used. Texture mapping refers to the application of two-dimensional images taken from a real camera onto the surface of an object in order to texture the surface of a three-dimensional object. Texture refers to these two-dimensional images, and each point in the texture is a pixel on the screen. It is called texel for (pixel).

However, in applying this technique, two-dimensional images, or textures, are applied to the surface of three-dimensional objects in order to reduce the amount of computation, and then the two-dimensional textures are not projected onto the two-dimensional screen (to the part not visible on the screen). In general, the coordinates of the object surface in their three-dimensional space are obtained from each pixel of the image projected on the two-dimensional screen, and then the corresponding two-dimensional texture coordinates are calculated to find the corresponding texel. The color of the pixel is determined.

This texture mapping technique causes an aliasing phenomenon on the screen because an area in the texture space that is mapped to one pixel displayed on the screen is not mapped to exactly one texel area.

For example, in FIG. 1 illustrating the concept of mipmapping, in the case of a road projected onto a two-dimensional screen on the right side of FIG. 1, pixels close to the viewer corresponding to the a or b area of the road are displayed in texture space. Assuming that the texels are mapped to a single texel, pixels in an area far away from the viewer, such as c or d, are mapped to multiple texel areas in texture space, so that a texture value representing multiple texel values can be obtained. If you do not cool the mapping to a pixel value, the image will be distorted.

As an easy way to obtain a representative value of these texels, a method of obtaining and using an average of all texel values in a region mapped into the texture space is widely used. This is called texture filtering.

Since the above-described texture filtering requires a lot of time, a method that is frequently used as a method for speeding it up is the method by mipmapping.

Mipmapping refers to the original texture image (the image at LOD 0 in the drawing is the original texture image, as shown on the left side of Figure 1. LOD (Level Of Detail) refers to how many texel regions in a texture space a pixel on the screen covers). Value) to pre-filter and subsample to create different LOD level textures (mipmaps), and to calculate the LOD and (u, v) computed when the pixels currently scattered on the screen are mapped into texture space. By fetching the necessary texels from the appropriate LOD levels on the mip-mapping by the coordinate values and spreading them on the screen.

Here, the LOD and (u, v) values mapped to the texture space have values below the decimal point (since (x, y) coordinates, which are integer values on the screen, are obtained through a transform matrix, Values currently on the mipmap are those at locations where LOD and (u, v) are integers. Therefore, the texture values at the exact LOD and (u, v) locations where the pixel you want to draw on the screen are mapped into the texture space are not realistic. However, we read the values at the nearest integer location on the mipmap and interpolate them using the relationship to the distance difference at the exact location.

For example, as shown in FIG. 2, a method of obtaining a texel value for a pixel mapped to LOD = 0.6, u = 23.25, and v = 30.50 is as follows.

1) Since LOD is 0.6, first, at the integer coordinate positions ((23, 30), (23, 31), (24, 30), (24, 31)) closest to u = 23.25, v = 30.50 at LOD 0 Read the texel values, and find the representative value at LOD 0 using the actual exact coordinate position and the distance between them.

2) The nearest integer positions u (23.25 / 2 = 11.62, v = 30.50 / 2 = 15.25 to find the value represented by LOD 1 ((11, 15), (11, 16), (12, 15), Read the texel values in (12, 16)) and find the value represented by LOD 1 using the actual exact coordinate position and the relationship between them.

3) The final representative texel value is obtained as shown in FIG. 2 using the difference between the two values represented by LOD 0 and LOD 1 from the actual accurate LOD value (0.6).

In this way, the mipmapping method creates textures of various LOD levels in advance for fast texture mapping, reads 8 texels to obtain the value of the texel that is representative when the program is executed, and interpolates (this interpolation method is called trilinear interpolation). ) Is used as a representative value.

This is a much faster method than the exact filtering method, but the time taken to sequentially read eight texels from memory for mipmapping in real-time three-dimensional graphics is still a big problem.

Accordingly, as a method for fast texture mapping to solve this problem, as shown in FIG. 3, a memory bank capable of storing two LOD levels of texels is separately prepared, and texels stored in each memory bank are separately prepared. By storing the texels' locations in texture space mapped as shown in FIG. 4 (the numbers in each texel area represent the memory banks being stored), accessing eight texels at the same time and passing them to the trilinear interpolator and interpolating them in one clock cycle. A structure for obtaining a representative texel value has been proposed.

However, since the texture images of various sizes are used in the application of the actual 3D graphics system, in order to apply the texram structure as shown in FIG. 3, a memory larger than the texture image to be used in the future must be prepared. If the LOD value changes significantly with every pixel drawing, it takes a lot of time to continuously change the contents in memory. Since this is a factor of inefficient memory usage and price increase, there is a problem in that the structure of FIG. 3 is practically implemented.

Another commonly used concept is that as the LOD level is lowered on the mipmap as shown in Fig. 5, the space for storing the texture image increases exponentially, so that only the textures of the top several LOD levels are raised above the current system memory (clipmap pyramid). The rest of the LOD level values are mapped onto the texture by using a large texture image, leaving only the portion currently drawn on the screen (clipmap stack) and importing the other portions from the hard disk where the entire mipmap is stored, if necessary. A method that can greatly reduce the system memory capacity has been proposed, and this is called a clipmap.

However, this clipmap method is applied between the hard disk and the system memory, and since all operations are performed in software, it is the main purpose to reduce the system memory capacity, not to accelerate the texture mapping.

An object of the present invention for solving the problems of the prior art as described above is to apply the concept of the clip map to the relationship between the system memory and the cache memory for texture mapping cache memory and cache that can accelerate mipmapping in hardware It is to provide a cache miss penalty reduction method that can reduce the penalty incurred in miss.

1 is a conceptual diagram of mipmapping.

2 is an example of trilinear interpolation

3 is a structural diagram of a texram

4 is a texel layout in texram

5 is a conceptual diagram of a clipmap

6 is a conceptual diagram of a cache memory for texture mapping according to an embodiment of the present invention.

7 is a structural diagram of a cache memory for texture mapping according to an embodiment of the present invention;

8 illustrates a process of predicting and replacing a texture subclip.

9 illustrates a process of predicting and replacing a texture stack layer.

Explanation of symbols on the main parts of the drawings

10: first DRAM bank 20: second DRAM bank

21: CAM (Content Addressable Memory)

30: subclip loader 40: trilinear interpolator

50: subclip predictor 60: controller

The technical idea of the present invention for achieving the above object is to create a cache memory that stores only a working set of a texture of a suitable size for mip-mapping acceleration using trilinear interpolation, trilinear in one clock cycle By accessing all eight texels needed for interpolation and constructing a cache with a special structure to obtain the final texel value, texture mapping can be efficiently applied to texture images of various sizes and texture mapping in small and low-cost systems. It is to make acceleration possible.

In addition, to reduce the penalties incurred by cache misses, the penalties incurred by cache misses are reduced by prefetching and predicting the textures that will be needed in the future.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 6, the concept of the cache memory for texture map depletion includes a Clipram pyramid that stores all the top-level (eg, five) LOD levels of texels on the mipmap, and a work currently required among the remaining LOD levels. It consists of a clipram stack that stores only three.

The clipram stack can simultaneously store working sets at four LOD levels, with each LOD level consisting of 16 (4 * 4) subclips. These subclips are prefetched by a hardware prediction that can replace contents from external memory that stores the entire mipmap during normal operation by the subclip predictor that predicts the necessary subclips not only when a cache miss occurs. Yes, this reduces your cache miss penalty.

The structure of the texture mapping cache memory (clip RAM) of the above concept is as shown in FIG.

That is, the first DRAM bank 10 to form a scramble pyramid that stores all the texels for the highest number (eg, five) LOD levels, and only the working sets currently required for the remaining LOD levels. The second DRAM bank 20 and the first and second DRAM banks 10 and 20 forming the scramble stack are simultaneously read from a texture for trilinear interpolation and a SAM for importing a new texture subclip from the outside. Serial access memory) port, connected to the SAM port of the first and second DRAM banks 10 and 20, the subclip loader 30 to retrieve a new texture subclip from the external memory, and 2 on the mipmap Pre-fetching subclips by hardware prediction in order to reduce penalty of cache miss and trilinear interpolator 40 which takes four texels in each layer and performs trilinear interpolation. The sub-clip predictor 50, the controller 60 for controlling the above-described texture mapping cache memory component, and the LOD and (u, v) coordinates mapped onto the texture space of the pixel to be drawn on the current screen are controlled by the controller ( 60), a CAM (Content Addressable Memory) for checking whether eight texels existing at integer coordinate positions around the LOD and (u, v) coordinates exist in the first and second DRAM banks 10 and 20. : 21).

The basic operation of the texture mapping cache memory having the above-described configuration will be described.

First, since all the texels of the top few LODs for the current texture are present on the first DRAM bank 10 for the clip pyramid, the contents need not be changed during execution. However, since only the working sets currently required are stored on the second DRAM bank 20 for the clip RAM stack, the contents need to be changed continuously during execution. When the LOD and (u, v) coordinates mapped into the texture space of the pixel to be drawn on the current screen are input to the controller 60, the eight existing at the integer coordinate positions around the LOD and (u, v) coordinates are inputted. The first and second DRAM banks 10 and 20 are checked by using CAM (Content Addressable Memory: 21) to determine whether texels are present, and when present, the trilinear interpolator 40 performs trilinear interpolation by reading eight texels simultaneously. Do it.

If all eight texels are not present, a cache miss is generated. At this time, the controller 60 causes the subclip loader 30 to bring the subclips containing the necessary texels from the external memory and trilinear. The interpolator 40 reads these and performs trilinear interpolation.

In order to reduce the cache miss penalty, the texture mapping cache memory of the present invention has a subclip predictor 50, which predicts a subclip that will be needed in the future, so that a collision with a subclip currently being accessed during a normal texture cache operation may occur. New subclips can be loaded from outside that do not occur.

When the subclip prediction function of the texture mapping cache memory according to an embodiment of the present invention is described in more detail, the contents of the texture mapping cache memory may be prefetched by hardware prediction in units of subclips. The prediction of sub-clips required by this method consists of two sub-clip predictions and a stack layer prediction in one stack layer.

First, subclip prediction in one stack layer will be described.

FIG. 8 shows the prediction and replacement of subclips that will be needed soon in a stack layer. The upper left figure shows the projection of a road in a three-dimensional space onto a two-dimensional screen. In general, an object in three-dimensional space is modeled as small triangles as shown in the figure, and the data file storing these triangles is a set of consecutive triangles. Therefore, as shown in FIG. 8, when the road is drawn on the screen, consecutive triangle areas are drawn in the direction of the arrow.

8 is a texture image to be coated on the road and four vertices a, b, c and d are mapped to four vertices a, b, c and d on the road in the upper left picture. Therefore, when successive triangles are drawn on the screen in the direction of the arrow, the access pattern of the texture image required for the screen is also accessed in the direction of the arrow in the lower left of FIG. 8.

Using this property, the figure on the right of FIG. 8 shows that subclips on a particular stack layer are predicted and replaced. First, the darkened 4 * 4 subclips (current clip) represent the subclips currently on the clipram stack. The (u, v) trace shows an example of a pattern in which texels are accessed over time. In the drawing, the inner 2 * 2 subclip boundary is a hardware predictive limit and if (u, v) traces exceed this limit, there is no cache miss right now, but it is needed soon to reduce the penalty in case of a miss. Prefetching subclips to be done. The current figure shows the case where the (u, v) trace exceeds the prediction limit on the right, prefetching the four lightly painted subclips on the right into the area containing the left four subclips of the 4 * 4 subclips. do. This allows hardware-predicted prefetching using texture access patterns and, in the best case, allows the necessary subclips to always exist in the cache memory for texture mapping in advance without a cache miss.

FIG. 9 illustrates a process of predicting and replacing a required stack layer according to the LOD change, and the upper and lower left figures are the same as those of FIG. 8. As shown in the figure, when a continuous triangle is drawn in the direction of the arrow, the change of LOD also has a slight change, but increases continuously as a whole. The figure on the right of FIG. 9 shows this continuously increasing LOD trace. The current clipram stack represents the LOD level currently stored in the clipram stack, and the two internal LOD levels are used as stack layer prediction limits. In this example, when the LOD trace exceeds LOD i + 2, the stack layer corresponding to LOD i + 4 is loaded into the area where LOD i was stored, so that the stack layer is prefetched in hardware like subclips. .

As described above, the 3D graphics texture mappump cache memory of the present invention enables hardware acceleration of mipmapping by trilinear interpolation even for texture images of various sizes, and provides a compact and inexpensive 3D graphics system. It is also applicable to enable more realistic and fast three-dimensional graphics.

While the invention has been shown and described with respect to particular embodiments, it will be apparent to those skilled in the art that various modifications and variations can be made without departing from the spirit and scope of the invention as set forth in the claims. Anyone can see it easily.

Claims (6)

First and second DRAM banks 10 and 20 having SAM ports for reading textures for trilinear interpolation and bringing new texture subclips from the outside; A subclip loader (30) connected to the SAM ports of the first and second DRAM banks (10) (20) and for obtaining a new texture subclip from an external memory; A trilinear interpolator 40 which takes four texels in two layers on the mipmap and performs trilinear interpolation; A controller 60 for controlling the entirety of the component; And When the LOD and (u, v) coordinates mapped into the texture space of the pixel to be drawn on the current screen are input to the controller 60, the eight existing at the integer coordinate positions around the LOD and (u, v) coordinates are inputted. And a CAM (21) for checking whether the texel is present in the first and second DRAM banks (10) (20). The method of claim 1, The first DRAM bank 10 forms a clip pyramid that stores all of the texels of several highest LOD levels among all mipmaps, and the second DRAM bank 20 is not stored in the first DRAM bank 10. 3. A cache memory for 3D graphics texture mapping, which forms a clip stack that stores only the working sets currently required at the remaining LOD level. The method of claim 1, The second DRAM bank 20 divides the texture area on one LOD level on the mipmap into n * n subclips, and replaces the contents of the cache memory in units of three-dimensional graphics texture mapping. Memory. The method of claim 1, Data for eight texel accesses at integer coordinate locations around the LOD and (u, v) coordinates mapped onto the texture space of the pixel to be drawn on the screen so that trilinear interpolation can be performed in one clock cycle. And a path between the first and second DRAM banks (10) and the trilinear interpolator (40). The method according to any one of claims 1 to 4, And a subclip predictor (50) for prefetching subclips required in the near future in order to reduce a penalty of cache misses by hardware prediction. The 2 * 2 subclip boundary inside the subclip (4 * 4) on the current clipram stack is the hardware subclip prediction limit, so if the (u, v) trace crosses this limit, then the direction beyond that limit Subclip prediction in one stack layer of prefetching (left, right, top, bottom) subclips; The current clipram stack represents the LOD level (LOD i to LOD i + 3) currently stored in the cliplam stack, and uses the two internal LOD levels as stack layer prediction limits, the next LOD level the moment the LOD trace crosses the limit. A method for reducing a cache miss penalty, characterized in that to reduce a penalty incurred at cache miss by performing stack layer prediction to prefetch a stack layer corresponding to the stack layer.