KR19990028255A - Rake receiver technology for mobile demodulator used in CDMA communication system - Google Patents

Abstract

The present invention relates to demodulation of a signal in a spread spectrum multiple access system using a pilot on the forward link. The rake receiver 10 separates signal processing based on the period during which processing occurs. Symbol rate processing is performed by a single time division multiplication accumulating data path 34 that provides multiple finger shear 312 and searcher shear 314. The front end 312 is a dedicated circuit that performs all chip rate processing and asserts a flag that indicates the result of generating a data vector and ready to be provided by a common data path. The data path controller 308 adjusts the use of the data path between the finger front end 312, the searcher front end 314, and the coupling function, and configures the data path to provide based on first-come first-hand processing. The controller 308 sequences the data paths through a fixed routine as commanded by the signal processing associated with the block to be provided.

Description

Rake receiver technology for mobile demodulator used in CDMA communication system

In a wireless telephone communication system, many users connect to a wireless telephone system by communicating over a wireless channel. Communication over a wireless channel can be one of many multiple access technologies that allow many users in a limited frequency spectrum. These multiple access techniques include time division multiple access (TDMA), frequency division multiple access (FDMA), and code division multiple access (CDMA).

CDMA technology has many advantages. An exemplary CDMA system is disclosed in U.S. Patent No. 4,901,307, issued February 13, 1990 and entitled "Spread Spectrum Multiple Access Communication System Using Satellite or Terrestrial Repeater," and was assigned to the assignee of the present invention. .

The '307 patent discloses multiple access technology in which a plurality of mobile telephone system users, each having a transceiver, communicate via satellite repeaters or terrestrial base stations using CDMA spread spectrum communication signals. The signal transmission path from the base station to the mobile station is referred to as the forward link and the signal transmission path from the mobile station to the base station is referred to as the reverse link.

Using CDMA communication, the frequency spectrum can be reused multiple times to increase user capacity in the system. Each base station provides a coverage area in a limited area and links mobile stations within that coverage area to a public circuit switched telephone network (PSTN) through a cellular system switch. When the mobile enters the effective range of the new base station, the path of the user's call is sent to the new base station.

CDMA modulation described in U. S. Patent No. 5,102, 459, issued on June 25, 1990 and entitled " Systems and Methods for Generating Signal Waveforms of CDMA Cellular Phone Systems " and assigned to the assignee of the present invention. The technique alleviates problems with terrestrial channels such as multipath and fading. Instead of the disadvantages of having a narrowband system, the detachable multipath may be diversity coupled to a mobile rake receiver for enhanced modem performance. In mobile radio channels, multipath is generated by the reflection of signals from obstacles in the environment of buildings, trees, cars, and people. In general, a mobile radio channel is a time-varying multipath channel due to relative motion of a structure forming a multipath. For example, if an ideal impulse is transmitted over a time-varying multipath channel, the received stream of pulses changes position, attenuation, and phase over time as a function of the time that the ideal impulse is transmitted.

The multipath nature of the terrestrial channel generates a signal with several distinct propagation paths at the receiver. One characteristic of a multipath channel is the time spread injected into the signal transmitted over the channel. If the difference in path delay exceeds the PN chip lifetime, spread spectrum pseudo noise (PN) modulation used in CDMA systems distinguishes and combines different propagation paths of the same signal. If a PN chip rate of approximately 1 MHz is used in a CDMA system, the overall gain of spread spectrum processing equal to the ratio of spread bandwidth to system data rate can be used for paths with delays that differ by more than one microsecond. The one microsecond path delay difference corresponds to a path distance difference of approximately 300 meters. Urban environments generally provide path delay differences in excess of one microsecond.

Another characteristic of a multipath channel is that each path through the channel can produce a different attenuation factor. For example, if an ideal impulse is transmitted over a multipath channel, each pulse of the received stream of pulses has a different signal strength than the other received pulses.

Another characteristic of multipath channels is that each path through the channel can produce a different phase in the signal. For example, if an ideal impulse is transmitted through a multipath channel, each pulse of the received stream of pulses generally has a different phase than the other pulses received. This results in signal fading.

When multipath vectors are added destructively, fading occurs, yielding a received signal smaller than each vector. For example, two paths: a first path with a time delay of d with an attenuation factor of X dB and a phase shift of Q radians, and a d shift with attenuation factor of X dB and a phase shift of Q + p radians. If a sine wave is transmitted over a multipath channel having a second path with a time delay of, no signal is received at the output of the channel.

As mentioned above, the PN chip spacing defines the minimum separation and the two paths must be combined. Before the separate paths are demodulated, the relative arrival time (or offset) of the paths in the received signal must first be determined. The demodulator performs this function by searching through a sequence of offsets and measuring the energy received at each offset. If the energy combined with the potential offset exceeds a certain threshold, a demodulation element or "finger" may be assigned to that offset. The signal present at that path offset is summed with the contribution of the other finger at their respective offset.

Methods and apparatus for finger assignment based on searcher and finger energy levels are described in co-pending US patent applications. This application was filed on October 28, 1993 and entitled 08 / 144,902, entitled “Assignment of a System capable of Receiving Multiple Signals,” and was assigned to the assignee of the present invention.

1 illustrates an example signal set arriving at a mobile station from a base station. The vertical axis represents the received power in decibels (dB). The horizontal axis represents the delay of the arrival time of the signal due to the multipath delay. The axis penetrating the drawing (not shown) indicates the time domain. Each signal spike of the common plane of the page reaches a common time but is transmitted by the base station at a different time.

In common terms, the peak to the right is transmitted to the base station at an earlier time than the peak to the left. For example, the leftmost peak spike 2 corresponds to the most recently transmitted signal. Each signal spike 2-7 travels a different path and exhibits different time delays and different amplitude responses.

Six different signal spikes, represented by spikes 2-7, indicate a severe multipath environment. Typical urban environments make the available paths small. The noise floor of the system is represented by peaks and dips with low energy levels.

The task of the searcher is to identify the delay measured by the horizontal axis of the signal spikes 2-7 for potential finger assignment. The task of the finger is to demodulate one of the multipath peak sets to combine into a single output. The task of the finger also tracks the peak once the multipath peak is assigned, even if the peak moves in time.

The horizontal axis can also be thought of as having units of PN offset. At any given time, the mobile station receives various signals from the base station, each of which may travel in a different path and have a different delay than the other. The signal of the base station is modulated by the PN sequence. Local copying of the PN sequence also occurs at the mobile station. In addition, at the mobile station, each multipath signal is demodulated with a PN sequence code assigned to the received time offset, respectively. The horizontal axis coordinates can be thought of as corresponding to the PN sequence code offset used to demodulate the signal at that coordinate.

As indicated by the non-flat ridge portion of each multipath peak, each of the multipath peaks varies in amplitude as a function of time. In a limited time, many changes do not occur in multipath peaks. For a longer time range, multiple peaks disappear and new paths form over time. If the mobile station moves within the area of the base station in the effective range, the peak may slide with an early or late offset as the path distance changes. Each finger tracks a small change in the signal assigned to it.

In narrowband systems, the presence of multipath in a radio channel results in severe fading in the narrow frequency bands used. Such systems have capacity suppressed by the additional transmit power needed to overcome deep fading. As discussed above, the CDMA signal path may be determined and diversity combined in the demodulation process.

The three main forms of diversity are time diversity, frequency diversity, and space / path diversity. Time diversity can be obtained by the use of iteration, time interleaving, error correction and detection coding to introduce redundancy. The system can use each of these techniques in the form of time diversity.

CDMA with inherent wideband uniqueness provides a form of frequency diversity by spreading signal energy over a wide bandwidth. Frequency selective fading, which can cause deep fading in the frequency bandwidth of narrowband systems, affects a small portion of the frequency band used by CDMA spread spectrum signals.

The rake receiver provides path diversity through its ability to combine multipath delay signals, and all paths with assigned fingers are faded before the combined signal degrades. Additional path diversity is obtained through a process known as "soft handoff" in which multiple simultaneous redundant links from two or more base stations are installed with the mobile station. This supports robust links of the challenge environment in the cell boundary region. Examples of path diversity are U.S. Patent Nos. 5,101,501, published March 21, 1992, entitled "Soft Handoff of CDMA Cellular Phone Systems," and April 28, 1992, titled "CDMA Cellular," Telephone system, "US Patent No. 5,109,390, which was assigned to the assignee of the present invention.

For all non-zero time shifts, cross correlation between different PN sequences and autocorrelation of PN sequences have a near zero mean value. This allows different user signals to be identified upon reception. Autocorrelation and cross correlation require a logic "0" to take a value of "1" and a logic "1" to take a value of "-1" or require similar mapping to obtain a zero mean value.

However, these PN signals are not orthogonal. Cross correlation is a random variable with a binomial variance, even though the cross correlation averages to zero over the entire sequence length over a short time interval, such as information bit time. Signals interfere with each other, just as signals are wide bandwidth Gaussian noise at the same power spectral density.

Techniques in which a set of n orthogonal binary sequences for n squares of 2 of length n each can be constructed are known (Digital Communications with Space Applications, SW Golomb et al., Prentice-Hall, Inc., 1964). , pp. 45-64). In fact, an orthogonal binary sequence set is also known for less than 200 and four grant maximum lengths. One kind of such sequence is called a Walsh function. The nth Walsh function can be defined inductively as

Where W 'is a logical complement of W and W (1) = to be.

The Walsh sequence or code is one of the rows of the Walsh function matrix. The nth Walsh function matrix contains n sequences, each length (n) Walsh chip. The nth order Walsh function matrix (as well as other orthogonal functions of length n) has the property that the cross correlation between all the different sequences in the set is zero over an interval of n bits. Every sequence in the set is different from every other sequence in the exact half of that bit. There is always one sequence containing all zeros and every other sequence contains one half of one and zero half.

In the system described in the '459 patent, the call signal starts as 9600 bits per second information source which is converted to 19,200 symbols per second output stream by a rate 1/2 forward error complementary encoder. Each call signal broadcast from the cell is covered with 64 orthogonal Walsh sequences, each 64 Walsh chip, or one symbol for the duration of the lifetime. Regardless of the symbols covered, the orthogonality of all Walsh sequences ensures all interference from other user signals in that the cell is removed during symbol integration. Non-orthogonal interference from other cells limits the capacity of the forward link.

All user signals sent by the base station are quadrature phase shift key (QPSK) spreads using the same in-phase (I) channel PN sequence and quadrature phase (Q) channel PN sequence. Each base station of a CDMA system is transmitted in the same frequency band using the same PN sequence, but has a single offset for the unshifted PN sequence aligned to the universal time reference. The PN spreading rate is equal to the Walsh cover rate of 1.2288 MHz and 64 PN chips per symbol. In the preferred embodiment, each base station transmits a pilot reference.

The pilot channel is a beacon that transmits a constant zero symbol and spread with the same I and Q PN sequences used by the traffic bearing signal. In the preferred embodiment, the pilot signal is covered with all zero Walsh sequences (0). During initial system acquisition, the mobile device searches for all possible PN sequence shifts and, once it finds the pilot of the base station, synchronizes to the system time. As described below, in addition to being used for initial synchronization, the mobile demodulator rake receiver plays a basic role.

2 shows a wireless generic rake receiver demodulator 10 that receives and demodulates the forward link signal 20 arriving at the antenna 18. Analog transmitter and receiver 16 include a QPSK downconverter chain that outputs digitized I and Q channel samples 32 at baseband. The sampling clock, CHIPX8 40, used to digitize the received waveform, is derived with a voltage controlled temperature compensated local oscillator (TCXO).

Demodulator 10 is monitored by microprocessor 30 via data bus 34. Within the demodulator, I and Q samples 32 are provided to the plurality of fingers 12a-c and the searcher 14. Searcher 14 searches for a window of offset that is likely to contain a multipath signal peak suitable for assignment of fingers 12a-c. For each offset in the search window, searcher 14 reports the pilot energy and searches the microprocessor at that offset. If the fingers 12a-c are irradiated, then the weak weak path or the tracking weak path is assigned to an offset that includes the strong path identified by the searcher 14.

Once fingers 12a-c are locked to the multipath signal at the assigned offset, they track their paths until they are lost or reassigned using an internal time tracking loop. This finger time tracking loop measures the energy of either side of the peak at the offset at which the finger is currently demodulating. The difference between these energies forms a filtered and integrated metric.

The output of the integrator controls the decimator to select one of the input samples via chip spacing for use in demodulation. As the peak moves, the finger adjusts the position of the dataator as it moves. The decimated sample stream is despread with a PN sequence whose fingers match the assigned offset. The despread I and Q samples are summed through the symbols to produce a pilot vector (P _I , P _Q ). These same despread I and Q samples are uncovered Walsh using Walsh code assignments unique to the mobile user, and the despread I and Q samples are summed over the symbol to generate a symbol data vector (D _I , D _Q ). . The dot product operator is defined as

P (n) ⋅D (n) = P _I (n) D _I (n) + P _Q (n) D _Q (n)

Where P _I (n) and P _Q (n) are the I and Q components of the pilot signal P for symbol n, respectively, and D _I (n) and D _Q (n) are symbols n, respectively. I and Q components of the data vector (D).

Since the pilot signal vector is stronger than the data signal vector, it can be used as an accurate phase reference for coherent demodulation; The dot product calculates the magnitude of the data vector component in phase with the pilot vector. As described in U.S. Application No. 07 / 981,034, entitled "Carrier Inner Circuit" and assigned to the assignee of the present invention, the Inner Product weights the finger contribution for effective coupling, and the relative strength of the pilot received by that finger. Each symbol output 42a-c is scaled by. Therefore, the dot product performs the finger symbol weighting and phase protection required for the coherent Rake receiver demodulator.

If the long term average energy does not exceed the minimum limit, each finger has a lock detector circuit that masks the symbol output to combiner 42. Only fingers tracking a reliable path contribute to the combined output to enhance demodulation performance.

Due to the relative difference in arrival times of the paths to which each finger 12a-c is assigned, each finger 12a-c aligns the finger symbol streams 42a-c so that the symbol combiner 22 selects the finger symbol stream. It has a deskew buffer that sums to produce a "soft decision" demodulation symbol. This symbol is weighted by the reliability of correctly identifying the originally transmitted symbol. The symbol is sent to a deinterleaver / decoder circuit 28 where the first frame deinterleave and forward error correction decode the symbol stream using a maximum possible Viterbi algorithm. The decoded data is available to other components such as microprocessor 30 or a voice vocoder for further processing.

On the reverse link, in order to maximize system capacity, it is important that all signals from the mobile device are received at the same signal strength in the cell. U.S. Patent No. 5,056,109, issued October 8, 1991, entitled "Method and Apparatus for Controlling Transmission Power of a CDMA Cellular Mobile Communication System" and assigned to the assignee of the present invention, discloses a closed loop power control method. .

The closed loop power control method operates by measuring the signal received by the mobile device and sending a command to the mobile device to increase or decrease the power level of the punctured subchannel on the forward link. Power control symbol combiner 24 extracts the finger symbols of the forward link to sum the symbol output from fingers 42a-c and makes a hard decision of whether to adjust the power to rise or decrease. These decisions are integrated to provide the transmit gain reference level output (TXGAIN 38) to the transmit power amplifiers of the analog transmitter and receiver 16.

To accurately demodulate, a mechanism is needed to align the local oscillator frequency with the clock used in the cell to modulate the data. Each finger evaluates the frequency error by measuring the rotational speed of the pilot vector in QSPK I, Q space using the cross product operator:

P (n) × P (n-1) = P _I (n) P _Q (n-1) -P _I (n-1) P _Q (n)

Frequency error estimates from each finger 44a-c are combined and integrated in frequency error combiner 26. The integrator output (LO_ADJ 36) is supplied to the voltage control of the TCXO of the analog transmitter and receiver 16 to adjust the clock frequency of the CHIPX8 clock 40 and provide a closed loop mechanism to compensate for the frequency error of the local oscillator. do.

In dedicated circuit performance of a mobile rake receiver demodulator, each finger, searcher, and combiner is performed separately as discrete circuitry, each having a direct correspondence to some circuit area on an integrated circuit (IC) die. Each of these blocks is self-contained for signal processing tasks, and the blocks have separate accumulators, multipliers, and comparators. These dedicated circuits, in particular the many multiplier-accumulators required for each finger, require a large die area for performance.

In general digital signal processor (DSP) performance of the demodulator, each finger, searcher, and combiner is performed as a separate code subroutine of the demodulator task. There are many operations that must be performed at the finger and the searcher at PN chip speed. A typical DSP technique executes up to 750 million instructions per second to perform chip rate processing for the searcher and three fingers of FIG. 2 using a PN chip rate of 1.2288 MHz in the preferred embodiment. 75 MIPS DSP consumes considerable power. Power is often a premium for mobile devices that are portable consumer devices. An important advantage of the DSP approach is that it has the flexibility to perform demodulation algorithm changes through firmware changes as compared to generating physical circuit changes as in the case of conventional dedicated circuit approaches.

Dedicated circuitry and general-purpose DSP performance have their respective die area and power, which has not been solved even after size reduction in the most recent IC fabrication processes. Therefore, a more efficient demodulator is needed.

Summary of the Invention

The present invention relates to a method and apparatus for demodulating a signal in a spectral multiple access communication system using a pilot on the forward link. Demodulation techniques embodying the present invention form small area chips that consume less power and cost than performing dedicated circuits or general purpose DSPs.

Multiple areas needed to perform a finger or searcher using dedicated symbol rate circuitry, conventional dedicated circuit access, are removed from the finger and searcher, and their symbol rate functionality is coupled to common data path processing. The finger tip or searcher tip, which is distinguished from the original finger and the searcher, is a dedicated circuit that performs all the chip speed processing associated with the finger or the searcher respectively.

The present invention divides the signal processing function into two groups based on the period during which processing occurs. In particular, the new technology uses a single time division multiplication accumulating (MAC) data path that provides a plurality of finger shear and searcher shears. The data path performs all symbol rate processing combined with the finger and the searcher.

This same data path combines the output of the finger at symbol rate. This produces a demodulated symbol stream, a power control subchannel decision stream used to control the transmit power on the reverse link, and a frequency error estimate used to adjust the local oscillator. In combination with the data path, a small register file RAM stores all state information for shorter signal processing operations than symbols.

Once per integration period for the searcher, or once per symbol for the finger, the front end is pilot pilot demodulated half chip offset from the current finger offset during the I and Q symbol integration results for the pilot, traffic channel symbol data, and time tracking, or searcher. In this case, a data vector consisting of I and Q integrals for the pilot for each of the offsets to be evaluated simultaneously is generated. These outputs are buffered so that the data path is accessed with an accumulated data vector for one symbol, and the front end accumulator sums the data vectors for the next symbol. Depending on the data vector, the front ends express flags indicating that they produce the results that need to be provided by the public data path.

The data path control circuit coordinates the use of the data path between the finger tip, searcher tip, and coupling function in a first-in first-out manner. When queued, the controller sequences the data path through a fixed routine and selects the components of the data vector that operate according to the state information stored in the register file RAM. The controller configures the data path to perform all of the accumulation, multiplication, and comparison combined with signal processing of the block to be provided.

TECHNICAL FIELD The present invention relates to spread spectrum communication systems, and more particularly to signal processing in cellular telephone communication systems.

1 illustrates a severe multipath signal condition.

2 is a block diagram of a conventional mobile demodulator rake receiver.

3 is a block diagram illustrating finger functionality.

4 is a block diagram illustrating searcher functionality.

5 is a block diagram illustrating combiner block functionality.

6 is a block diagram of a split data path description mobile demodulator according to the present invention;

7 is a block diagram of a finger front end;

8 is a block diagram of a searcher front end;

9 is a memory map of state information coupled to symbol rate signal processing of a demodulator.

10 illustrates a sequence timeline of a common data path while providing a finger.

11 illustrates a sequence timeline of a common data path while providing a searcher.

12 illustrates a sequence timeline of a common data path while providing a combiner.

As mentioned above, FIG. 2 shows an overview of the upper level functionality of the rake receiver demodulator 10. Analog front end 16 receives forward link signal 20 via antenna 18 and downconverts to baseband to provide I and Q channel samples 32 to a plurality of fingers 12a-c and searcher 14. ) Searcher 14 searches for a window of offset that is likely to contain a multipath signal peak suitable for assignment of fingers 12a-c. For each offset in the search window, searcher 14 reports the pilot energy and searches for the offset to microprocessor 30. Fingers 12a-c are examined and not assigned by microprocessor 30 or tracking weak paths are assigned an offset that includes the strong paths identified by searcher 14.

All fingers 12a-c include the same functionality as indicated in the finger functional block diagram of FIG. 3. In general dedicated circuit implementation, each element of FIG. 3 has a correspondence to a general purpose physical circuit; In a general purpose DSP implementation, each of these elements has a step corresponding to a signal processing code. In the preferred embodiment, a clear diagram in which the processing occurring at the chip rate and the symbol rate is formed is indicated by the chip symbol processing boundary 98. All elements operating at the chip level are displayed on the left side of the boundary 98 and all elements operating at the symbol rate are displayed on the right side of the boundary 98.

I and Q samples 32 are selected for one of eight samples per chip based on the assigned offset of the finger to decimator 102, which is delayed so that another sample half chip is used for time tracking. Is entered. This sampling, as well as all other chip rate processing in the finger, is dependent on the chip enable strobe 156 from the finger timing generator 122. Finger timing generator 122 tracks the time offset of the multipath peak to be demodulated.

Each of the advances or delays caused by time tracking loop adjustment or slew instruction by the microprocessor to move to a new offset has the effect of reducing or increasing the rate at which the chip enable strobe 156 occurs. In the preferred embodiment, the associated symbol enable strobe 158 manifests a 64 chip enable strobe 156. The finger timing generator reflects any offset change by increasing or decreasing the internal finger position register read by the microprocessor. Finger timing generator 122 also includes an internal location assignment register written by the microprocessor to slew the finger at the new offset during finger reallocation. Once the microprocessor reallocates the finger, the internal mechanism of finger timing generator 122 keeps advancing or delaying the timing until the finger determines that it has its assigned offset.

The decimated on-time and later I and Q chip samples are fed to QSPK despreaders 104a and 104b, respectively. Despreader 104 also receives from I Q PN sequence generator 106 the same PN sequence that is used to spread the data of the base station. I Q PN sequence generator 106 is dependent on chip enable output 156 from finger timing generator 122 and generates a PN sequence that matches the assigned offset of the finger. Alternatively, the sequence output from PN generator 106 is delayed from the relative sequence of the base station by multipath propagation from the base station to the mobile station. Therefore, the despreading process of the demodulator can reverse the spreading process of the modulator with accurate time alignment.

To recover the originally transmitted data, despread I and Q chips are output from the on-time despreader 104a to the exclusive-or (XOR) gate 108, respectively. Walsh sequence generator 100 provides a Walsh chip sequence corresponding to the Walsh code assigned to the mobile station to XOR gate 108 to back the orthogonal cover applied to the base station.

The Walsh code is sent to the finger via the microprocessor data bus 34. If symbol data pairs (D _I (n), D _Q (n)) are generated per symbol for symbol (n), despread and uncovered I and Q chips are generated through I and Q symbol accumulators (110) through symbol spacing. , 112). Since the pilot channel is covered with all zero Walsh codes (0), no separate Walsh sequence generator is needed to recover the pilot. The outputs of the on-time despreader are summed directly by the I and Q accumulators 114 and 116 to produce pilot pairs (P _I (n), P _Q (n)) for symbol (n).

The time tracking loop is driven by the difference of the pilot strength offset half chip from the current finger offset. Therefore, separate sets of I and Q accumulators 118 and 120 sum the despread pilots provided by late despread 104b using the half-chip of sample delay used by the on-time pilot and symbol accumulator. To generate a delayed pilot pair half chip (P _IL (n) and P _QL (n) for symbol (n)) from the on-time pilot pair, late despreader 104b is used by on-time despreader 104a. Use the same PN sequence used. In order to generate an advanced pilot pair half chip (P _IE (n), P _QE (n)) from the on-time pilot pair, late despreader 104b is generated by despreader 104a. Use the PN sequence delay chip used The time tracking loop uses half chip advance and delay pilot pairs for the other symbols, with each symbol enable strobe 158 accumulators 110, 112, 114, 116 and 118. 120 is cleared and starts summing through the next symbol spacing The element described above performs all chip rate processing occurring on the finger shown left of the boundary 98 in Fig. 3. A net of this chip rate processing ( net) result is a vector of data, one per symbol.

This is processed at the symbol rate by the element shown on the right side of the boundary 98 of FIG.

As shown in the I and Q pilot filters 132 and 134 of FIG. 3, symbol rate processing begins by filtering on time I and Q pilot data (P _I (n), P _Q (n)). This filtering reduces symbol variations in the pilot reference and provides a steady reference for phase protection and scaling behavior of the dot product.

In a preferred embodiment, the I and Q pilot filters 132 and 134 are configured as simple first order infinite impulse response (IIR) filters. For each symbol, the portion of the current filter value is removed and the new inputs (pilot data (P _I (n), P _Q (n)) are summed to add the new filter outputs (Pf _I (n), Pf _Q (n)). Create)).

Once per symbol, the dot product circuit 130 is expressed in equation (2) by dot product with the D _I (n), D _Q (n) symbol vectors and the filtered pilot vectors Pf _I (n), Pf _Q (n). Perform a defined inner action. This produces a scalar value that indicates the magnitude of the data symbol in phase with the pilot scaled by the strength of the received pilot.

After truncation and restriction (not shown) used to renormalize the inner product to the relevant bits, this symbol output is written to the symbol deskew buffer 144. The deskew buffer is a first-in, first-out (FIFO) buffer written with the specific symbol alignment of the finger provided by the symbol enable strobe 158. The deskew buffers of all fingers are read using the same combiner symbol enable strobe (not shown). This compensates for the different offsets and allows the fingers to be assigned and the symbol combiner 22 to sum up the symbol streams from the different fingers.

The symbol output of the deskew buffer is masked by the AND gate 152 when the finger is released from the locked state. Lock state 148 is an indicator that the finger is tracked in a reliable and reasonable strong path, and if the finger is unlocked, mask the finger symbol output to produce a high quality combined symbol stream output from combiner 22.

Signal processing to determine the lock state begins with the energy circuit 140 using the I and Q pilot filter outputs and corresponds to the energy of the pilot for the peak being tracked [Pf _I (n) ² + Pf _Q (n) ² ]. This energy is filtered by the lock detection filter 142 to produce a long term average finger energy level. During finger reassignment, the microprocessor 30 reads this finger energy and compares it with the most recent multipath peak found by the searcher 14 by the searcher as the multipath environment changes and the peak increases. Reassign your fingers to the highlighted river path.

In the preferred embodiment, the lock detection filter 142 is configured as a simple first order IIR filter. For each symbol, the portion of finger energy retained in the filter is removed and the energy result output from energy circuit 140 is summed to produce a new filtered finger energy output.

The limit comparison block 150 compares the finger energy output from the lock detection filter 142 with the lock limit and the lock release limit written to the block by the microprocessor 30. If the finger energy is above the lock limit, the locked state 148 is locked. If the energy is below the lock release limit, the lock state 148 is in the unlock state. Otherwise, the lock state 148 does not change. This creates a hysteresis effect in the lock state 148, and once the finger is unlocked, its energy rises above the lock limit and locked, and once the finger is locked, the energy falls below the lock release limit and is released.

Once per symbol, the filtered pilot vectors for the previous symbols Pf _I (n-1), Pf _Q (n-1) and the filtered pilots (Pf _I (n), Pf _Q (n)) External circuit 146 performs the external operation defined in equation (3). This generates a scalar value representing the rotational speed of the pilot in QSPK I, Q space, and measures the frequency error between the local oscillator clock and the clock used to transmit the signal at the base station. After truncation and restriction (not shown) used to renormalize the external result with the relevant bits, this frequency error is masked by the AND gate 154 when the finger is in the unlocked state to track a reliable and reasonable strong path. When the finger provides the LO_ADJ signal 36.

As discussed above, while the mobile device changes its position with respect to the object in its environment, the time tracking loop maintains the finger centered with the assigned multipath peak even as the peak moves. Among consecutive symbols, the half chip offset pilot symbol integration pairs (P _IL (n), P _QL (n), P _IE (n), P _QE (n)) are alternated by later symbol accumulators 118, 120. Is output. Once per symbol, the energy circuit 136 is either [(P _IL (n) ² + P _QL (n) ² ] or [P _IE (n) ² ) corresponding to the energy of the pilot half chip offset later or earlier than the peak to be tracked. + P _QE (n) ² ] Time track filter 138 calculates the difference between these two energies.

[(P _IL (n) ² + P _QL (n) ² ]-[P _IE (n-1) ² + P _QE (n-1) ² ]

This difference forms the metric used to drive the second order low pass filter. The gains of the primary and secondary contributions are specified by the microprocessor 30. This changes the wide filter bandwidth during the initial acquisition to a narrow bandwidth that can further reduce spurious out-of-band noise when the finger is locked. The time track filter outputs progress or delay when the optimal phase leakage phase overflows or underflows. This is fed back to the finger timing generator 122 which each compresses or extends the chip period by a single CHIPX8 clock. This adjusts the finger offset to one-eighth chip to recenter the peaks of the track being tracked.

After the microprocessor 30 has specified a search window start offset (written into the search timing generator 200), and a search window length (written into the search control block 206), the searcher 14 passes through the search window. Evaluate each offset of the search window of the sequence. For each offset, the searcher integrates the pilot through the specified number of chips (written in navigator timing block 200), calculates the resulting pilot energy, and writes it in (search control block 206). Add some pilot energy over a specified number of intervals. The output of the searcher is a trace of the multipath environment of the search window as shown in FIG. Multipath traces need to be returned directly to the microprocessor, or the data volume needs to be adjusted to adjust the microprocessor, and the searcher can filter the results and report only the sorted list of the largest peaks searched in the search window.

In the preferred embodiment, if the finger processing is split into chip rate and symbol rate processing, the searcher is divided into two functional groups as indicated by the search functional block diagram of FIG. In a typical dedicated circuit implementation, each of the elements of FIG. 4 has a correspondence with the circuit; In a general purpose DSP implementation, each of these elements has a corresponding step in the signal processing code. All devices operating at the chip level are displayed on the left side of the boundary 198, and all devices operating once per integration interval are displayed on the right side of the boundary 198.

Searcher 14 is provided with I and Q samples 32 input to decimator 102. Like fingers 12a-c, which can select one of eight decimations of input data, searcher decimator 102 always samples a fixed half chip offset during the search. Since the searcher evaluates the search window in half chip increments, the decimator 102 can be fixed and the coarse sweep is sufficiently detailed not to miss the candidate path. Once a finger is assigned to a path searched by the searcher, it quickly centers the path even if the peak falls between two half chip separation search results. Sampling is dependent from the seek timing generator 200 to the chip enable strobe 214 as well as the other chip speeds of the seek.

Each generated by a search delay generated by the search control block 218 as proceeding sequentially through the search window, or by a slew by the microprocessor 30 to start a new search at a different starting offset. This has the effect of decreasing or increasing at the rate at which the advance or delay chip enable strobe 214 is generated. The searcher timing generator 200 also outputs a sum_done strobe 216 indicating that the search integration interval has completed.

The searcher timing generator 200 stores the net effect of all offset changes in an internal searcher location register that can be read by the microprocessor 30. The search timing generator 200 also includes an internal location allocation register written by the microprocessor to slew the new offset to the search. When the microprocessor 30 stalks the searcher 14, the internal mechanism of the searcher timing generator 200 advances or delays the searcher timing until the searcher 14 determines that its assigned offset is reached. When the assigned offset is reached, searcher 14 initiates a designated search starting with the first offset of the search window.

With fingers 12a-c, at searcher 14, the decimated on-time and later I and Q chip samples are provided to QPSK despreaders 104a and 104b, respectively. Despreader 104 also receives the same PN sequence from I Q PN sequence generator 106 as used to spread the data at the base station. The I Q PN sequence generator 106 generates a PN sequence equal to the current offset evaluated by the searcher, even if it is dependent on the chip enable output 214 from the searcher timing generator 200. The searcher measures the pilot strength at each offset and eliminates the need for a Walsh sequence generator searched at the finger.

The outputs of on-time despreader 104a are directly summed by on-time I and Q accumulators 162 and 164 and the outputs of late despreader 104b are directly summed by I and Q accumulators 166 and 168, Generate a data vector once per integration interval:

{P _I (n), P _Q (n), P _IL (n), P _QL (n)}

It is processed at the integral interval velocity by the element shown to the right of the boundary 198 of FIG.

In a preferred embodiment, two offsets, namely on time and late pairs, are evaluated simultaneously by the searcher. This parallel relationship is necessary to allow the searcher to generate multipath traces for common search windows at a faster rate than changes to the multipath environment. The signal processing described in the preferred embodiment can also apply additional despread accumulator pairs that can be used to obtain additional search performance without loss of generality if necessary.

After each integration interval, the energy circuit 202 calculates [P _I (n) ² + P _Q (n) ² ] corresponding to the on-time pilot energy, and the energy circuit 204 calculates the offset evaluated by the searcher. Calculate [P _IL (n) ² + P _QL (n) ² ] corresponding to the late pilot energy for. The on-time pilot energy is summed over several integration intervals by the non-coherent accumulator 208 and the late pilot energy is summed by the non-coherent accumulator 210.

When the specified number of integration intervals have passed, the results of the noncoherent accumulators 208, 210 are passed to a search result processor 212. The searcher control block 206 reduces the internal offset count and generates a delay with the searcher timing generator 200. This causes the searcher to advance to the next offset of the search window.

The despreading starts a PN sequence that matches the evaluated new offset, and the late accumulators 162, 164, 166, 168 are cleared and begin to sum the despread pilot chips for the new offset. The search control blocks are arranged sequentially through a specified number of chips in the search window and return the searcher to the idle state until commanding another searcher window.

In the aforementioned US patent application 08 / 144,902, entitled "Assignment of Demodulation Elements of a System capable of Receiving Multiple Signals," the preferred embodiment assigns a finger based on the best result found in the search window. In the preferred embodiment, four best results are tracked in search results processor 212 (more or fewer results may be stored in other embodiments). The result register to result preprocessor 212 stores a sorted list of the largest peaks searched and their corresponding offsets. If the most recent search result provided by the noncoherent accumulator 208 or 210 exceeds what is stored in the best result list, the control logic of the result processor 212 discards the fourth best result and replaces it with a new location in the list. Insert the offset that corresponds to the energy. There are many ways known in the art to provide this sorting function. One of them may be used within the scope of the present invention.

The search result processor 212 also has a local maximum filter function that compares the energy obtained at the adjacent offset with the current energy. If possible, the local maximum filter prevents the best results list from being updated if the results do not indicate local multipath peaks, even if they are quality for nesting. In this way, the local maximum filter prevents strong and wide "smear" multipaths from filling multiple entries of the best result list, and there are no separate multipaths that can form better candidates for demodulation.

The local maximum filter is performed directly. The current search result is compared with the result of the preceding offset, and the comparison result indicative of the slope of the peak is traced. The slope transition from positive to negative indicates a local maximum and enables a list of best results to be updated. The slope latch can be properly initialized and the boundary edge offset allows for nesting to be taken into account.

At the end of the search, the best list is provided to the microprocessor. Only the largest peak that needs to be examined by the microprocessor 30 greatly reduces the amount of processing and the microprocessor 30 uses a searcher task.

FIG. 5 shows a functional overview of the processing for symbol combiner 22, power combiner 24 and frequency error combiner 26 of the mobile demodulator of FIG. 2. Once per symbol, the symbol combiner performs the deskew symbol streams 42a-c from three fingers and sums them through the adder 262, and after cutting and limiting (not shown), are aligned to the counterparts in the cell. Descramble the combined soft decision symbol through the XOR gate 270 of FIG. 6 using user specified long code 280 time. User field code 280 is unique to each user and consists of parameters that are not broadcasted over the air during call setup and provide some amount of privacy. The user PN generator is inserted at a time aligned with the combiner timing generator 264. The combiner timing generator 264 outputs combiner symbol strobes 282 independent of the finger symbol strobes 158a-c mentioned in the enabling simultaneously read from the symbol deskew buffer 144 of the fingers 12a-c. .

Combiner timing generator 264 has an input TX_PCG signal 278 that is input from the modulator of the modem (not shown), which indicates a mobile device transmitted on the reverse link during the previous power control group. In a preferred embodiment, the power control group is 1.25 msec, which may be a gate sent by the mobile device on the reverse link. When the mobile device is sent, TX_PCG 278 informs the combiner to listen for the power control decision of the closed loop power control decision subchannel of the forward link.

Bits sampled from the user PN sequence 280 determine whether forward link traffic symbols in the power control group are punctured to provide power control decision bits. In a preferred embodiment, depending on the application, the power control decision punctures one or two symbols. During the punctured symbol, combiner timing generator 264 asserts the PUNCT signal 284. This masks the symbol data so that the symbol data stream 46 provided to the deinterleaver and decoder is removed. By giving the strong forward error correction code used in the preferred embodiment, decoder 28 can reconstruct the punctured symbols.

Power combiner 24 uses the same three deskew finger symbol streams used by symbol combiner 22. Power combiner 24 is three separate adder accumulator pairs that allow the mobile device to monitor power decisions from three different cells. Only one of these adder accumulator pairs is active, and in two or three soft handoffs, the mobile device takes power decisions from two or three cells at the same time.

Cell (0) uses adder 246 and accumulator 252; Cell 1 uses adder 248 and accumulator 254; The cell 2 uses an adder 250 and an accumulator 256. Once per symbol, adders 246, 248 and 250 sum the resulting combined symbols into two consecutive symbols if two symbol punctures are used. During soft handoff, fingers 12a-c may be freely assigned between cells as a multipath environment during each cell change.

To provide maximum flexibility, AND gates 240a-c, 242a-c, 244a-c provide microprocessor 30 with means for changing cells from one cell to another. For example, if not soft handoff, adder accumulator pairs 246 and 252 of cell (0) are used. All three AND gates 240a-c are enabled, AND gates 242a-c, 244a-c for cells 1 and 2 are disabled, and finger contributions to adder accumulator pairs 248, 254. Mask and close effectively.

In three methods of soft handoff, one finger is assigned to each cell and each of the AND gates 240a-c, 242a-c, 244a-c is with two AND gates from each disabled group. When enabled, all three adder accumulator pairs are activated. The signal bits of the accumulators 252, 254, 256 form a "up = 0" or "down = 1" crystal.

In soft handoff, if any one cell is required for the mobile device to reduce its transmit power, this indicates a loud noise coming into the mobile device to clear the cell and other cell decisions should be ignored. This logic is input to an OR gate 258 that combines power determination from an active cell. The output of the OR gate 258 representing the final combined decision is summed in TXGAIN accumulator 268.

The TXGAIN accumulator is enabled by the PUNCT signal 284 and allows the transmit gain output to be adjusted in response to the power decision symbol. The TXGAIN value is converted to an analog voltage level by an external RC that filters the TXGAIN output of the pulse density modulator (PDM) 276, and the density for the set time interval is proportional to the input provided by the TAGAIN ACCUM 268. Output the pulse train.

Once per symbol, frequency error combiner 26 takes the frequency error streams 44a-c from three fingers and sums it through adder 260, and after truncation and limiting (not shown), the combined frequency error is LO_ADJ. The accumulator 266 is added to provide a local oscillator control criterion. The LO_ADJ value is converted to an analog voltage level by an external RC filtering the LO_ADJ output 36 of the PDM 274. PDM 274 outputs a pulse train where the density for the set time interval is proportional to the input value provided by LO_ADJ ACCUM 266.

In general dedicated circuit implementation, each of the multipliers, accumulators, and comparators described in FIGS. 3, 4, and 5 are performed separately as discrete circuits, with each device directly in a few circuit areas on the integrated circuit (IC) die. Corresponds. Of interest is the four multiplier accumulators used to perform replicated on-time pilot filter energy, initial or late pilot filter energy, external operation, and internal operation for each finger.

These structures take a large amount of die area for performance, the inventor recognizes the entire symbol to complete the processing, and the functionality can be performed more effectively using a common data path. The resulting hybrid technique, which includes elements of a dedicated circuit and a general purpose DSP approach, is shown in FIG. All of the finger chip speed circuits shown on the left side of line 98 in FIG. 3 and the searcher chip speed circuits shown on the left side of line 198 in FIG. 4 are finger front end 312 and searcher front end 314, respectively. The remaining of the is preserved in a dedicated circuit. All finger symbol velocity processing shown on the right side of line 98 of FIG. 3, all the searchers for the integral spacing shown on the right side of line 198 of FIG. 4, the combiner function of FIG. 5 is the common multiplier-accumulator data path 300. Is integrated into.

Fingertips 312, one per symbol, generate data vectors consisting of traffic channel symbol data, on-time pilots, and I and Q symbol integrations for early or late pilots. Once per integration interval, searcher front end 314 generates a data vector consisting of the I and Q symbol integration results for on time and late pilots. The components of the data vector are accessed by a common data path via a three-phase bus that is shared in common by the finger-front and searcher-fronts.

One per symbol, combiner timing generator 264 outputs combiner symbol enable 282, fingertips output respective symbol enable 158a-c, and once per searcher integration interval, the searcher outputs signal (sum_done). Output 126. The data path control circuit 308 uses these strobes to coordinate the use of the data path 300 between the finger shear 312 and the searcher shear 314 that combines the functionality of the first input, first foundation. do. Once queued, the controller 308 sequences the data path 300 via the microcode command stored in the microcode ROM 306. The microcode configures internal elements of the data path 300 to perform the accumulation, multiplication, and comparison necessary for signal processing of the provided block. The controller reads and writes from random access memory (RAM) 304, which acts as a register file that stores all demodulator state information stored across symbol boundaries. These include these items as a sorted list of various filter values for each finger 12a-c as the deskew memory and the largest peak for the searcher 14.

7 is a block diagram of the finger shear 312. The chip accumulators 110, 112, 114, 116, 118, 120 perform the same function of chip speed processing of the finger of FIG. 3. In the finger symbol enable strobe 158, the data vector outputs of these accumulators are latched by half latches 350a-f, buffering the data vectors so that the finger chip accumulators store the data vector for the next real ball. Starting to sum, the values latched in half latches 350a-f wait for a turn to be processed by common data path 300. The half latches 350a-f are three-phase buffers 352a-f that are output to a common bus shared between all finger and searcher ends. The three-phase bus 174 is a distribution multiplier, and the data path controller 308 selects one of the three-phase drivers 352a-f of the finger front end or the search front end to advance to the bus. Three-phase bus 174 provides data access to all components of the various data vectors with minimal routing overhead. By updating the value of the finger timing tracking filter, fingertip timing generator 122 receives the external advance or delay 160 generated by data path controller 308.

8 is a block diagram of the searcher shear 314. The chip accumulators 162, 164, 166, 168 perform the same functions as the chip speed processing of the searcher of FIG. 4. At the searcher sum_done boundary 216, the data vector outputs of these accumulators are latched by half latches 360a-d, buffering the data vectors so that the searcher chip accumulator begins to sum the data vectors for the next symbol, and The values latched in the latches 360a-d wait for the order to be processed by the common data path 300. The half latches 360a-d are three-phase buffers 362a-d that are output to the common bus 174 shared with the finger front end. The data path controller 308 selects one of the three phase drivers 362a-d to proceed to the bus, and the data path is provided to the searcher. Since the processing of one offset and moving to take into account the next offset of the search window, the searcher front end timing generator 200 receives the external searcher delay caused by the data path controller 308.

Referring to FIG. 6, data path 300 includes two operand input latches 322, 326. These operand latches may include values from multiplier ((MUX) 320 and MUX 324 independently selected from three-phase data vector bus 174 or register file RAM 304. For example, When square (P _IL (n)) for half-chip late pilot energy calculation is used for time tracking; when MUX 320, 324 selects an input from the data vector input bus. Pf _I (n) is selected by the MUX 324 and read from the register file RAM captured by the latch 326, and D _I (n) for the finger is selected by the MUX 320 and the latch 322. The two operand latches are multiplied by multiplier 328.

Multiplier 328 is a parallel combined multiplier that calculates the product of two operands within a single clock cycle. Operands stored in multiplier output or latch 326 are selected via MUX 330 to be summed by an adder with accumulator feedback latch 342.

All arithmetic operations in the data path are performed using a complementary value of 2, a complementary inversion of 1 is performed using XOR 332 to fix the LSB of the adder to 1, and the output of MUX 330 is conditionally It can be subtracted instead of being added. AND gate 336 may mask the feedback of accumulator latch 342 summing to adder 334, and the output of MUX 330 may be loaded into accumulator latch 342 instead of summing to its previous content. have.

The output of the adder provides a programmable limiting step 338 that selects only the relevant adder output bits for the operation to be performed in conjunction with the programmable normal step 340. By renormalizing the results after each operation, truncating the LSB below the system noise layer, saturating the MSB, and operating all values can be maintained as a double precision word without bit overflow.

The data vector provided on three-phase bus 174 is 10 bits in the preferred embodiment as a single precision word. The frequency error stored in the finger symbol and register file RAM 304 is stored as 20 bits in the preferred embodiment as a double precision word. Register file RAM 304 is comprised of two banks that can be accessed independently to access a single precision word or a double precision word together.

The storage map of the register file 304 of the preferred embodiment is composed of two RAM banks of 64 10-bit words as shown in FIG. The memory in the register file is divided into finger pages, searcher pages, and combiner pages. The field configuration in the finger page is the same for each finger, the index of the fingertip to be provided forms a page selection, and the finger state value accessed from the register file 304 is specified as an offset into the selected page. For each finger 12a-c, the symbol deskew buffer memory, the I and Q pilot filter values and the delay version for the cross product, the time track filter values, and the lock energy filter values are all stored in the register file.

The register file contains the microprocessor write registers, i.e., lock and unlock limits, initial finger energy and frequency accumulator entries used for the second time tracking loop after the finger has completed the slew. The register file also contains microprocessor read registers, i.e., finger energy and frequency accumulator entries used in the secondary time tracking loop. These values are stored more efficiently in RAM than discretely illustrated read and write latches; The microprocessor read / write tab 344 provides a port through which the microprocessor can read or write these values, and temporarily stops sequencing the data path while access is being performed. The microprocessor does not access these values frequently, so any resulting delay in data path sequencing is not critical.

For searcher 14, the register file is the classification of the four strongest peaks and their corresponding offsets searched by the searcher, as well as the median of the on-time and later noncoherent accumulators, as well as the previous energy used for local maximum detection. Remember the list. For the combiner, the register file, as well as the state of the TAGAIN accumulator 268 and the LO_ADJ accumulator 266, when storing two consecutive punctured symbols, stores the state of the cell accumulators 252, 254, 256. Initial values of the TXGAIN and LO_ADJ accumulators 268, 266 can be specified by the microprocessor 30, and these current values are read by the microprocessor 30 by the read / write tab 344.

Referring to FIG. 6, the limited and normalized adder output is captured by accumulator latch 342. The output of accumulator latch 342 is fed back to adder 336 for summation, the contents of which can be written to register file RAM 304. The output of the latch 342 is captured at an appropriate time by the TXGAIN PDM 274 and the LO_ADJ PDM 276, and the updated TXGAIN or LO_ADJ accumulator values are written to the register file RAM, respectively. While providing the combiner function, the data path generates at one point a symbol where accumulator latch 342 is coupled to the output. As already described for the same circuit shown in FIG. 5, the combined symbols are scrambled by the XOR gate 270 and erased by the AND gate 272, and the user PN sequence 280 and the PUNCT signal 284. Is output to the combiner timing generator 264.

By facilitating implementation, in a preferred embodiment, sequencing data paths such as finger lock state, slope latch for local maximum filter, read and write pointers for finger deskew buffer, noncoherent accumulation and current search offset count. The data path control circuit 308 carries control logic instead of through additional storage allocation and data path sequencing of the register file 304, which is realized by a predetermined state, which is a discrete latch. By tracking the read and write deskew buffer pointers, the largest time interval adjusted by combiner timing generator 264 or finger timing generator 122 is each symbol interval strobe 282, 158.

The data path controller 308 uses the sine bit output 348 from the adder 334 as a flag to control the data path sequencing for the lock limit, unlock release limit, local maximum filter, and classification period of the best searcher result list. do. If the sine bit 346 overflows while calculating a new time track filter output, this advances or delays the finger by CHIPX8. When this occurs, advance or delay commands 160a-c are fed back from the data path controller 308 to the finger tip 312 provided by the data path. Through microprocessor data bus 34, microprocessor 30 assigns an integral number to data path controller 308 to perform each offset and offset number in the search window. The microprocessor also specifies a finger enable for the cell for power coupling to the data path control, and the finger time tracking loop gain can directly write the lock state of the finger and replace the value determined by the lock limit comparison.

As described above, the finger front end, coupler function, or searcher front end is served in the first-come first-hand manner as the respective symbol enable strobes 158a-c and 282, and the sum_done strobe 216 is declared. The data path controller 308 queues the requesting elements and causes the data path 300 to be processed as soon as it completes the provision of the previous requesting elements. Providing more than two device requests at exactly the same time, data path controller 308 assists in assigning one of the controversial elements to queues and other lines. Since the finger-front and searcher-front outputs are buffered, the data path is sub-sized until the next symbol result is overwritten in the data vector of the buffer. As long as the data path has additional clock cycles available for the symbol period, each finger 12a-c may be provided before the next symbol boundary is generated under the worst queue scenario.

While progressing, the finger time tracking loop cuts off the minor clock cycle off between successive symbol strobes 158. This is the case when the multiple fingers 12a-c slew in the progressive direction. In this scenario, the fingers 12a-c advance by one chip so that the spacing between successive symbol strobes 158 is halved. Rather than designing data path sequencing, they have enough headroom to adjust the worst queue pattern using 256 clock intervals, and finger timing generators 122 have their symbol enable strobe outputs 158a- as they advance. c) Suppress, complete slew and re-enable when the assigned offset is reached.

Once queued, the controller is configured to sequence the data paths through a fixed processing sequence and to perform a comparison combined with all accumulations, multiplications, and signal processing of the block to be provided. The type of device to be provided forms page selection into the microcode ROM 306 and sequencing the clock count forms the microcode ROM address using the offset as the selected page. The microcode ROM output specifies the components going to the data vector three-phase bus 174 and is accessed from or to the register file RAM 304 and control word, label c [16: 0], and the common data path 300 Constitutes an internal element. Signals c [0], c [2], c [4] respectively form a multiplex select input for MUX 324, 320, 330; Signals c [1], c [3], c [16] enable latches 326, 322 and 342, respectively; The signals c [5], c [6], c [7] control the conditional subtraction and load functions for the adder 334, and the fields c [11:80], c [15:12] Specifies a limiting and normalized bit position for the output of adder 334.

The sequence of operations performed by the data path on successive clock cycles while providing the fingertip 312 is shown in FIG. Symbol rate processing of the fingers described in the relationship of FIG. 3 will be described. During each cycle, the table of FIG. 10 shows the components proceeding to three-phase data vector bus 174, accesses to or from register file RAM 304, c [16: 0] data path control words, and of FIG. 3. A useful brief comment with reference to the description of symbol rate signal processing for a finger.

First, the pilot filter is updated by subtracting the sum of the current level and the sum at the on-time Q and Q accumulator outputs from the selected fingertip during the clock cycle (0-6). During clock cycles 7-9, the dot product is calculated using the filtered pilot and the symbol accumulation output of the selected fingertip. During clock cycles 10-13, the cross product is calculated using the filtered pilot stored in register file 304 and the filtered pilot value of the previous symbol. This energy is written to a temporary scratch position in the register file 304, and the lock detection filter is updated by subtracting a portion of the current level during clock cycles 17-18.

The pilot energy for the current symbol is read and summed during clock cycles 19-21 to yield a new lock detection filter value written to register file 304. The new lock state is also determined by comparing the lock and unlock limits during clock cycles 20-21. During clock 22-24, late pilot energy is calculated, subtracted from the initial pilot energy obtained in the previous symbol and read from register file RAM 304 to issue a late-initial energy delta metric to create a second time tracking loop. Drive.

The time track metric is written into register file 304 and read back its location and entered into the data path. Scaled by the microprocessor specified gain constant K1 and loaded into the accumulator output latch 342 during clock cycle 27. This scaled value is added to the time tracking frequency accumulator component of the secondary filter. The updated time tracking frequency accumulator is written to the register file 304 and immediately reads its position back into the data path. Is summed with the scaled time tracking metric by the microprocessor specified gain constant K2 during clock cycle 32. During clock cycle 34, this value is summed with the time tracking phase accumulator component of the secondary filter, and the new phase accumulator value is written to register file 304. Therefore, the data path requires a total of 35 clock cycles to process the finger for each symbol.

The sequence of operations performed by the data path of successive clock cycles while providing the search front end 314 is shown in FIG. Follow the integration interval for the searcher described in connection with FIG. During clock cycle (0-2), the pilot energy for late pilot integration is calculated. During clock cycle 3, this energy is summed with the intermediate noncoherent accumulator value, and a new sum through the number of integral intervals elapsed during clock cycle 4 is written to register file 304. These same operating integrations occur during clock cycles 4-8. As indicated by the solid line shown after clock cycle 8 in FIG. 11, if searcher 14 is integrated to perform at the same offset, the data path completes the provision of the searcher.

If there is a final integration interval for the current offset, processing continues. Local maximum filter processing occurs during clock cycles 9-12. Data path 300 determines the slope of the weighted path trace between on time and late offset results and between the previous offset on time result and the late offset result stored in register file 304. When the slope latch transitions from "1" to "0", the local maximum is detected. Data path 300 may consider the peaks included in the sorted list of the largest peaks searched.

Starting with peak (0), in clock cycle 13, keeping the strongest peak and peak 3 in clock cycle 23, the energy for the current offset being processed is compared to the stored peak. If the input energy is greater than the stored energy to be compared, the input energy writes the stored energy and simultaneously replaces the input energy in the accumulator latch 342. By going from large to small peaks, if the input energy exceeds the memorized peak, all lower peaks are automatically demoted, as well as the peak comparison process. In the preferred embodiment the minimum seek integration interval is 32 chips, with a single integration interval per offset, and the data path 300 supports the searcher by requiring 24 clock cycles for all 32 chip integration intervals.

A sequence of operations performed by the datapath on successive clock cycles to perform the combiner function is shown in FIG. This performs symbol rate processing for the combiner function mentioned in connection with FIG. One desk finger symbol per clock cycle is read from register file 304 and finally combined on clock cycle 3 to generate a limited and truncated soft decision symbol. During clock cycles 4-8, 9-13, 14-17, similar summations per finger occur on the punctured symbols for cell 0, cell 1, and cell 2 power control decisions, respectively. If two symbol punches are used, the combined punching symbols may be summed with previous combined symbols while the cell is being processed, and also stored in file 304. When the hard up / down decisions are sequenced for each cell on their own, OR gate 258 is a separate gate in data path control 308 using adder sine bit output 346. During clock cycles 19-20, a +1 or -1 based on the combined power determination is added to TXGAIN read from register file 304. When it is rewritten to register file 304, the new TXGAIN value is translated into machine language by PDM 276. During clock cycles 22-24, one finger frequency error per clock cycle is read from register file 304 and summed to create a new frequency error adjustment, which is added to the LO_ADJ value read from register file 304. The new LO_ADJ value is translated into machine language by the PDM 274 when it is rewritten to the register file 304. Therefore, the data path requires a total of 28 clock cycles to process the finger for each symbol.

The technique of the present invention has several advantages. For example, because complex processing blocks are split across a set of front end blocks, the ability to demodulate additional signal paths can be added by simply adding a new front end block. The front end block does not require a large die area and significantly lowers the price of the extended demodulation capability in this form. With 512 CHIPX8 clocks per symbol, the data path has unused cycles, in excess of the amount needed to execute many "headroom" or split signal processing tasks.

As calculated in the description of Figures 10, 11 and 12, the present preferred embodiment using the minimum searcher integration interval divided by three fingers and the data path into 32 chips, for a 512 CHIPX8 symbol interval, achieves 35% utilization. A total of 181 of the 512 available clock cycles, corresponding, use a finger for 105 clock cycles, a searcher for 48 clock cycles, and a combiner for 28 clock cycles. Another way to explain this is the operation of the data path at 3.5 MIPS. This illustrates the importance of off-loading simple chip-rate functions to dedicated searchers and fingertips, which reduces signal processing requirements from 70 MIPS to 3.5 MIPS. This directly refers to the saving of power, and the power consumed by the dedicated front end is re-added only in part of that amount. For extension in the form or amount of finger and searcher processing, or to support higher data rate services with corresponding shorter symbol periods, the headroom simply increases the period in which the divided data paths are clocked. Can be increased.

The demodulation technique embedded in the present invention is a mixture of traditional dedicated circuitry and a general purpose DSP approach. Compared with the approach of the dedicated motor, the divided data path consumes less power and is significantly smaller than the divided symbol rate circuit described in FIGS. 3, 4 and 5. Soon the split data path will be miniaturized, and using 10 bits of single precision math and 20 bits of double precision math, not much required processing task will be created. The hybrid approach maintains the flexibility of coding algorithms in firmware instead of dedicated circuits. The timeline sequences of FIGS. 10, 11 and 12 form the basis for the microcode kernel, and the finger, searcher and combiner functions are all performed in microcode below 100 lines.

The above description of the preferred embodiments provides that it is possible for any person skilled in the art to make or use the present invention. Various modifications to the embodiment will be apparent to those skilled in the art, and the described general principles may be applied to other embodiments without using the inventive features. Therefore, the invention is not limited to the embodiments described herein but is to be accorded the widest scope consistent with the above principles and the novel features disclosed herein.

Claims (13)

A plurality of finger shears, each front end comprising: a finger shear for receiving spread signals and performing chip rate signal processing coupled with a spread spectrum demodulation device; A buffer coupled to the plurality of fingertips to buffer the accumulated data vector per symbol; A storage device for holding state information coupled to the symbol rate signal processing of the spread spectrum demodulation device; An arithmetic data path coupled to a storage device and a buffer and having a symbol output to perform a symbol rate multiplication and accumulation function combined with signal processing of a spread spectrum demodulation device; And A data control circuit coupled to the arithmetic data path to coordinate use of the arithmetic data path between the plurality of fingertips; And spread spectrum demodulation device for use in a multiple access communication system. The method of claim 1, wherein the arithmetic data path, A first signal coupled to the plurality of fingertips and a second input coupled to the memory device, the first signal being selected from one of the fingertips of the plurality of fingertips or the memory device, and the selected first signal A first multiplexer for outputting the; A second input coupled to the plurality of finger shears and a second input coupled to the memory device, the second signal being selected from one of the finger shears of the plurality of finger shears or the storage device, and the selected second A second multiplexer for outputting a signal; A multiplier having a first input coupled to the first multiplexer and a second input coupled to the second multiplexer, the multiplier outputting a product signal; A third multiplexer having a first input coupled to a multiplier output and a second input coupled to a second multiplexer output and outputting the selected second signal or product signal; An adder / subtracter having a first input coupled to the third multiplexer output and a second input coupled to the arithmetic data path output signal and outputting a sum signal; A limiting / normalizing circuit, coupled to the adder / subtractor output, for selectively limiting the sum signal to a predetermined range and providing a normalized sum signal; And A latch coupled to the limit / normalization circuit for storing the normalized sum signal, the latch providing an arithmetic data path output signal; A spread spectrum demodulation device comprising a. The method of claim 1, A searcher shear coupled between the received spread signal and the arithmetic data path to calculate signal energy of the received plurality of spread signals; And And a symbol combiner coupled to the arithmetic data path for coupling the symbol output to the demodulated symbol stream. 4. The apparatus of claim 3, wherein the data control circuitry also adjusts the use of arithmetic data paths between fingertips, searcher shears, and symbol combiners. The method of claim 3, wherein the searcher shear, A pseudo noise sequence generator for generating an I sequence and a Q sequence; A decimator coupled to the received spread signal to generate an I on-time signal, a Q on-time signal, an I late signal, and a Q late signal by selectively sampling the received spread signal; A first despreader coupled to the I and Q sequences from the pseudo noise sequence generator and to the I and Q on-time signals and generating a first despread I signal and a first despread Q signal; A second despreader coupled to the I and Q sequences from the pseudo noise signal generator and generating a second despread I signal and a second despread Q signal; As a plurality of accumulators, the first accumulator is coupled to the first despread I signal, the second accumulator is coupled to the first despread Q signal, the third accumulator is coupled to the second despread I signal, and the fourth accumulator An accumulator coupled to a second despread Q signal, the sum of the I or Q signals of each of the plurality of accumulators; A plurality of latches each coupled to one accumulator of the plurality of accumulators; And A timing generator for controlling the first and second despreaders, the pseudo noise sequence generator, and the plurality of accumulators; A spread spectrum demodulation device comprising a. The finger front end of each of the plurality of finger front ends, A pseudo noise sequence generator for generating an I sequence and a Q sequence; A decimator coupled to the received spread signal to generate an I on time signal, a Q on time signal, an I late signal, and a Q late signal by selectively sampling the received spread signal; A first despreader coupled to the I and Q sequences from the pseudo noise sequence generator and to the I and Q on-time signals and generating a first despread I signal and a first despread Q signal; A second despreader coupled to the I and Q sequences from the pseudo noise signal generator and generating a second despread I signal and a second despread Q signal; A Walsh sequence generator for generating a Walsh chip sequence; An uncover circuit coupled to the Walsh chip sequence generator for inverse orthogonal cover of the first despread I and Q signals in response to the Walsh chip sequence; As a plurality of accumulators, the first accumulator is coupled to the first despread I signal, the second accumulator is coupled to the first despread Q signal, the third accumulator is coupled to the second despread I signal, and the fourth accumulator An accumulator coupled to a second despreading Q signal, a fifth and a sixth accumulator coupled to an uncover circuit, and the plurality of accumulators sum respective respective I or Q signals; A plurality of latches, each coupled to one accumulator of the plurality of accumulators; And A timing generator controlling the first and second despreaders, the pseudo noise sequence generator, and the plurality of accumulators; A spread spectrum demodulation device comprising a. Receiving a spread signal by the plurality of finger shears; Performing chip rate signal processing coupled to a spread spectrum demodulator on the received spread signal; Buffering an accumulated data vector of spread signals received per symbol; Storing state information combined with symbol rate signal processing of a spread spectrum demodulator in a storage device; Performing a symbol rate multiplication and accumulation function combined with signal processing of the fingertip; And Adjusting and sequencing symbol rate multiplication and accumulation between the plurality of fingertips; A spread spectrum demodulation method of a multiple access communication system, comprising: a. 8. The method of claim 7, wherein the adjusting and sequencing comprises: Adjusting a plurality of finger shear, coupler, and searcher shears; Performing searcher integration interval multiplication and accumulation functions combined with signal processing at the searcher front end; And Performing a symbol rate accumulation function combined with the signal processing of the combiner; Method further comprising a. 8. The method of claim 7, wherein the symbol rate multiplication and accumulation steps include: Generating a multiplying signal by multiplying a first signal or memory device from one finger front end of the plurality of finger shears with a second signal or memory device from one finger front end of the plurality of fingertips; Generating a sum signal by adding the product signal or the second signal to a feedback signal; Generating a limited sum signal by limiting the sum signal to a predetermined range; Normalizing the limited sum signal to produce a normalized signal; And Latching the normalized signal to produce a feedback signal; Method comprising a. 10. The method of claim 9, further comprising latching the first signal and the second signal. A controller for controlling a wireless telephone; A receiver for receiving a wireless signal; And A demodulator coupled to the controller and receiver for demodulating a wireless signal, The demodulator, A plurality of finger shears, each receiving a spread signal and performing chip rate signal processing coupled with a spread spectrum demodulator; A buffer coupled to the plurality of fingertips for buffering the accumulated data vector per symbol; A memory for holding state information associated with the symbol rate signal of the spread spectrum demodulator; An arithmetic data path coupled to the storage device and the buffer and having a symbol output to perform a symbol rate multiplication and accumulation function combined with signal processing of a spread spectrum demodulator; A data path control circuit coupled to the arithmetic data path to coordinate use of the arithmetic data path between the plurality of fingertips; A searcher shear coupled between the plurality of received spread signals and the arithmetic data path to calculate signal energy of the received spread signals; And A symbol combiner coupled to the arithmetic data path to combine the symbol output into a demodulated symbol stream; And a radio for communication in a multiple access communication system. Receiving a spread signal by the plurality of finger shears; Performing chip rate signal processing coupled to a spread spectrum demodulator on the received spread signal; Buffering an accumulated data vector of spread signals received per symbol; Storing state information coupled with symbol rate signal processing of a spread spectrum demodulator; Performing a symbol rate multiplication and accumulation function combined with signal processing of a spread spectrum demodulator to provide a symbol output; Adjusting and sequencing symbol rate multiplication and accumulation between the plurality of fingertips; And Combining the symbol outputs to generate a demodulated signal; A spread spectrum demodulation method of a multiple access communication system, comprising: a. Receiving a spread signal by the plurality of finger shears; And And performing chip rate signal processing coupled to the spread spectrum demodulator on the received spread signal.