KR19990026587A - Drive circuit and panel structure of liquid crystal display device for extending gate signal - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit and a panel structure of a liquid crystal display for increasing the pulse width of a gate signal. The present invention relates to a first data line receiving a data signal from a first data driver and a data signal from a second data driver. A second data line, a first pixel portion of an odd-numbered row connected to the first data line, a second pixel portion of an even-numbered row connected to the second data line, and two adjacent rows from the gate driver connected to two adjacent pixels In driving a panel of a thin film transistor-liquid crystal display device including a gate line to which a gate signal is applied to simultaneously drive pixels of a graphic device, a graphic controller and a graphic controller outputting data signals and control signals to be displayed on a screen. Line memory and line menu for temporarily storing the data signal of the line unit output from Controlling read and write operations of the line memory so that the input data signal can be output together with the stored data signal when the data signal corresponding to one row is temporarily stored in the memory and then the data signal corresponding to the next row is input to the line memory. And a memory controller, and an interface circuit for generating a data signal corresponding to two rows output from the line memory and a control signal for processing the same and outputting the control signal to the panel.

Description

Driver circuit and panel structure of liquid crystal display device for extending gate signal

The present invention relates to a drive circuit and a panel structure of a thin film transistor-liquid crystal display device, and more particularly, to a drive circuit and a panel structure of a liquid crystal display device for increasing the pulse width of a gate signal.

A liquid crystal display device is a device that displays image information by applying an image data signal to be displayed on a screen to each liquid crystal pixel.

In particular, in the active matrix thin film transistor-liquid crystal display device, in order to apply a data signal to each liquid crystal pixel, the thin film transistor used as a switching element should be turned on and off periodically. It is necessary to apply a high voltage gate signal to the gate terminal of the thin film transistor.

FIG. 1 illustrates a panel structure of a typical thin film transistor-liquid crystal display device, and as shown in FIG. 1, gate lines formed in the horizontal direction of the panel (... Gn-1, Gn, Gn + 1 ...) When the gate signal is sequentially applied through the thin film transistor TFT, the thin film transistor TFT is driven by the gate signal so that the data signal applied through the data lines Dn-1, Dn, Dn + 1 ... The image can be displayed by filling the capacitor Clc and the storage capacitor Cst.

As a driving method of the thin film transistor-liquid crystal display device configured as described above, a single scan method for sequentially driving gate lines formed on a panel one by one and a dual scan for simultaneously driving two gate lines ( There is a dual scan method. In general, the dual scan method is a method of driving a gate line of an upper panel and a gate line of a lower panel simultaneously by dividing a panel into upper and lower parts.

However, in the case of the single scan method, as the size of the panel increases, the number of gate lines increases, thereby shortening the time for which the gate signal is applied to the gate lines as a whole. Therefore, there is a problem in that the luminance of the entire screen is lowered because the time for charging the data signal to the liquid crystal capacitor is insufficient.

Therefore, in order to compensate for the problem of the single scan method, the dual scan method is used. As the method drives the gate line of the upper panel and the gate line of the lower panel as described above, the gate signal is applied to the gate line. By doubling the time compared to the single scan method, it is possible to ensure sufficient time for the data signal to be charged in the liquid crystal capacitor.

However, in order to apply a dual scan method to a panel using a dual bank, a frame memory for storing data signals corresponding to 1/2 screen content is required. This increases the manufacturing cost of the system.

Accordingly, an object of the present invention is to solve the above-mentioned problem, and the pulse width of the gate signal is extended by dual-scanning the panel using a line memory that stores a data signal corresponding to one line of the screen. The present invention provides a drive circuit and a panel structure of a liquid crystal display device.

1 illustrates a panel structure of a typical thin film transistor-liquid crystal display device;

2 illustrates a panel structure of a thin film transistor-liquid crystal display device according to an embodiment of the present invention;

3 is a view illustrating a driving circuit of a thin film transistor-liquid crystal display device having a panel structure as shown in FIG. 2;

4 is an output signal timing diagram of the driving circuit shown in FIG. 3.

The liquid crystal display panel according to the present invention for achieving the above object,

An upper data line receiving a data signal from an upper data driver,

A lower data line receiving a data signal from a lower data driver,

A first pixel portion of an odd (or even) row connected to the upper data line,

A second pixel portion of an even (or odd) row connected to the lower data line, and

And a gate line connected to two adjacent rows of pixels and receiving a gate signal from the gate driver to simultaneously drive two adjacent rows of pixels.

The drive circuit of the liquid crystal display device which concerns on this invention for achieving said subject,

A graphic controller for outputting data signals and control signals to be displayed on the screen;

A line memory for temporarily storing a row-level data signal output from the graphic controller;

When the data signal corresponding to one row is temporarily stored in the line memory and the data signal corresponding to the next row is input to the line memory, the input data signal may be output together with the stored data signal. A memory controller for controlling the read and write operations of

And an interface circuit for generating a data signal corresponding to two rows output from the line memory and a control signal for processing the same and outputting the control signal to the liquid crystal display panel.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention.

2 is a diagram illustrating a panel structure of a thin film transistor-liquid crystal display device according to an exemplary embodiment of the present invention, and FIG. 3 is a view illustrating a driving circuit of a thin film transistor-liquid crystal display device having a panel structure as shown in FIG. 2. to be.

As shown in Figure 2, the panel structure according to the embodiment of the present invention should be different from the conventional panel structure.

In other words, in a panel driven by a conventional dual bank, a data line for driving pixels corresponding to the same column is formed as one of an upper data line and a lower data line. However, in a panel according to an exemplary embodiment of the present invention, pixels corresponding to the same column are selected. Data lines for driving are formed differently according to rows. That is, if a pixel corresponding to an odd row is connected to an upper data line (... Dn-1 (up), Dn (up), Dn + 1 (up) ...), the pixel corresponding to an even row Is formed in a structure connected to the lower data lines (... Dn-1 (dn), Dn (dn), Dn + 1 (dn) ...).

In addition, in the conventional gate method, the storage capacitor Cst of each pixel is directly connected to the gate line of the previous stage. It is formed in a structure connected to the gate line of the front end. This is because each pixel is connected to a different data line along the row.

Furthermore, in the present invention, since two adjacent gate lines formed in the panel, that is, the odd-numbered gate line and the even-numbered gate line are connected to each other to receive a gate signal, the gate signal is simultaneously applied to the even-numbered gate line and the odd-numbered gate line. And is applied for the same time. This reduces the number of gate driver ICs in half while doubling the time that the gate signal is applied to the gate line.

Due to this new panel structure, the data signal processing method of the driving circuit should also be different from the conventional method. The processing of the data signal of the liquid crystal display driving circuit according to the exemplary embodiment of the present invention will be described with reference to FIG. Let's explain.

As shown in FIG. 4, first, the line memory 20 includes data corresponding to one horizontal period 1H by the write enable signal WE and the read enable signal RE output from the memory controller 30. After temporarily storing the signal DATA_IN, when the data signal DATA_IN corresponding to the next 1H is inputted, the stored 1H data signal and the input 1H data signal, that is, the data signal DATA_OUT corresponding to 2H, are simultaneously output. .

Next, when the horizontal start signal STH_UP of the upper bank and the horizontal start signal STH_DN of the lower bank are output in cycles of the divided gate clock signal 2CPV, the data signals corresponding to 1H are respectively supplied to the upper and lower data drivers. When (DATA_OUT) is input in series, and then the vertical start signal STV and the shift signal TP are output, the gray scale voltages corresponding to the data signals stored in the upper and lower data drivers are simultaneously applied to the pixels of the panel in parallel. do. At this time, both the gate signal Gon and the shift signal TP are output in a period of two divided gate clock signals 2CPV. With this control signal timing, the pixels of the panel can be driven with a gate signal having a pulse width twice as long as the gate signal output in synchronization with one cycle of the conventional gate clock signal, thereby increasing the overall brightness of the screen. There is this. In addition, since the structure of the dual bank has two data lines formed for one pixel, dot inversion is possible when driving a high voltage, so that excellent image quality can be expected and data frequency is reduced to 1/2. The advantage is that the set up and hold time margin of the signal can be increased.

Therefore, the effect of the present invention is that by using the line memory instead of the frame memory when driving the dual bank of the liquid crystal display panel, the brightness of the screen can be improved by increasing the pulse width of the gate signal while reducing the manufacturing cost.

Claims (3)

A first data line receiving a data signal from the first data driver, A second data line to receive a data signal from a second data driver, A first pixel portion of an odd-numbered row connected to the first data line, A second pixel portion of an even row connected to the second data line, and A panel structure of a thin film transistor-liquid crystal display device including a gate line connected to two adjacent rows of pixels and receiving a gate signal from the gate driver to simultaneously drive two adjacent rows of pixels. A first data line receiving a data signal from a first data driver, a second data line receiving a data signal from a second data driver, a first pixel portion of an odd-numbered row connected to the first data line, and the second data A thin-film transistor-liquid crystal display including a second pixel portion of an even-numbered row connected to a line, and a gate line connected to pixels of two adjacent rows and receiving a gate signal from the gate driver to simultaneously drive two adjacent rows of pixels In driving the panel of the device, A graphic controller for outputting data signals and control signals to be displayed on the screen; A line memory for temporarily storing a row-level data signal output from the graphic controller; When the data signal corresponding to one row is temporarily stored in the line memory and the data signal corresponding to the next row is input to the line memory, the input data signal may be output together with the stored data signal. A memory controller for controlling the read and write operations of And an interface circuit for generating a data signal corresponding to two rows output from the line memory and a control signal for processing the same and outputting the control signal to the panel. In claim 2, And the interface circuit generates a control signal synchronized with a two-divided gate clock signal.