KR19980060629A - Manufacturing method of fine pattern of semiconductor device - Google Patents

Manufacturing method of fine pattern of semiconductor device Download PDF

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KR19980060629A
KR19980060629A KR1019960079991A KR19960079991A KR19980060629A KR 19980060629 A KR19980060629 A KR 19980060629A KR 1019960079991 A KR1019960079991 A KR 1019960079991A KR 19960079991 A KR19960079991 A KR 19960079991A KR 19980060629 A KR19980060629 A KR 19980060629A
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photosensitive film
semiconductor device
manufacturing
silicon
protecting group
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KR100403324B1 (en
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김형기
복철규
백기호
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김영환
현대전자산업 주식회사
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/265—Selective reaction with inorganic or organometallic reagents after image-wise exposure, e.g. silylation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

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  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials For Photolithography (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

본 발명은 반도체소자의 미세패턴 제조방법에 관한 것이며, 보다 상세하게는 실리레이션 공정을 진행하는 고집적 반도체 소자의 미세패턴 제작시, 248nm 파장의 광에 작동하는 화학 증폭형 레지스트의 보호기의 비율을 높여 합성함으로써, 식각선택비차를 높여 미세 패턴의 형성이 용이한 방법에 관한 것이다.The present invention relates to a method for manufacturing a micropattern of a semiconductor device, and more particularly, to increase the ratio of a protecting group of a chemically amplified resist that operates on light of 248 nm wavelength when manufacturing a micropattern of a highly integrated semiconductor device undergoing a silicidation process. By synthesizing, the etching selectivity is increased to facilitate the formation of a fine pattern.

Description

반도체소자의 미세패턴 제조방법Manufacturing method of fine pattern of semiconductor device

본 발명은 반도체소자의 미세 패턴 제조방법에 관한 것이며, 보다 상세하게는 고집적 반도체소자의 미세회로 제작시 실리레이션 공정을 사용할 때, 248nm 파장의 광에 작동하는 화학증폭성 레지스트의 보호기의 비율을 높여 합성함으로써, 선택비를 높혀 미세 패턴 형성을 형성할 수 있는 방법에 관한 것이다.The present invention relates to a method of manufacturing a fine pattern of a semiconductor device, and more particularly, to increase the ratio of the protecting group of the chemically amplified resist that operates on light of 248 nm wavelength when using the silicide process in the production of the microcircuit of the highly integrated semiconductor device. By synthesis | combination, it is related with the method which can raise a selection ratio and can form fine pattern formation.

반도체 제조의 미세가공 공정에서 고감도를 달성하기 위해, 근래에는 화학증폭성인 DUV(Deep Ultra Violet) 포토레지스트가 각광을 받고 있으며, 그 조성은 광산발생체(photoacid generator)와 산에 민감하게 반응하는 구조의 매트릭스 고분자를 배합하여 제조한다.In order to achieve high sensitivity in the microfabrication process of semiconductor manufacturing, a chemically amplified deep ultra violet (DUV) photoresist has recently been in the spotlight, and its composition is sensitive to photoacid generators and acids. It is prepared by blending the matrix polymer.

미세 패턴 형성에 사용되는 이 화학증폭성 DUV 레지스트는 주로 PPHS(poly para-hydroxy styrene)을 기본으로 하고, 여기에 15% 이하의 낮은 비율을 보호기(protection group)으로 t-부톡시 카르보닐기(이하 t-BOC이라 함)를 결합시켜 사용하고 있다.This chemically amplified DUV resist used to form fine patterns is mainly based on poly para-hydroxy styrene (PPHS), with a lower proportion of 15% or less of t-butoxycarbonyl group (hereinafter referred to as t) as a protection group. -BOC) is used in combination.

그러나 이러한 성분의 화학증폭성 레지스트는 15% 이하의 낮은 비율의 보호기를 가지고 있으므로 노광되었을 경우, 노광 영역과 비노광영역의 히드록시(-OH)기의 분포 차이가 작아서 실릴화 선택성이 낮으므로 TSI(Top-Surface Imaging) 공정에 사용하기 어렵다.However, since the chemically amplified resist of such a component has a low proportion of protecting groups of 15% or less, when exposed, the difference in the distribution of hydroxy (-OH) groups in the exposed and non-exposed areas is small, so that the silylation selectivity is low. Difficult to use in Top-Surface Imaging processes

이에 본 발명자들은 기존의 화학증폭성 DUV 레지스트의 상기와 같은 문제점을 해결하기 위해 연구한 결과, 화학증폭성 DUV 레지스트의 주쇄의 전체 단위체 대 보호기의 블록 비율을 15% 이상으로 올려 합성하므로써 실릴화 선택성을 높여 미세 레지스트 패턴을 형성할 수 있다는 것을 확인하여 본 발명을 완성하게 되었다.Accordingly, the present inventors have studied to solve the above problems of the conventional chemically amplified DUV resist, and as a result, the silylation selectivity is synthesized by increasing the block ratio of the total unit to the protecting group of the main chain of the chemically amplified DUV resist to 15% or more. The present invention was completed by confirming that a fine resist pattern could be formed by increasing the value.

따라서, 본 발명의 목적은 광 리소그래피 공정에서 미세 레지스트 패턴을 용이하게 형성하여 소자의 고집적화에 유리한 반도체소자의 제조방법을 제공하는 데에 있다.Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor device, which is advantageous for high integration of devices by easily forming a fine resist pattern in an optical lithography process.

도 1은 본 발명의 레지스트를 TSI 공정에 적용하는 과정을 도식화한 도면.1 is a diagram illustrating a process of applying a resist of the present invention to a TSI process.

상기와 같은 목적을 달성하기 위한 본 발명에 따른 반도체소자의 미세 패턴 제조방법의 특징은, 소정 구조의 반도체기판상에 피식각층을 형성하는 공정과, 상기 피식각층상에 실리레이션용 감광막을 도포하되, 상기 감광막의 주쇄의 전체 단위체 량에 대한 보호기의 비율이 15% 이상의 형성하는 공정과, 상기 감광막을 선택노광하는 공정과, 상기 감광막의 노광된 부분에 실리레이션 공정을 진행하여 선택적으로 실리콘을 주입시켜 실리콘 주입층을 형성하는 공정과, 상기 실리콘 주입층을 마스크로 노출되어 있는 감광막을 제거하여 실리콘 주입층을 상부에 가지는 감광막 패턴을 형성하는 공정과, 상기 감광막 패턴과 실리콘 주입층을 마스크로 피식각층을 식각하여 피식각층 패턴을 형성하는 공정을 구비함에 있다.In order to achieve the above object, a method of manufacturing a fine pattern of a semiconductor device according to the present invention includes the steps of forming an etched layer on a semiconductor substrate having a predetermined structure, and applying a silicide photosensitive film on the etched layer. Forming silicon in a proportion of 15% or more to the total unit weight of the main chain of the photoresist film, selectively exposing the photoresist film, and performing a silicide process on the exposed portion of the photoresist film to selectively inject silicon; Forming a silicon injection layer, removing a photoresist film exposed by the silicon injection layer as a mask, forming a photoresist pattern having a silicon injection layer thereon, and coating the photoresist pattern and the silicon injection layer as a mask. Etching each layer to form a pattern to be etched layer.

이하, 본 발명에 따른 반도체소자의 미세 패턴 제조방법에 관하여 첨부 도면을 참조하여 상세히 설명한다.Hereinafter, a method of manufacturing a fine pattern of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

도 1a 내지 도 1d는 본 발명에 따른 반도체소자의 미세 패턴 제조공정도이다.1A to 1D are diagrams illustrating a process of manufacturing a fine pattern of a semiconductor device according to the present invention.

도 1a 및 도 1b를 참조하면, 먼저, 반도체기판(10)상에 피식각층(12)을 형성하고, 상기 피식각층(12)상에 실리레이션용 화학증폭형 감광막(14)을 도포하되, 상기 감광막(14)은 기존의 실리레이션용 감광막에 보호기(protection group)가 첨가합성된 것이다.1A and 1B, first, an etched layer 12 is formed on a semiconductor substrate 10, and a chemically amplified photosensitive film 14 for silicide is applied on the etched layer 12. The photosensitive film 14 is obtained by adding a protection group to the existing photosensitive film for silicidation.

상기 감광막(14)은 화학증폭형 DUV 감광막의 주쇄에 전체 단위체 대 보호기의 블록 비율을 15% 이상으로 합성하여 실리레이션 선택성을 높게 한 것으로서, 일반적인 감광막 재질로 많이 사용되는 폴리-파라-히드록스티렌(poly para-hydoxy styrene)의 경우, 파라-히드록시 스티렌 단량체에 대하여 t-부톡시카르보닐기(tertiary-butoxy carbonyl; t-BOC) 블록 비율을 15% 이상 높여준다.The photosensitive film 14 synthesizes a block ratio of the total unit to the protecting group of 15% or more in the main chain of the chemically amplified DUV photosensitive film to increase silicidation selectivity, and poly-para-hydroxystyrene is widely used as a general photosensitive film material. In the case of (poly para-hydoxy styrene), the ratio of tertiary-butoxy carbonyl (t-BOC) block to the para-hydroxy styrene monomer is increased by 15% or more.

그 다음 상기 감광막(14)을 투명기판(22)상에 광차단막 패턴(24)이 형성되어 있는 노광마스크(20)를 사용하여 선택 노광하여 노광영역(16)을 형성한다.Thereafter, the photosensitive film 14 is selectively exposed using an exposure mask 20 having a light blocking film pattern 24 formed on the transparent substrate 22 to form an exposure area 16.

이때 상기 노광영역의 보호기는 광에 의해 광산발생제에서 생성된 H+와 열공정(baking)에 의해 끼져 수산기가 된다. 그리고, 비 노광영역의 보호기는 그대로 남아있게 된다. 이렇게 노광영역과 비 노광영역의 -OH가 분포 차이에 의해 실리레이션화제의 규소원자의 확산속도차이, 즉 실리레이션 선택도가 증가된다.At this time, the protecting group of the exposure area becomes a hydroxyl group by being interposed by H + generated from the photoacid generator by light and by thermal baking. The protecting group in the non-exposed area remains as it is. Thus, the difference in the diffusion rate of silicon atoms of the silicide agent, that is, the selectivity of the silicide is increased due to the difference in the distribution of -OH in the exposed and non-exposed areas.

또한 화학 증폭형 감광막은 193nm 파장의 광에 대한 투과도가 낮지만, TSI 공정의 얕은 노광의 특성으로 193nm 파장의 광에 대한 실리레이션용 레지스트로 충분히 사용할 수 있다.In addition, the chemically amplified photosensitive film has a low transmittance with respect to light having a wavelength of 193 nm, but can be sufficiently used as a silicide resist for light having a wavelength of 193 nm due to the shallow exposure characteristic of the TSI process.

상기의 감광막(14)은 통상의 감광막용 중합체 제조에 사용되는 단량체를 통상의 라디칼 중합개시제를 사용하여 통상의 라디칼 중합 조건에서 라디칼 중합하여 중합체를 형성하고, 통상적으로 보호기 도입에 사용되는 방법을 사용하여 적절한 보호기를 도입하여 제조한다.The photosensitive film 14 is a method of radically polymerizing a monomer used for preparing a photosensitive film polymer under ordinary radical polymerization conditions using a conventional radical polymerization initiator to form a polymer, and a method generally used for introducing a protecting group. By introducing an appropriate protecting group.

이러한 중합체는 벌크 중합과 용액 중합 등을 통하여 중합시키고, 중합용매로는 시클로헥사논, 메틸케틸케톤, 벤젠, 토뢴, 디오산, 디메틸포름 아미드 등의 단독 용매 또는 이들의 혼합용매를 사용할 수 있다. 중합 개시제로는 벤조일퍼옥시드, 2,2'-아조비스이소부티로니트릴(AIBN), 아세틸퍼옥시드, 라우릴퍼옥시드, t-부틸퍼아세테이트, t-부틸 퍼옥시드, 디-t-부틸 퍼옥시드 등 일반적인 라디칼 개시제를 사용할 수 있다.Such a polymer is polymerized through bulk polymerization, solution polymerization, or the like, and a single solvent such as cyclohexanone, methyl ketil ketone, benzene, tosox, dioic acid, dimethylformamide, or a mixed solvent thereof may be used as the polymerization solvent. As the polymerization initiator, benzoyl peroxide, 2,2'-azobisisobutyronitrile (AIBN), acetyl peroxide, lauryl peroxide, t-butyl peracetate, t-butyl peroxide, di-t-butyl peroxe General radical initiators, such as a seed, can be used.

본 발명의 미세 패턴 형성 방법에 있어서 보호기로 사용할 수 있는 것은, 예를 들어, t-부톡시카르보닐, 4-이소프로필옥시카르보닐 옥시스티렌(iPOC; 4-isopropyl oxycarbonyl oxystyrene), t-부톡시카르보닐 메톡시(tBCM; tertiary-butoxy carbonyl methoxy), 파라-트리메틸실릴(TMS; para-trimrthul silyl), 파라-테트라히드록피라닐(THP; para-tetrahydro pyranyl) 등으로 구성된 그룹에서 선택된 것이다.What can be used as a protecting group in the fine pattern formation method of this invention is t-butoxycarbonyl, 4-isopropyloxycarbonyl oxystyrene (iPOC; 4-isopropyl oxycarbonyl oxystyrene), t-butoxy, for example. It is selected from the group consisting of carbonyl methoxy (tBCM; tertiary-butoxy carbonyl methoxy), para-trimethylsilyl (TMS; para-trimrthul silyl), para-tetrahydropyranyl (THP; para-tetrahydro pyranyl).

도 1c를 참조하면, 상기 노광영역(16)이 형성된 감광막(14)을 실리레이션 공정을 진행하여 노광영역에 실리콘 원자를 확산시켜 실리콘 주입층(18)을 형성한다. 이때 노광영역(16)은 보호기가 깨지고 히드록시기가 생성되고, 비노광 영역은 보호기 그대로 유지된다. 상기 노광 영역(16)의 히드록시기를 실리레이션화제의 규소(Si) 반응하여 실리콘옥사이드(SiO)가 생성되고, 비노광 영역에서는 보호기가 그대로 남아있기 때문에 Si와의 반응이 일어나지 않는다. 상기 실릴화제로는, 1,1,3,3,5,5-헥사케틸시클로트리실라잔(HMCTS;1,1,3,3,5,5-hexamethylcyclotri silazane), 비스 디메틸아미노디메틸실란(B(DMA)DMS; (bis(dimethylamino)dimethylsilane), 비스 디에틸아미노메칠실란(B(DMA)DMS; (bis(dimethylamino)methylsilane), 디에틸아미노트리메틸실란(TMSDEA; n,n-diethylaminotrimethylisilane), 1,1,3,3-테트라메틸디실라잔(TMDS; 1,1,3,3-tetramethyldisilazane), 헥사메틸디실라잔(HMDS; hexamethyld isilazane), 디메틸실린디메칠아민(DMSDMA(dimethylsilyldimethylamine), n,n-디메틸아미노트리메틸실란(TMSDMA; n,n-dimethylaminotrom ethylsilane) 등과 같은 통상의 실릴화제가 포함된다.Referring to FIG. 1C, a silicon injection layer 18 is formed by diffusing silicon atoms in the exposure area by performing a silicidation process on the photosensitive film 14 having the exposure area 16 formed thereon. At this time, the protecting region is broken in the exposure region 16, a hydroxyl group is generated, and the non-exposure region is maintained as it is. Silicon oxide (SiO) is produced by the silicon group (Si) reaction of the hydroxy group in the exposure region 16, and the reaction with Si does not occur because the protecting group remains as it is in the non-exposed region. Examples of the silylating agent include 1,1,3,3,5,5-hexaketylcyclotrisilazane (HMCTS; 1,1,3,3,5,5-hexamethylcyclotri silazane) and bis dimethylaminodimethylsilane (B (DMA) DMS; (bis (dimethylamino) dimethylsilane), bis diethylaminomethylsilane (B (DMA) DMS; (bis (dimethylamino) methylsilane), diethylaminotrimethylsilane (TMSDEA; n, n-diethylaminotrimethylisilane), 1 , 1,3,3-tetramethyldisilazane (TMDS; 1,1,3,3-tetramethyldisilazane), hexamethyldisilazane (HMDS) (hexamethyld isilazane) conventional silylating agents such as, n-dimethylaminotrimethylsilane (TMSDMA; n, n-dimethylaminotrom ethylsilane) and the like.

도 1d를 참조하면, 상기 실리콘 주입층(18)을 마스크로하여 산소 플라즈마로 비노광영역의 감광막(14)을 제거하여 감광막(14) 패턴을 형성하고, 이를 마스크로하여 노출되어 있는 피식각층(12)을 제거하여 미세패턴을 형성한다. 여기서 상기 실리레이션 공정에서 건조 현상(dry dvelop) 단계에서 실릴화기에 의해 실리콘옥사이드가 생성된 영역은 O2플라즈마에 의해 실리콘옥사이드 막을 형성한다. 이 막을 에칭 장벅이 된다.Referring to FIG. 1D, the photoresist layer 14 of the non-exposed region is removed using an oxygen plasma using the silicon injection layer 18 as a mask to form a photoresist layer 14 pattern, and the exposed etching layer is exposed as a mask ( 12) is removed to form a fine pattern. The silicon oxide film is formed by the O 2 plasma in the region where the silicon oxide is generated by the silylizer in the dry dvelop step in the silicide process. This film is etched.

또한, 상기 실리레이션 공정의 조건은 일반적인 조건을 사용할 수 있으나, 특히 소프트 베이크 조건은 80℃-150℃에서 30초-180초 동안 진행하며, 프리실릴화 베이크 조건은 100℃-200℃로 하고, 실릴화 온도는 100℃-200℃로 하며, 실릴화 압력은 30 토르-200토를로 하는 것이 바람직하다.In addition, the conditions of the silicide process may be used general conditions, in particular, the soft bake conditions are carried out for 30 seconds to 180 seconds at 80 ℃ -150 ℃, presilylated baking conditions are set to 100 ℃-200 ℃, The silylation temperature is preferably 100 ° C.-200 ° C., and the silylation pressure is preferably 30 to 200 to 200 soils.

이상과 같이 본 발명에 따라 보호기 비율을 높여 미세 패턴을 형성하는 방법은 기존의 포토레지스트의 합성함으로서 보호기 만을 첨가 합성함으로써, 기존의 실릴화 레지스트에 비해 감광도가 우수하여 미세 패턴 형성이 유리할 뿐만 아니라, 248nm 파장에서 작동하는 새로운 실릴화 포토레지스트를 합성하는 데에 소요되는 막대한 비용을 절감할 수 있다. 또한, TSI 공정의 얕은 노광의 특성으로 248nm 뿐만 아니라 193nm 파장의 광에도 작동하는 실릴화 레지스트로서 사용할 수 있다.As described above, the method of forming a fine pattern by increasing the protecting group ratio according to the present invention is by synthesizing only the protecting group by synthesizing the existing photoresist, thereby having excellent photosensitivity compared to the conventional silylated resist, and thus, forming the fine pattern is advantageous. The huge cost of synthesizing a new silylated photoresist operating at 248nm wavelength can be saved. In addition, it can be used as a silylated resist that operates not only at 248 nm but also at 193 nm wavelength due to the shallow exposure characteristic of the TSI process.

이상의 본 발명에 대한 상세한 설명 및 실시예는 예시의 목적을 위해 개시된 것이며, 당업자라면 본 발명의 사상과 범위안에서 다양한 수정, 변경, 부다등이 가능할 것이고, 이러한 수정 변경등은 이하의 특허 청구의 범위에 속하는 것으로 보아야 할 것이다.The above detailed description and embodiments of the present invention have been disclosed for purposes of illustration, and those skilled in the art will be able to make various modifications, changes, additions, and the like within the spirit and scope of the present invention. Should be seen as belonging to.

Claims (2)

소정 구조의 반도체기판상에 피식각층을 형성하는 공정과,Forming an etched layer on a semiconductor substrate having a predetermined structure; 상기 피식각층상에 실리레이션용 감광막을 도포하되, 상기 감광막의 주쇄의 전체 단위체 량에 대한 보호기의 비유이 15% 이상으로 형성하는 공정과,Applying a silicide photosensitive film on the etched layer, wherein the ratio of the protecting group to the total unit weight of the main chain of the photosensitive film is 15% or more; 상기 감광막을 선택노광하는 공정과,Selectively exposing the photosensitive film; 상기 감광막의 노광 부분에 실리레이션 공정을 진행하여 선택적으로 실리콘으로 주입시켜 실리콘 주입층을 형성하는 공정과,Performing a silicide process on the exposed portion of the photosensitive film and selectively injecting it into silicon to form a silicon injection layer; 상기 실리콘 주입층을 마스크로 노출되어 있는 감광막을 제거하여 실리콘 주입층을 상부에 가지는 감광막 패턴을 형성하는 공정과,Forming a photoresist pattern having a silicon injection layer thereon by removing the photoresist film exposed through the silicon injection layer with a mask; 상기 감광막 패턴과 실리콘 주입층을 마스크로 피식각층을 식각하여 피식각층 패턴을 형성하는 공정을 구비하는 반도체소자의 미세패턴 제조방법.And etching the etched layer using the photoresist pattern and the silicon injection layer as a mask to form an etched layer pattern. 제1항에 있어서, 상기 보호기가 t-부톡시카르보닐, 4-이소프로필 옥시카르보닐 옥시스티렌, t-부톡시카르보닐메톡시, 파라-트리메틸실릴, 파라-테트라히드로파라닐로 구성된 그룹에서 선택된 것임을 특징으로 하는 방법.The compound of claim 1, wherein the protecting group is selected from the group consisting of t-butoxycarbonyl, 4-isopropyl oxycarbonyl oxystyrene, t-butoxycarbonylmethoxy, para-trimethylsilyl, para-tetrahydropararanyl Characterized in that selected.
KR1019960079991A 1996-12-31 1996-12-31 Method for manufacturing fine pattern of semiconductor device KR100403324B1 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100520670B1 (en) * 1999-05-06 2005-10-10 주식회사 하이닉스반도체 A Process for Forming Photoresist Pattern
KR100596431B1 (en) * 1999-06-30 2006-07-06 주식회사 하이닉스반도체 Patterning method using top surface imaging process by silylation
KR100661421B1 (en) * 2004-09-28 2006-12-27 가부시끼가이샤 도시바 Method for forming a pattern

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100520670B1 (en) * 1999-05-06 2005-10-10 주식회사 하이닉스반도체 A Process for Forming Photoresist Pattern
KR100596431B1 (en) * 1999-06-30 2006-07-06 주식회사 하이닉스반도체 Patterning method using top surface imaging process by silylation
KR100661421B1 (en) * 2004-09-28 2006-12-27 가부시끼가이샤 도시바 Method for forming a pattern

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