KR102441992B1 - Method and apparatus for managing disaggregated memory - Google Patents

Abstract

The present specification may provide a method for managing separate memory in a virtualization system. In this case, the method of managing the separated memory may include detecting memory access based on the operation of the virtual machine in the virtual machine node, and performing a memory operation through the memory block in consideration of the memory access pattern. In this case, the memory access pattern may be set differently based on the operation execution time of the virtual machine, and the size of the memory block may be dynamically changed based on the memory access pattern.

Description

Method and apparatus for managing disaggregated memory}

The present invention relates to a method and apparatus for managing a separate memory using spatial locality, for dynamically analyzing and effectively operating a memory in a virtualization system that provides a separate memory.

A virtualization system that provides separate memory is a system that places a subset of memory required for a virtual machine to perform in another system connected by I/O (Input/Output) rather than the physical machine that operates the virtual machine. It also refers to a virtualization system using non-volatile memories supporting block addressing. This provides an opportunity to provide an increased memory capacity using an existing popularized system as the in-memory computing environment has recently become popular. Overcoming the performance degradation factors in operating such a system is essential for popularization of the system.

A representative method for improving performance in such a memory separation system is to retrieve memory pages to be used in advance from a remote memory node. However, when such application programs are operated in the target memory system, the memory required by the remote memory paging system is transferred by page unit without considering the corresponding memory access pattern. In addition, if the request is simply abused for all memory accesses, performance will be degraded due to misuse of the memory of the local machine and the network connecting the machines. For this, prefetching is required based on the memory access pattern of applications widely used in microarchitecture. However, since the memory access patterns of applications vary depending on the application, timing, location, and local memory capacity, static time profiling has limitations in system optimization.

An object of the present invention is to improve system performance by reducing the number of remote memory accesses by dynamically determining a memory access pattern in a virtualization system supporting separate memory.

An object of the present invention is to provide a method for reducing performance degradation by reducing memory accesses that occur through the above description.

An object of the present invention is to provide a method of reducing delay time occurring in actual memory access by preventing misuse of a memory bandwidth used in a connection between nodes through the above description.

An object of the present invention is to provide dynamic profiling of a memory access of a virtual machine for the above purpose.

The technical problems to be achieved in the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those of ordinary skill in the art to which the present invention belongs from the description below. will be able

According to an embodiment of the present invention, a method for managing a separate memory in a virtualization system may be provided. In this case, the method of managing the separated memory may include detecting memory access based on the operation of the virtual machine in the virtual machine node, and performing a memory operation through the memory block in consideration of the memory access pattern. In this case, the memory access pattern may be set differently based on the operation execution time of the virtual machine, and the size of the memory block may be dynamically changed based on the memory access pattern.

In this case, the memory operation may include at least one of a load operation, a store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address.

Also, according to an embodiment of the present invention, an apparatus for managing a separate memory in a virtualization system may include a memory and a processor for controlling the memory. In this case, the processor may detect a memory access based on the operation of the virtual machine in the virtual machine node, and perform a memory operation through the memory block in consideration of the memory access pattern. In this case, the memory access pattern may be set differently based on the operation execution time of the virtual machine, and the size of the memory block may be dynamically changed based on the memory access pattern.

In this case, the memory may include a local memory and a remote memory.

In addition, the memory operation performed by the processor may include at least one of a load operation, a store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address.

In addition, according to an embodiment of the present invention, the virtualization system for managing the separate memory may include a virtual machine node for controlling the operation of the virtual machine and a memory node for controlling the memory operation. In this case, the separated memory manager of the virtual machine node detects memory access based on the operation of the virtual machine, and performs a memory operation through the memory block in consideration of the memory access pattern, but the memory access pattern is the operation execution time of the virtual machine is set differently based on , and the size of the memory block may be dynamically changed based on a memory access pattern.

In addition, the memory operation performed by the separate memory manager may include at least one of a load operation, a store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address.

The following points may be commonly applied to methods, devices, and systems for managing separate memories.

According to an embodiment of the present invention, a load operation among memory operations may be an operation of bringing at least one or more memory pages from a remote memory to a local memory. In this case, the memory block may be composed of a plurality of memory pages.

In this case, according to an embodiment of the present invention, the number of memory pages brought into the local memory may be determined based on a stretch operation.

Also, according to an embodiment of the present invention, when the block size and block state of a second memory block adjacent to a first memory block in which an access occurs based on a load operation is the same, the first memory block and the second memory block based on a stretch operation 2 memory blocks can be combined into one block and brought into local memory.

Also, according to an embodiment of the present invention, the storage operation among the memory operations may be an operation of storing at least one or more memory pages from the local memory to the remote memory. In this case, the memory block may be composed of a plurality of memory pages.

Also, according to an embodiment of the present invention, the number of memory pages to be stored in the remote memory may be determined based on a reduce operation.

Further, according to an embodiment of the present invention, when a storage occurs in a memory block based on a storage operation, the continuity score of the memory block is determined, and the size of the memory block is maintained by comparing the determined continuity score with a threshold value. You can decide whether to

At this time, according to an embodiment of the present invention, when the continuity score is greater than or equal to the threshold, the size of the memory block is maintained, and when the continuity score is less than the threshold, the memory block is divided into minimum unit blocks based on a reduce operation. It can be stored in remote memory.

In this case, according to an embodiment of the present invention, the minimum unit block may be composed of one memory page.

Also, according to an embodiment of the present invention, the state of the memory block and the location of the memory block may be managed based on the descriptor.

At this time, according to an embodiment of the present invention, the descriptor stores at least any one or more of information on whether the memory block exists in the local memory or the remote memory, whether the memory block is mapped in the address space, and the size of the memory block. may include

Also, according to an embodiment of the present invention, a memory block may be dynamically changed while having a size 2^n times that of a memory page. In this case, n may be a constant.

In this case, according to an embodiment of the present invention, the start address of the memory block may be set differently based on the size of the memory block.

According to the present invention, by dynamically determining a memory access pattern in a virtualization system supporting a separate memory, the number of remote memory accesses can be reduced, thereby improving system performance.

According to the present invention, it is possible to provide a method for reducing performance degradation by reducing memory accesses that occur through the above description.

According to the present invention, as described above, it is possible to provide a method of reducing the delay time occurring in actual memory access by preventing misuse of the memory bandwidth used in the connection between nodes.

According to the present invention, it is possible to provide dynamic profiling of the memory access of the virtual machine for the above purpose.

The effects obtainable in the present invention are not limited to the above-mentioned effects, and other effects not mentioned may be clearly understood by those of ordinary skill in the art from the following description. will be.

1 is a diagram illustrating a structure of a separate memory manager.
2 is a diagram illustrating a method of configuring an elastic virtual memory block according to an embodiment of the present invention.
3 is a diagram illustrating a pseudo code of a stretch operation according to an embodiment of the present invention.
4 is a diagram illustrating a capital code of a reduce operation according to an embodiment of the present invention.
5 is a diagram illustrating a simultaneous memory access method between two virtual machine processors according to an embodiment of the present invention.
6 is a diagram illustrating a method for solving a concurrency problem in a stretch operation memory access processing according to an embodiment of the present invention.
7 is a diagram illustrating a locking protocol in consideration of dynamic change of blocks according to an embodiment of the present invention.
8 is a diagram illustrating a separate memory management method according to an embodiment of the present invention.
9 is a diagram illustrating an apparatus for performing separate memory management according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those of ordinary skill in the art to which the present invention pertains can easily implement them. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein.

In describing an embodiment of the present invention, if it is determined that a detailed description of a well-known configuration or function may obscure the gist of the present invention, a detailed description thereof will be omitted. And, in the drawings, parts not related to the description of the present invention are omitted, and similar reference numerals are attached to similar parts.

In the present invention, when it is said that a certain element is "connected", "coupled" or "connected" with another element, it is not only a direct connection relationship, but also an indirect connection relationship in which another element exists in the middle. may also include. Also, when it is said that a component includes "includes" or "has" another component, it means that another component may be further included without excluding other components unless otherwise stated. .

In the present invention, terms such as first, second, etc. are used only for the purpose of distinguishing one component from other components, and unless otherwise specified, the order or importance of the components is not limited. Therefore, within the scope of the present invention, a first component in one embodiment may be referred to as a second component in another embodiment, and similarly, a second component in one embodiment is referred to as a first component in another embodiment. can also be called

In the present invention, the components that are distinguished from each other are for clearly explaining each characteristic, and do not necessarily mean that the components are separated. That is, a plurality of components may be integrated to form one hardware or software unit, or one component may be distributed to form a plurality of hardware or software units. Accordingly, even if not specifically mentioned, such integrated or dispersed embodiments are also included in the scope of the present invention.

In the present invention, components described in various embodiments do not necessarily mean essential components, and some may be optional components. Accordingly, an embodiment composed of a subset of components described in one embodiment is also included in the scope of the present invention. In addition, embodiments including other components in addition to the components described in various embodiments are also included in the scope of the present invention.

1 is a diagram illustrating a structure of a separate memory manager.

Referring to FIG. 1 , a virtualization system having a separate memory may be provided. More specifically, a separate memory manager 118 may exist in a virtualization system. In this case, the detached memory manager 118 may process remote memory access that occurs in the virtual machine node 110 . For example, when the virtual machine node 110 attempts to access the remote memory, the detached memory manager 118 may load the remote memory into the local memory. Additionally, the detached memory manager 118 may store local memory as remote memory. For example, the detached memory manager 118 may store the first memory page 121 from the local memory to the remote memory based on the operation of the virtual machine node 110 . In this case, the first memory page 121 may be any memory page in the local memory, and is not limited to the above-described embodiment. That is, the detached memory manager 118 may store the local memory as a remote memory. Also, the detached memory manager 118 may load the second memory page 122 in the remote memory into the local memory based on the operation of the virtual machine node 110 . In this case, the second memory page 121 may be any memory page existing in the remote memory, and is not limited to the above-described embodiment. In this case, the separated memory manager 118 may map the loaded local memory to the address space used by the virtual machine node 110 , and through this, the virtual machine node 110 may use the loaded local memory. That is, the kernel or application program running on the virtual machine can access the corresponding memory. On the other hand, the separate memory manager 118 may store the memory not accessed by the virtual machine node 110 in the remote memory. That is, the memory used by the virtual machine node 110 may be checked, loaded into the local memory, and unused memory may be stored in the remote memory.

In this case, referring to FIG. 1 , the virtual machine kernel program 115 and the host kernel program 1160 may exist in the virtual machine node 110 at the kernel level. On the other hand, a memory node kernel program 119 may exist in the memory node 120 at the kernel level. In this case, the above-described separate memory manager 118 may control remote memory access processing based on the virtual machine kernel program 115 as the host kernel program 116 . That is, virtual machine monitoring is performed by the virtual machine monitor 117 based on the virtual machine program 111 at the user level, and the detached memory manager 118 may perform remote memory access processing based on this.

In this case, as an example, performance degradation may occur due to remote memory access involved in a virtualization system having a separate memory. More specifically, in providing remote memory access, the swap system provided by the existing operating systems could provide an access service to the corresponding remote memory simply by swapping the requested page. In addition, this means that the block-addressing provided by the storage device connected to the IO (Input/Output) bus, the remote memory connected to the IO bus, and the memory using NAND devices such as NVDIMM-F provides the bit-addressing required by the processor. Problems can arise because you cannot.

Also, as an example, as described above, a representative method for improving performance in a memory separation system may be to bring a memory page to be used in advance from a remote memory node. However, when memory access patterns are not taken into consideration when application programs are operated in the target memory system, and memory required by the remote memory paging system is transferred in page units, waste of memory pages may occur. In addition, if the request is simply abused for all memory accesses, the performance deteriorates due to misuse of the memory of the local machine and the network connecting the machines.

To this end, it is possible to improve the system performance by dynamically determining the memory access pattern in a virtualization system supporting separate memory and reducing the number of remote memory accesses. Through this, it is possible to reduce unnecessary memory access and prevent performance degradation so that the memory bandwidth used in the connection between nodes is not misused. By not misusing bandwidth, it is possible to reduce the delay time caused by the memory access due to the actual access.

For the above, profiling of the memory access of the virtual machine may be required, and the profiling can be divided into static profiling and dynamic profiling. In this case, since static profiling does not perform profiling during operation of the virtual machine, the cost of dynamic profiling can be reduced, but there is a limitation in identifying the dynamically determined memory location and temporally changing memory access patterns.

In consideration of the above situation, the separated memory manager 118 performed in the virtual machine can continuously grasp the spatial locality of the managed memory at the execution time of the virtual machine. Through this, the separate memory manager can perform memory operations such as loading, storing, mapping to a virtual machine physical address (GPA), and unmapping. In this case, the separate memory may perform the operation in units of a set of consecutive memory pages having spatial locality in performing the above-described operation.

As an example, FIG. 2 is a diagram illustrating a flexible virtual memory block. Referring to FIG. 2 , a set of contiguous memory pages may be defined as one flexible virtual memory block. In this case, one block always exists in the local memory or the same remote memory and may have the same state. In addition, the size of the corresponding memory is dynamically changed, and the size may be 2^n (n is a constant) times the size of the page defined in the microarchitecture.

For example, considering the Intel 64 computer structure, the size may increase to 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, or the like. Also, the start address of the block may have an address aligned with the size of the corresponding block. That is, the 4KB block, 8KB block, 16KB block, 32KB block, and 64KB block can have the start address of the corresponding block in which 11, 12, 13, 14, and 15 LSBs (Least Significant Bits) have 0, respectively. and can be distinguished from each other through this. As described above, in order to change the dynamic size of a block, a STRETCH operation to increase the size and a REDUCE operation to decrease the size of an arbitrary block may be performed based on information provided during a memory management operation. .

As an example, FIG. 3 is a diagram illustrating a PSEUDO code for a stretch operation.

Referring to FIG. 3 , the stretch operation may determine the number of pages to be fetched from the remote memory when processing access to an arbitrary remote memory. In addition, the corresponding operation may be performed when an arbitrary remote memory access occurs. That is, it can be performed when loading from remote memory to local memory. In this case, a block adjacent to the remote block in which the access has occurred may be considered. When blocks arranged as adjacent blocks have the same size as the target block and have the same state, it is determined that there is spatial locality with respect to the two blocks, and the two blocks may be combined into one block. Thereafter, the merged block can be loaded into the local memory by the separate memory manager. As such, the extended block may have a longer lifetime in the local memory management system as it has new memory accesses. That is, if the size and state of adjacent blocks are the same, blocks can be merged into one based on a stretch operation and loaded into the local memory. For example, if the size and state of adjacent blocks are the same, the size of the memory may be increased as a sequential memory access, and if the adjacent blocks are unrelated to each other, random access may be performed.

4 is a diagram illustrating pseudo codes for a reduce operation. Referring to FIG. 4 , in contrast to FIG. 3 , the reduce operation may be an operation performed when a block existing in the local memory is stored as a target in the remote memory. As an example, each page may have a score of 1/(block size) as a continuity score for an arbitrary block with respect to an arbitrary block. In this case, each score may be summed up and evaluated, and it may be determined whether the continuity score of the corresponding block is equal to or greater than a threshold value. In this case, the threshold value may be changed and set to a reference value, and is not limited to the above-described embodiment.

If it exceeds the threshold, the size of the block is maintained as it is, but if it is lower than the threshold, the block can be completely divided into multiple blocks with one 4KB page as a block. That is, as shown in FIG. 2 , one page may be divided into 4 KB blocks, which are the minimum unit. Through such block size management, by continuously increasing the block size for sequential memory access and reducing the block size aggressively for random memory access, it is possible to increase the performance of sequential memory access and prevent performance degradation for random memory access. can

For the above, the state of each memory block and the location of the corresponding memory data may be managed by using the descriptor for the memory of the virtual machine. As an example, based on the descriptor, it may indicate whether data of a 4KB block starting at an arbitrary virtual machine physical address (GPA) 0x10000 exists in the local memory or the remote memory. In addition, it is possible to indicate whether or not the memory is mapped in the address space through the descriptor. Also, information about the block size for spatial locality can be checked through the descriptor. In addition, the descriptor has a lock variable for a synchronization mechanism to prevent a concurrency problem from occurring in handling access to the corresponding page when it exists in the remote memory.

As an example, referring to FIG. 5 , in order to process one block in two different threads (vCPU0 510 and vCPU1 520 ), synchronization between the two threads (vCPU0 510 and vCPU1 520 ) is required. can be For example, if vCPU0 510 starts processing access to memory block C first, vCPU1 does not need to process the corresponding operation. It may be necessary to wait for the access processing prior to this or perform the access processing to reflect only the execution of any one operation to the system.

In this case, for example, a dynamically changing block may use a lock variable existing in a head descriptor existing at the front of a memory page descriptor constituting the block as a lock variable for synchronization. That is, when both virtual machine processors simultaneously access the same memory and process the corresponding memory, synchronization can be performed using a lock existing in the head descriptor among descriptors belonging to the block.

At this time, as an example, FIG. 6 is a diagram illustrating a case in which the stretch operation and the memory access process are concurrently generated.

Referring to FIG. 6 , for two different vCPU threads 610 and 620, the vCPU0 610 accesses the 4 KB memory block D, and at the same time, the vCPU1 620 accesses the 4 KB memory block C. to perform a stretch operation on memory block C and memory block D. In this case, the thread 610 of the vCPU0 may use a lock variable existing in the head descriptor of the memory block D based on the above description. On the other hand, the thread 620 of vCPU1 may use the lock variable of the head descriptor of the memory block C. That is, since the stretch operation and the memory access occur at the same time, a problem may arise as to which operation is performed.

In this case, as an example, based on the pseudo code of the stretch operation of FIG. 3 described above, it is possible to possess locks of two blocks to be stretched. That is, the thread 620 of vCPU1 may own the lock variable of the head descriptor of block C and the lock variable of the head descriptor of block D.

At this time, if vCPU0 610 possesses a lock on block D after stretching, block D may not be subject to memory access processing anymore as a block dependent on block C. Therefore, in order to solve the synchronization problem based on the above description, the sizes of all blocks should be atomic updateable.

For this, a locking protocol may be used as shown in FIG. 7 . As an example, the stretch operation and the reduce operation may update a variable indicating the block size in a state in which locks of the corresponding blocks are possessed with respect to the target of the input blocks and output blocks of the corresponding operation. That is, by updating the variable indicating the block size and releasing the lock when the size does not match, and allowing the access, the concurrency problem can be solved when processing access to the corresponding blocks.

Through the above description, it is possible to overcome the limitation in recognizing the location of the memory dynamically determined in the static profiling and the memory access pattern that is changed in time according to the location, and the present invention is not limited to the above-described embodiment.

8 is a diagram illustrating a separate memory management method.

Referring to FIG. 8 , the virtual machine node may detect memory access based on the operation of the virtual machine ( S810 ). At this time, as described above with reference to FIGS. 1 to 7 , the separate memory manager controls the operation of the virtual machine. Based on the memory access processing can be performed. In this case, as an example, the virtual machine node and the memory node of FIG. 1 may have a logical configuration. In addition, the separate memory manager may also be a logical configuration, and may be an entity representing a subject that manages the separate memory. For example, the subject performing the above-described operation may be a processor. That is, a memory and a processor may exist in the device, and the processor may organically combine with the memory to perform a separate memory management operation based on the entities illustrated in FIG. 1 . However, as described above and below, each node and separate memory manager will be described for convenience of description.

Next, the separate memory manager may perform a memory operation through the memory block in consideration of the memory access pattern ( S820 ). At this time, as described above with reference to FIGS. 1 to 7 , the memory access pattern depends on the operation of the virtual machine. It may be set differently based on the execution time. In addition, the memory access pattern may be set differently according to other configurations, and is not limited to the above-described embodiment. The separate memory manager may perform a memory operation through the memory block based on the above-described memory pattern. In this case, the memory block may be a unit for a set of a plurality of consecutive memory pages. Also, the size of the memory block may be variable, as described above. Also, as described above, the memory operation may include at least one of a load operation, a store operation, a matching operation to a virtual machine physical address, and an unmatching operation to a virtual machine physical address. That is, a load operation for bringing a memory block from the remote memory to the local memory may be performed based on the virtual machine operation of the virtual machine node. Also, a storage operation of storing a memory block from a local memory to a remote memory may be performed based on the virtual machine operation of the virtual machine node. Meanwhile, an operation of mapping or unmapping a memory may be performed based on the virtual machine physical address, and the embodiment is not limited thereto.

In this case, as an example, different additional operations may be performed based on the performed operation. (S830) At this time, as described above with reference to FIGS. 1 to 7 , when the load operation is performed, the memory block adjacent to the accessed memory block is performed. If the size and state of the memory blocks are the same, the sizes of the blocks may be combined based on the stretch operation, and the combined memory blocks may be brought into the local memory, as described above (S840).

Meanwhile, in the storage operation, the continuity score for the block may be determined based on the continuity score of pages in the block to be stored. In this case, the continuity score may be compared with a threshold value, and if it is less than the threshold value, the block may be divided into minimum units and stored in the remote memory, as described above.

9 is a diagram illustrating a configuration of an apparatus for managing a separate memory. Referring to FIG. 9 , an apparatus 900 for managing separate memories may include a memory 910 and a processor 920 . In this case, as an example, the processor 920 may be a hardware configuration corresponding to each program, each node, and manager of FIG. 1 described above. That is, FIG. 1 may operate based on the processor 920 described above as a logical entity. However, it may be described as in FIG. 1 in order to distinguish specific operations, and is not limited to the above-described embodiment. Meanwhile, the memory 910 may include a local memory and a remote memory as shown in FIG. 1 . That is, the memory 910 may be in the form of a separate memory, and may operate as described above based on the separate memory operation. Also, as an example, the memory 910 may have a hardware configuration based on an operation performed by the above-described logical entity. That is, the present invention may be a method of implementing a separate memory based on the memory 910 and the processor 920 , and is not limited to the above-described embodiment.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be directly implemented in hardware, a software module executed by a processor, or a combination of the two. A software module may reside in a storage medium (ie, memory and/or storage) such as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM. An exemplary storage medium is coupled to the processor, the processor can read information from, and write information to, the storage medium. Alternatively, the storage medium may be integral with the processor. The processor and storage medium may reside within an application specific integrated circuit (ASIC). The ASIC may reside within the user terminal. Alternatively, the processor and storage medium may reside as separate components within the user terminal.

Exemplary methods of the present invention are expressed as a series of actions for clarity of description, but this is not intended to limit the order in which the steps are performed, and each step may be performed simultaneously or in a different order if necessary. In order to implement the method according to the present invention, other steps may be included in addition to the illustrated steps, other steps may be included after excluding some steps, or additional other steps may be included except for some steps.

Various embodiments of the present invention do not list all possible combinations, but are intended to describe representative aspects of the present invention, and the details described in various embodiments may be applied independently or in combination of two or more.

In addition, various embodiments of the present invention may be implemented by hardware, firmware, software, or a combination thereof. For implementation by hardware, one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), general purpose It may be implemented by a processor (general processor), a controller, a microcontroller, a microprocessor, and the like.

The scope of the present invention includes software or machine-executable instructions (eg, operating system, application, firmware, program, etc.) that cause operation according to the method of various embodiments to be executed on a device or computer, and such software or and non-transitory computer-readable media in which instructions and the like are stored and executed on a device or computer.

900: detachable memory management unit
910: memory
920: processor

Claims (19)

A method for managing separate memory in a virtualization system, comprising:
detecting memory access of the virtual machine in the virtual machine node;
Including; performing a memory operation through a memory block in consideration of the memory access pattern;
the memory block dynamically changes in size based on the memory access pattern;
When the memory operation corresponds to a load operation, the size of the memory block increases;
wherein the load operation fetches at least any one or more memory pages from remote memory to local memory.
The method of claim 1,
and the memory operation includes at least one of the load operation, the store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address.
3. The method of claim 2,
Among the memory operations, the load operation is an operation of fetching at least one or more memory pages from a remote memory to a local memory,
wherein the memory block is composed of a plurality of the memory pages.
4. The method of claim 3,
and the number of memory pages brought into the local memory is determined based on a stretch operation.
5. The method of claim 4,
When the block size and block state of a second memory block adjacent to a first memory block accessed based on the load operation are the same, the first memory block and the second memory block are combined into one block based on the stretch operation A separate memory management method of merging into and bringing into the local memory.
3. The method of claim 2,
Among the memory operations, the store operation is an operation for storing at least one memory page from a local memory to a remote memory,
wherein the memory block is composed of a plurality of the memory pages.
7. The method of claim 6,
The number of memory pages to be stored in the remote memory is determined based on a reduce operation.
8. The method of claim 7,
When the storage occurs in the memory block based on the storage operation, determining a continuity score of the memory block;
and comparing the determined continuity score with a threshold to determine whether to maintain the size of the memory block.
9. The method of claim 8,
If the continuity score is greater than or equal to the threshold, maintaining the size of the memory block;
When the continuity score is less than the threshold, the memory block is separated into a minimum unit block based on the reduce operation and stored in the remote memory.
10. The method of claim 9,
wherein the minimum unit block is configured of one memory page.
The method of claim 1,
The state of the memory block and the location of the memory block are managed based on a descriptor.
12. The method of claim 11,
The descriptor is
Whether the memory block exists in a local memory or a remote memory, whether the memory block is mapped in an address space, and at least any one or more of information on the size of the memory block, separate memory management method.
The method of claim 1,
The memory block is a memory page

A method of managing detached memory that changes dynamically with double size, where n is a constant.
14. The method of claim 13,
The start address of the memory block is differently set based on the size of the memory block.
A device for managing separate memory in a virtualization system, comprising:
Memory; and
A processor for controlling the memory,
The processor is
Detect the memory access of the virtual machine in the virtual machine node,
Perform a memory operation through a memory block in consideration of the memory access pattern,
the memory block dynamically changes in size based on the memory access pattern;
When the memory operation corresponds to a load operation, the size of the memory block increases;
wherein the load operation fetches at least any one or more memory pages from remote memory to local memory.
16. The method of claim 15,
wherein the memory includes a local memory and a remote memory.
16. The method of claim 15,
The memory operation performed by the processor includes at least one of a load operation, a store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address.
In a virtualization system that manages separate memory,
a virtual machine node that controls the operation of the virtual machine; and
A memory node that controls the memory operation; including,
The separate memory manager of the virtual machine node detects the memory access of the virtual machine,
Perform a memory operation through a memory block in consideration of the memory access pattern,
the memory block dynamically changes in size based on the memory access pattern;
When the memory operation corresponds to a load operation, the size of the memory block increases;
The load operation is to bring at least one or more memory pages from the remote memory to the local memory, virtualization system for managing detached memory.
19. The method of claim 18,
The memory operation performed by the separate memory manager includes at least one of the load operation, the store operation, a mapping operation of a virtual machine physical address, and an unmapping operation of the virtual machine physical address. Virtualization system for managing separate memory .

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