KR102208629B1 - Micom reset circuit - Google Patents

Abstract

In the micom reset circuit according to an aspect of the present invention, a micom including a first terminal and a second terminal through which a predetermined signal is input/output, an inverting terminal is connected to a first terminal, and a non-inverting terminal is inputted with a first reference voltage. The first comparator and the non-inverting terminal are connected to the first terminal, and the inverting terminal is turned on when a high level is input from a second comparator, a first comparator, or a second comparator to which a second reference voltage is input. Thus, by including a switching unit for outputting a reset signal to the second terminal, it is possible to automatically reset the micom when the micom runs out.

Description

Micom reset circuit

The present invention relates to a micom reset circuit, and more particularly, to a micom reset circuit capable of resetting a micom in case of a micom runaway.

Micom is used in various electronic devices such as home appliances. The micom may runaway under abnormal conditions such as noise, static electricity, and application of an abnormal voltage, and electronic devices may not operate until the micom is reset.

Accordingly, various methods for resetting the microcomputer have been proposed.

For example, prior art 1 (Korean Laid-Open Patent Publication No. 2002-0067253, publication date August 22, 2002) relates to a microcomputer reset device in a monitor. The micom reset device of the prior art 1 has a reset circuit unit capable of resetting the micom with a simple key operation, and the reset circuit unit is composed of a transistor, a first diode and a second diode, and the first diode is connected to a power switch. The second diode is connected to the SET key, the base of the transistor is connected to the cathode terminals of the first and second diodes, and the emitter, an output terminal of the transistor, is connected to the reset terminal of the micom. When the power switch and SET key are pressed at the same time, the transistor is turned on, and as a result, the reset terminal of the micom falls below the reset terminal voltage, and the micom can be reset.

Prior Art 2 (Korean Patent Laid-Open Publication No. 10-2007-0070484, publication date July 04, 2007) discloses a micom reset device capable of resetting when a micom operates abnormally. In the prior art 2, a plurality of microcomputers are provided, and the microcomputer in which an error has occurred is reset by a microcomputer without an error, thereby enhancing safety.

Prior art 1 is a method in which the user operates a key to reset, and the user's monitoring and operation are essentially required. Accordingly, before the user resets, the microcomputer and the electronic device including the microcomputer cannot be used, and the abnormal state is maintained, and there is a problem that there is a risk of an accident in some cases.

Accordingly, there is a need for a method of automatically resetting the microcomputer that has fallen into an abnormal state.

As in the prior art 2, if there are two or more micoms, one micom may reset the other micom.

However, having a plurality of microcomputers has a problem of increasing the cost, and there is a problem that it cannot be used in a device using one microcomputer. Also,

When a case where more than a predetermined number of microcomputers run away at the same time occurs, there is a problem that the product cannot operate normally unless the product power is turned on/off.

An object of the present invention is to provide a micom reset circuit capable of automatically resetting a micom in case of a micom congestion.

An object of the present invention is to provide a micom reset circuit that is effective in terms of economy and stability by resetting according to an abnormal state of the micom without adding a separate micom and sensor.

An object of the present invention is to provide a microcomputer reset circuit capable of reducing cost and reset time by simplifying a circuit configuration.

In order to achieve the above or other objects, a micom reset circuit according to an aspect of the present invention includes a micom including a first terminal and a second terminal through which a predetermined signal is input/output, an inverting terminal connected to the first terminal, and a non-inverting terminal Is a first comparator to which the first reference voltage is input, the non-inverting terminal is connected to the first terminal, and the inverting terminal is a high level from the second comparator, the first comparator, or the second comparator to which the second reference voltage is input. When this is input, it is turned on and includes a switching unit that outputs a reset signal to the second terminal, so that the micom can be automatically reset when the micom runs out.

In order to achieve the above or other objects, a micom reset circuit according to an aspect of the present invention includes a microcomputer including a first terminal and a second terminal through which a predetermined signal is input/output, and a high pass filter connected to the first terminal. ), a first switching unit connected to the output of the high pass filter and turned off when a low level is input, and. By including a second switching unit connected to the output of the first switching unit and outputting a reset signal to the second terminal based on the off of the first switching unit, it is possible to automatically reset the micom when the micom runs out.

According to at least one of the embodiments of the present invention, the microcomputer may be automatically reset.

In addition, according to at least one of the embodiments of the present invention, it is effective in terms of economy and stability by resetting according to an abnormal state of the micom without adding a separate micom and sensor.

In addition, according to at least one of the embodiments of the present invention, it is possible to reduce cost and reset time by simplifying the configuration of the micom reset circuit.

Meanwhile, other various effects will be directly or implicitly disclosed in the detailed description according to the embodiments of the present invention to be described later.

1 is a circuit diagram showing a micom reset circuit according to an embodiment of the present invention.
2 to 4 are diagrams referred to for explanation of the operation of the micom reset circuit shown in FIG. 1.
5 is a circuit diagram showing a micom reset circuit according to an embodiment of the present invention.
6 and 7 are diagrams referenced for explanation of the operation of the micom reset circuit shown in FIG. 5.

Hereinafter, the present invention will be described in detail with reference to the drawings. In the drawings, in order to clearly and briefly describe the present invention, the illustration of parts not related to the description is omitted, and the same reference numerals are used for identical or extremely similar parts throughout the specification.

The suffixes "module" and "unit" for the constituent elements used in the following description are given in consideration of only the ease of writing in the present specification, and do not impart a particularly important meaning or role by themselves. Therefore, the "module" and "unit" may be used interchangeably with each other.

In the present application, terms such as "comprises" or "have" are intended to designate the presence of features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, but one or more other features. It is to be understood that the presence or additional possibility of additions or numbers, steps, actions, components, parts, or combinations thereof, is not preliminarily excluded.

In addition, in this specification, terms such as first and second may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another.

Micoms, which are used in various electronic devices such as home appliances, may runaway under abnormal conditions due to static electricity and external noise. In addition, due to the congestion of the microcomputer, the operation of the electronic device may be stopped.

For example, in the microcomputer, the internal clock may fall into a congestion state in which calculation is impossible due to an abnormal state. If the micom uses a PWM signal, a signal change disappears due to a congestion state, and when a congestion occurs, the signal level remains unchanged to the last state, and various operations may become impossible.

Accordingly, since the operation of the electronic device is stopped due to the congestion of the micom, it is important to quickly resolve the congestion state of the micom.

Accordingly, the present invention proposes a micom reset circuit that automatically resets when a micom congestion occurs.

According to various embodiments of the present disclosure, when a runaway occurs due to static electricity and external noise during a micom operation, the micom is automatically reset, thereby preventing a product stop due to the micom runaway.

1 is a circuit diagram showing a micom reset circuit according to an embodiment of the present invention, and FIGS. 2 to 4 are diagrams referenced for explanation of the operation of the micom reset circuit shown in FIG. 1.

1, a micom reset circuit 100 according to an embodiment of the present invention includes a micom 10 and a micom including a first terminal 11 and a second terminal 12 through which a predetermined signal is input/output. 10) It may include a reset unit (110, 121, 112, 130) capable of automatically resetting the microcomputer 10 when it falls into a congestion state.

The microcomputer 10 may include a plurality of terminals including a first terminal 11 and a second terminal 12 through which a predetermined signal is input/output.

The first terminal 11 may be a signal terminal that outputs a predetermined signal. For example, the first terminal 11 may output a PWM signal having a predetermined duty and a predetermined frequency. The micom 10 may output a PWM signal having a predetermined duty and a switching frequency through the first terminal 11. Here, the PWM signal output through the first terminal 11 may be used as a reference signal capable of determining the congestion state of the microcomputer.

1 to 4 illustrate a case in which a PWM signal having a duty of 50%, a switching frequency of 10 kHz, and 5V is output through the first terminal 11. However, the present invention is not limited thereto, and the type, duty, switching frequency, and voltage of the signal output through the first terminal 11 may be variously changed.

The second terminal 12 may be a reset terminal receiving a reset signal for resetting the microcomputer 10. When a preset reset signal is input to the second terminal 12, the micom 10 may be automatically reset.

Here, the reset signal may include a low level period, and the second terminal 12 may be a reset terminal (reset bar terminal) that performs a reset operation in response to a low level reset signal.

For example, the second terminal 12 of the microcomputer 10 may be set to operate in negative logic, and a reset operation may be performed only when a low level signal is applied to the second terminal 12.

Depending on the embodiment, when a low level is applied to the second terminal 12 and is converted to a high level, a reset operation may be performed.

Meanwhile, in the micom reset circuit 100 according to an embodiment of the present invention, an inverting terminal (-) is connected to the first terminal 11, and a non-inverting terminal (+) is a first reference voltage input. 1 Comparator (ad1), a non-inverting terminal (+) is connected to the first terminal (11), an inverting terminal (-) is a second comparator (ad2) to which a second reference voltage is input, and the first comparator When a high level is input from (ad1) or from the second comparator (ad2), the switching unit 130 may be turned on and output a reset signal to the second terminal 12. .

In the micom reset circuit 100 according to an embodiment of the present invention, a signal output from the first terminal 11 corresponds to a value greater than a predetermined upper limit reference value or a value smaller than a predetermined lower limit reference value according to the congestion of the micom 10 Is changed to In addition, in the normal state, the signal output from the first terminal 11 appears as a value corresponding to a predetermined value within the range of the upper limit reference value and the lower limit reference value.

For example, the first reference voltage may be a lower limit reference value, and the first comparator ad1 may compare and output a first reference voltage of a non-inverting terminal (+) and an input of an inverting terminal (-). . That is, the first comparator ad1 compares the input corresponding to the signal output from the first terminal 11 with the lower limit reference value, and outputs a high level when it is small.

In addition, the second reference voltage may be an upper limit reference value, and the second comparator ad2 may compare and output the second reference voltage of the inverting terminal (-) with the input of the non-inverting terminal (+). That is, the first comparator ad2 may compare an input corresponding to the signal output from the first terminal 11 with the upper limit reference value, and output a high level when it is large.

To this end, the micom reset circuit 100 according to an embodiment of the present invention generates a first reference voltage by dividing the voltage of the first comparator ad1 and a push-pull resistor and a distribution resistor connected to the driving voltage. It may include a first comparison unit 121 having a first reference voltage generation unit.

In addition, the micom reset circuit 100 according to an embodiment of the present invention generates a second reference voltage by dividing the voltage of the second comparator ad2 and a push-pull resistor and a distribution resistor connected to the driving voltage. It may include a second comparison unit 122 having a second reference voltage generation unit.

For example, when a PWM signal having a duty of 50%, a switching frequency of 10 kHz, and 5V is output through the first terminal 11, the first reference voltage may be set to 1V and the second reference voltage may be set to 4V.

In this case, the first comparison unit 121 may include a first reference voltage generator having a 4 kΩ resistor connected to the driving voltage 5V and a 1 kΩ resistor connected to the 4 kΩ resistor, and accordingly, A first reference voltage of 1V may be input to the non-inverting terminal (+) of the first comparator ad1.

In addition, the second comparison unit 122 may include a second reference voltage generator having a 1 kΩ resistor connected to the driving voltage 5V and a 4 kΩ resistor connected to the 1 kΩ resistor, and accordingly, the second A second reference voltage of 4V may be input to the inverting terminal (-) of the comparator ad2.

The micom reset circuit 100 according to an embodiment of the present invention includes a low pass filter disposed between the first comparator ad1 and the second comparator ad2 and the first terminal 11. , 110) may be further included.

That is, the low pass filter 110 may be disposed between the first comparison unit 121 and the first terminal 11 and between the second comparison unit 122 and the first terminal 11.

The low pass filter 110 may output a 2.5V voltage when a 5V PWM signal having a duty of 50% is input, and may output a 0.5V voltage when a 5V PWM signal having a duty of 10% is input.

2 is a first comparator ad1 according to an input voltage V11 of an inverting terminal (-) of the first comparator ad1 and a non-inverting terminal (+) of the second comparator ad2 in the above-described example. This is an example of the output of the second comparator ad2.

2, the first comparator ad1 may output a high level when the input voltage of the inverting terminal (-) is less than 1V, which is the first reference voltage. have.

The second comparator ad2 may output a high level when the input voltage input of the non-inverting terminal + is greater than 4V, which is the second reference voltage.

If the microcomputer 10 is in a normal state, the duty value of the PWM signal output from the first terminal 11 may maintain a certain value or a certain range. However, when the microcomputer 10 is in a congested state, the signal output from the first terminal 11 deviates from the upper limit reference value and the lower limit reference value of the normal range.

That is, the present embodiment determines whether the PWM signal is in a normal state or a congestion state by whether or not the PWM signal maintains a constant duty.

To this end, the first and second comparison units 121 and 122 generate first and second reference voltages corresponding to the upper and lower reference values of the normal range, and correspond to the signals output from the first terminal 11. After comparing it with the input, the comparison result can be output.

If the microcomputer 10 is in a congestion state, the first comparator ad1 or the second comparator ad2 may output a high level.

Meanwhile, when a high level is input from the first comparator ad1 or the second comparator ad2, the switching unit 130 is turned on, and a reset signal is sent to the second terminal 12. Can be printed.

3 illustrates a logical table of an output of the second comparator ad2 of the first comparator ad1 and an input of the reset terminal 12.

Referring to FIG. 3, when an output of the first comparator ad1 is at a high level and an output of the second comparator ad2 is at a low level, a low level is input to the reset terminal 12. Accordingly, the microcomputer 10 may be reset.

In addition, when the output of the first comparator ad1 is at a low level and the output of the second comparator ad2 is at a high level, a low level is input to the reset terminal 12. Accordingly, the microcomputer 10 may be reset.

In addition, when the output of the first comparator ad1 is at a low level and the output of the second comparator ad2 is at a low level, a high level is input to the reset terminal 12. Accordingly, the microcomputer 10 can maintain the current state.

On the other hand, the switching unit 130 is connected between the output of the first comparator (ad1) and the second comparator (ad2) and the second terminal 12, and includes one or more switching elements (Q). I can.

For example, in the switching element Q, a collector terminal is connected to the second terminal 12, and a base terminal is a bipolar terminal connected to the outputs of the first comparator ad1 and the second comparator ad2. It may be a junction transistor (BJT). Here, the switching element Q may be a pn bipolar junction transistor.

Meanwhile, when a high level is input, the switching element Q may be turned on and output a low level to the second terminal 12. That is, according to the congestion state of the micom 10, the output of the switching element Q becomes a low level, and a low level reset signal is applied to the second terminal 12, so that the micom 10 may be reset. have.

Meanwhile, the micom reset circuit 100 according to an embodiment of the present invention further includes a capacitor C1 disposed between the first comparator ad1 and the second comparator ad2 and the switching unit 130. Can include.

Depending on the embodiment, a resistor is connected to the capacitor C1 to configure a differential circuit that generates a trigger pulse voltage for operating the switching circuit.

4 is a simplified illustration of the output voltage V12 of the first comparator ad1 and the second comparator ad2, the current I1 flowing through the capacitor C1, and the output voltage V13 of the switching unit 130. I did it.

Referring to FIG. 4, the current I1 flowing through the capacitor C1 is a value obtained by multiplying the capacitance by the rate of change of the voltage across the capacitor C1.

Accordingly, when the microcomputer 10 is in a normal state, the output voltage V12 of the first comparator ad1 and the second comparator ad2 is constant at a low level, and the current I1 flowing through the capacitor C1 Also does not occur.

On the other hand, when a current enters the base end of the switching element Q, the switching element Q is turned on, otherwise the switching element Q may maintain an off state.

Accordingly, the output voltage V13 of the switching unit 130 maintains a high level, and a high level is applied to the second terminal 12, so that the microcomputer 10 maintains a normal state.

If the microcomputer 10 is in an abnormal state such as runaway, the output voltage V12 of the first comparator ad1 or the second comparator ad2 is changed to a high level, and the voltage across the capacitor C1 changes. Accordingly, a current I1 flowing through the capacitor C1 is generated.

When a current flows through the capacitor C1, the switching element Q is turned on, and the output voltage V13 of the switching unit 130 changes the low level. Accordingly, a low level is applied to the second terminal 12 and the micom 10 may be reset.

On the other hand, when the microcomputer 10 is in an abnormal state such as runaway, the output voltage V12 of the first comparator ad1 or the second comparator ad2 is changed to a high level, and the voltage change across the capacitor C1 Accordingly, a current I1 flowing through the capacitor C1 is instantaneously generated. When the output voltage V12 of the first comparator ad1 or the second comparator ad2 maintains a high level, the voltage change across the capacitor C1 disappears, so the current I1 flowing through the capacitor C1 again becomes It becomes 0. Accordingly, a pulse including a low level period may be generated as an output of the switching unit 130. The pulse including the low level period may be applied to the second terminal 12 as a reset signal to reset the microcomputer 10.

According to the present invention, it is possible to reset the micom in a state of congestion increase to Jangdo without user manipulation.

In addition, it is possible to reduce the cost and reset time by simplifying the configuration of the microcomputer reset circuit.

In addition, it is possible to prevent home appliance products from stopping in case of a microcomputer runaway.

5 is a circuit diagram showing a micom reset circuit according to an embodiment of the present invention, and FIGS. 6 and 7 are diagrams referenced for explanation of the operation of the micom reset circuit shown in FIG. 5.

5, a micom reset circuit 200 according to an embodiment of the present invention includes a micom 20 and a micom including a first terminal 21 and a second terminal 22 through which a predetermined signal is input/output. 20) may include reset units 210, 220, and 230 capable of automatically resetting the microcomputer 20 when it falls into a congestion state.

The microcomputer 20 may include a plurality of terminals including a first terminal 21 and a second terminal 22 through which a predetermined signal is input/output.

The first terminal 21 may be a signal terminal that outputs a predetermined signal. For example, the first terminal 21 may output a PWM signal having a predetermined duty and a predetermined frequency. The micom 20 may output a PWM signal having a predetermined duty and a switching frequency through the first terminal 21. Here, the PWM signal output through the first terminal 21 may be used as a reference signal capable of determining the congestion state of the microcomputer.

5 to 7 illustrate a case in which a PWM signal having a duty of 50%, a switching frequency of 10 kHz, and 5V is output through the first terminal 21. However, the present invention is not limited thereto, and the type, duty, switching frequency, and voltage of the signal output through the first terminal 21 may be variously changed.

The second terminal 22 may be a reset terminal receiving a reset signal for resetting the microcomputer 20. When a preset reset signal is input to the second terminal 22, the micom 20 may be automatically reset.

Here, the reset signal may include a low level period, and the second terminal 22 may be a reset terminal (reset bar terminal) that performs a reset operation in response to a low level reset signal.

For example, the second terminal 22 of the microcomputer 20 may be set to operate in negative logic, and the reset operation may be performed only when a low level signal is applied to the second terminal 22.

According to an embodiment, when a low level is applied to the second terminal 22 and is converted to a high level, a reset operation may be performed.

Meanwhile, the micom reset circuit 200 according to an embodiment of the present invention includes a high pass filter 210 connected to the first terminal 21 and an output of the high pass filter 210. And, when the low level is input, the first switching unit 220 is turned off, and is connected to the output of the first switching unit 220, and is based on the off of the first switching unit 220 , A second switching unit 230 for outputting a reset signal to the second terminal 22.

When the micom 20 is congested, a PWM signal in which a high level and a low level are periodically repeated is broken. In addition, during runaway, the input voltage of the high pass filter 210 may have a constant value. Referring to FIG. 6, a signal output from the first terminal 21 outputs only a high level or a low level. Accordingly, the input voltage of the high pass filter 210 may have a constant value of a high or low level.

The high pass filter 210 may remove low frequency components. That is, when a signal substantially maintaining a constant level is input due to the congestion of the microcomputer 20, the high pass filter 210 does not pass, and the high pass filter 210 outputs a low level.

Conversely, when a PWM signal in which a high level and a low level are periodically repeated is normally input, the high pass filter 210 outputs a high level.

The first switching unit 220 may include one or more switching elements Q1 that are turned off when a low level is input.

For example, in the first switching element Q1, a collector terminal is connected to the second switching unit, and a base terminal is connected to the output of the high pass filter 210, and is turned off when the low level is input. ) May be a bipolar junction transistor (BJT). The switching element Q1 may be an npn bipolar junction transistor BJT.

In addition, the second switching unit 230 may include one or more switching elements Q2 that are turned on when a high level is input.

For example, in the second switching element Q2, a collector end is connected to the second terminal, and a base end is connected to the output of the first switching unit 220, It may be a bipolar junction transistor (BJT) turned on when the output voltage of the first switching unit 220 changes from a low level to a high level in response to OFF. The second switching element Q2 may be an npn bipolar junction transistor BJT.

When the microcomputer 20 is in the normal mode, the input V21 of the first switching unit 220 is a high level, and the output V22 of the first switching unit 220 is low ( Low) level.

When the input V22 of the second switching unit 230 is at a low level, the output V23 of the second switching unit 230 is at a high level, and the micom 20 may maintain a normal state. .

In contrast, when the microcomputer 20 is in an abnormal mode such as runaway, the input V21 of the first switching unit 220 is at a low level, and the output V22 of the first switching unit 220 is at a high level. do.

When the input V22 of the second switching unit 230 is at a high level, the output V23 of the second switching unit 230 is at a low level, and as a low level is applied to the reset terminal 22, the microcomputer is (20) can be reset.

The micom reset circuit 200 according to an embodiment of the present invention may further include a capacitor C2 disposed between the first switching unit 220 and the second switching unit 230.

Depending on the embodiment, a resistor is connected to the capacitor C2 to form a differential circuit that generates a trigger pulse voltage for operating the switching circuit.

7 schematically shows an output voltage V22 of the first switching unit 220, a current I2 flowing through the capacitor C2, and an output voltage V23 of the second switching unit 230.

In the normal mode, the high pass filter 210 outputs a high level. That is, in the normal mode, the input voltage V21 of the first switching unit 220 is at a high level, the first switching element Q1 is turned on, and the output of the first switching unit 220 The voltage V22 goes to a low level.

Referring to FIG. 7, the current I2 flowing through the capacitor C2 is a value obtained by multiplying the capacitance by the rate of change of the voltage across the capacitor C1.

On the other hand, when current enters the base end of the second switching element Q2, the second switching element Q2 is turned on, otherwise the second switching element Q2 maintains an off state. I can.

Accordingly, when the microcomputer 20 is in a normal state, the output voltage V22 of the first switching unit 220 is constant at a low level, and a current I2 flowing through the capacitor C2 is not generated.

Accordingly, the output voltage V23 of the first switching unit 220 maintains a high level, and a high level is applied to the second terminal 22, so that the micom 20 maintains a normal state.

If the microcomputer 20 is in an abnormal mode such as congestion, the output of the high pass filter 210 goes to a low level, and the first switching element Q1 is turned off, so that the first switching unit 220 The output voltage V22 of) is changed to a high level, and a current I2 flowing through the capacitor C2 is generated according to the voltage change across the capacitor C2.

When a current flows through the capacitor C2, the second switching element Q2 is turned on, and the output voltage V23 of the second switching unit 230 changes at a low level. Accordingly, a low level is applied to the second terminal 22 and the micom 20 may be reset.

On the other hand, when the micom 20 is in an abnormal mode such as runaway, the output voltage V22 of the first switching unit 220 is changed to a high level, and flows through the capacitor C2 according to the voltage change across the capacitor C2. Current I2 is generated instantaneously. When the output voltage V22 of the first switching unit 220 maintains a high level, a voltage change across the capacitor C2 disappears, and the current I2 flowing through the capacitor C2 again becomes zero. Accordingly, a pulse including a low level period may be generated as an output of the second switching unit 230. A reset signal, which is a pulse including a low level period, is applied to the second terminal 22 to reset the microcomputer 20.

According to at least one of the embodiments of the present invention, the microcomputer may be automatically reset.

In addition, according to at least one of the embodiments of the present invention, it is effective in terms of economy and stability by resetting according to an abnormal state of the micom without adding a separate micom and sensor.

In addition, according to at least one of the embodiments of the present invention, it is possible to reduce cost and reset time by simplifying the configuration of the micom reset circuit.

In addition, it is possible to prevent home appliance products from stopping in the event of a micom runaway.

The micom reset circuit according to the present invention is not limited to the configuration and method of the embodiments described as described above, but the embodiments are all or part of each of the embodiments selectively combined so that various modifications can be made. It can also be configured.

Meanwhile, the control method of the micom reset circuit according to an embodiment of the present invention can be implemented as a code that can be read by a processor on a recording medium that can be read by a processor. The processor-readable recording medium includes all types of recording devices that store data that can be read by the processor. Examples of recording media that can be read by the processor include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, etc., and also include those implemented in the form of carrier waves such as transmission through the Internet. . Further, the processor-readable recording medium is distributed over a computer system connected through a network, so that the processor-readable code can be stored and executed in a distributed manner.

In addition, although the preferred embodiments of the present invention have been illustrated and described above, the present invention is not limited to the specific embodiments described above, and the technical field to which the present invention belongs without departing from the gist of the present invention claimed in the claims. In addition, various modifications are possible by those of ordinary skill in the art, and these modifications should not be individually understood from the technical spirit or prospect of the present invention.

Micom reset circuit: 100, 200
Micom: 10, 20
Terminal 1: 11, 21
Terminal 2: 12, 22
Low Pass Filter: 110
First comparator: 121
Second comparator: 122
Switching section: 130
High Pass Filter: 210
First switching unit: 220
Second switching unit: 230

Claims (11)

delete delete delete delete delete delete A microcomputer including a first terminal outputting a predetermined signal and a second terminal receiving a reset signal;
A high pass filter connected to the first terminal;
A first switching unit connected to the output of the high pass filter and turned off when a low level is input; And.
A second switching unit connected to the output of the first switching unit and configured to output the reset signal to the second terminal based on the first switching unit being turned off. The method of claim 7,
The first switching unit includes a bipolar junction transistor (BJT) in which a collector terminal is connected to the second switching unit, and a base terminal is connected to an output of the high pass filter, and is turned off when the low level is input. A micom reset circuit, characterized in that. The method of claim 7,
A micom reset circuit further comprising a capacitor disposed between the first switching unit and the second switching unit. The method of claim 9,
In the second switching unit, a collector terminal is connected to the second terminal, and a base terminal is connected to an output of the first switching unit, so that the output voltage of the first switching unit is at a low level in response to the first switching unit being turned off. A micom reset circuit comprising a bipolar junction transistor (BJT) that is turned on when it changes to a high level. The method of claim 7,
The first terminal outputs a PWM signal having a predetermined duty and a predetermined frequency,
The micom reset circuit, characterized in that the input voltage of the high pass filter has a constant value during the micom runaway.

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