KR101936364B1 - Memory management system using flash memory and method thereof - Google Patents

Abstract

The present invention relates to a memory managing system for an electronic device which uses a flash memory. The memory managing system comprises: a memory which temporarily stores a program for conducting conversion between a physical address and a logical address for access to a flash memory; and a processor which executes the program. In addition, the processor determines a partition corresponding to a target logical page in response to a request for access to the target logical page, calculates the address of a physical page corresponding to the target logical page by reading table information corresponding to the partition from a mapping table, and accesses the relevant physical page of the flash memory. At this time, the processor manages a plurality of logical pages in a single partition unit according to both the order of mapping table access requests and the order of increasing index of logical pages subject to the access requests, and includes a bitmap indicating offset information of each logical page included in each partition and the physical page corresponding to the each logical page. Therefore, the memory managing system can reduce the size of the mapping table and can efficiently conduct conversion between the logical address and the physical address.

Description

[0001] MEMORY MANAGEMENT SYSTEM USING FLASH MEMORY AND METHOD THEREOF [0002]

The present invention relates to a memory management system using a flash memory and a method thereof, and more particularly, to a method for managing a memory using a mapping page for managing logical pages having a sequence rule in units of a bundle, will be.

Recently, solid state drives (SSDs) have led the market for portable terminals and notebooks because of their low latency, high bandwidth and energy efficiency. The SSD market has grown at a CAGR of 45.1% over the past five years. In particular, NAND flash, which is mainly used for SSD, has characteristics different from those of conventional hard disks. First, NAND flash can not be overwritten. Therefore, in order to write data to an invalid page, a delete operation must be performed. Second, the unit memory area in which the erase operation of the NAND flash is performed differs from the unit memory area in which the write / read operation is performed. NAND flash performs the erase operation on a block basis, but performs a read / write operation on a page basis.

On the other hand, the input / output command input from the host must be converted into a form that can be executed by the NAND flash. Accordingly, the Flash Translation Layer manages a mapping table for mapping a logical address and a physical address, and performs a deletion operation such as a garbage collection for acquiring a free block when memory space becomes insufficient. The algorithm of this flash conversion layer affects the performance of NAND flash. The conventional page mapping technique is a technique for maintaining a mapping table on a page unit basis and stores the address of a physical page for each logical page in the mapping table so that a physical page corresponding to the logical page can be found immediately. Therefore, in order to maintain the mapping information for each logical page, there is a disadvantage that the amount of used RAM increases as the number of logical pages increases.

The Demand-based Flash Translation Layer (DFTL) manages the mapping table on a page basis in the same manner as the page mapping method described above. However, the DFTL technique caches all mapping tables instead of loading them into RAM. Therefore, the RAM usage can be reduced while generating the same result as the page mapping method at the time of address conversion. However, the DFTL scheme has a disadvantage that an overhead occurs due to a cache miss in the case of performing a random read / write operation.

In this regard, Korean Patent Laid-Open Publication No. 2014-0116617 (titled "Flash memory-based page address mapping method and system"), when sequential logical addresses and physical addresses are sequentially sequential, A method for reducing the number of read operations by reducing the size of a mapping table using the size of data information is disclosed. Particularly, the above-mentioned patent has efficiency to improve the performance at the time of booting the system in which logical addresses and physical addresses which are sequentially increased are loaded.

It is an object of the present invention to provide a mapping table for managing a plurality of logical pages as one table information, thereby reducing the amount of RAM used, The purpose of the present invention is to reduce the overhead of segmentation / merging of mapping tables by allowing pages to have ordering rules. It should be understood, however, that the technical scope of the present invention is not limited to the above-described technical problems, and other technical problems may exist.

According to a first aspect of the present invention, there is provided a memory management system comprising: a memory for temporarily storing a program for performing a conversion between a physical address and a logical address for flash memory access; And a processor for executing the program, wherein the processor, in response to the access request for the target logical page, determines a partition corresponding to the target logical page, reads table information corresponding to the partition from the mapping table The address of the physical page corresponding to the target logical page is calculated, and the physical page of the flash memory is accessed. At this time, the mapping table manages a plurality of logical pages in one partition unit in accordance with the order of the access requests and the order in which the indexes of the logical pages requested to be accessed are incremented, and each logical page included in each partition and each logical page And a bitmap indicating offset information of the corresponding physical page.

In addition, a method of operating a memory management system according to the second aspect of the present invention includes: determining a first partition corresponding to the target logical page in response to an access request for a logical page; Reading table information corresponding to the first partition from the mapping table and calculating an address of a physical page corresponding to the target logical page; And accessing a physical page of the flash memory. At this time, the mapping table manages a plurality of logical pages in one partition unit according to the order of the access requests and the order of the indexes of the logical pages requested to be accessed, and each logical page included in each partition and each logical page And a bitmap indicating offset information of the corresponding physical page.

A third aspect of the present invention provides a computer-readable recording medium having recorded thereon a program for implementing the second aspect.

According to the present invention, the size of the mapping table can be reduced by managing a plurality of logical pages whose indexes increase in a partition unit. In addition, by converting a logical page included in a partition and an offset of a physical page allocated to each logical page into one bitmap, conversion between a logical address and a physical address can be efficiently performed.

In addition, by partitioning and managing logical pages on a cluster basis, it is possible to efficiently select victim partitions to be subjected to partition merge, thereby increasing the efficiency of partition merging.

1 is a block diagram illustrating a configuration of a memory management system according to an embodiment of the present invention.
2 illustrates an example of a mapping table according to an embodiment of the present invention.
3 is a flowchart illustrating a method of performing a read operation by the processor of FIG. 1 according to an embodiment of the present invention.
4 is a diagram illustrating an example of a mapping table according to an embodiment of the present invention.
5 is a flowchart illustrating a method of performing a write operation by the processor of FIG. 1 according to an embodiment of the present invention.
6 is a diagram illustrating an example of a mapping table and a stream table according to an embodiment of the present invention.
7 is a flowchart illustrating a process of merging partitions according to an embodiment of the present invention.
8 is a diagram illustrating an example of partitions corresponding to clusters according to an embodiment of the present invention.
9 is a table comparing a result of applying the memory management system according to an embodiment of the present invention to a page unit memory management system.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, which will be readily apparent to those skilled in the art. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Throughout the specification, when a part is referred to as being "connected" to another part, it includes not only "directly connected" but also "electrically connected" with another part in between . Also, when an element is referred to as "comprising ", it means that it can include other elements as well, without departing from the other elements unless specifically stated otherwise.

Hereinafter, a memory management system of an electronic device according to some embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram showing the configuration of a memory management system 10 according to an embodiment of the present invention.

The memory management system 10 includes a flash memory 11 that keeps stored information even when power is not supplied, a random access memory 12 that requires power to maintain stored information, and a processor 13. [

The flash memory 11 is a nonvolatile memory device that can electrically erase and rewrite data, and is configured to read / write data. However, the flash memory 11 does not allow overwriting of data, and can reuse after deleting data (garbage collection) at a predetermined size. On the other hand, the flash memory 11 includes a NOR flash memory or a NAND flash memory. The NAND flash memory can read / write data on a page basis, and can erase data on a block-by-block basis. On the other hand, the NOR flash memory can read / write data in byte units and can delete data in block units.

A random access memory (RAM) 12 is used for temporarily loading data for the processor 13 to execute the program. That is, the processor 13 may load the data stored in the flash memory 11 into the random access memory 12 to execute various programs, or may unload the executed data to the flash memory 11. On the other hand, since the storage space of the random access memory 12 is smaller than that of the flash memory 11, the processor 13 selectively pages and loads the data of the flash memory 11. To this end, the processor 13 has to access the flash memory 11 to repeatedly read, write or delete data in the flash memory 11. [

On the other hand, the processor 13 uses a logical address (or virtual address) to efficiently utilize the limited resources of the random access memory 12. [ Accordingly, the processor 13 must convert the physical address of the flash memory 11 into a logical address or a physical address to a logical address in order to load data in the flash memory 11. [ To this end, the processor 13 uses a mapping table to convert physical addresses to logical addresses (or vice versa). That is, the processor 13 accesses the flash memory 11 (i.e., reads, writes, or deletes data) using the mapping table in response to an access request (i.e., Or deleted). The mapping table according to an embodiment of the present invention will be described below with reference to FIG. 2, and a description will be given of operations of reading and writing accessing the flash memory 11 by the processor 13 with reference to FIG. 3 to FIG. Explain.

In the following description, it is assumed that the flash memory 11 is a NAND flash memory. That is, the processor 13 converts a physical address into a logical address (or converts a logical address into a physical address) on a page basis. Thus, in the following description, converting a logical page to a physical page may mean converting the starting logical address of the logical page to the starting physical address of the physical page. However, those skilled in the art will readily understand that the disclosed embodiments can also be applied to NOR flash memory.

2 illustrates an example of a mapping table according to an embodiment of the present invention.

Referring to FIG. 2, the processor 13 allocates the mapping table 200 to the random access memory 12 as the electronic device is powered on. The mapping table 200 manages a plurality of logical pages in units of one partition according to the order of access requests and the order in which the indexes of the requested logical pages increase. For example, the mapping table 200 responds to the write requests for the logical pages [# 1, # 4, # 5, # 3] in sequence and generates logical pages [# 1, # 4, Is managed as one partition, and the logical page [# 3] whose sequence is decreased is managed by another partition.

In addition, the mapping table 200 includes a bit map 210 indicating each logical page included in each partition and offset information of a physical page corresponding to each logical page. In addition, the mapping table 200 includes an identifier (e.g., index) (cluster #) 240 corresponding to each partition, a start block 230 of each partition and a start physical page # : Start PPN) 220. Here, the cluster 240 is a unit for identifying logical pages, and divides a certain number of logical pages into one cluster.

Specifically, the '1' bit position of the bit map 210 indicates offset information of the logical page, and the '1' bit number of the bit map 210 indicates offset information of the physical page. For example, if the logical page mapped to the partition is [# 1, # 3, # 5], the bitmap can be represented as '010101'. That is, the logical pages indicated by the partition are calculated as "(cluster of partitions) * (number of logical pages per cluster) + (position of bitmap)". Also, the number of '1' bits located before the bit representing each logical page in the bitmap represents the offset of the physical page corresponding to each logical page. That is, since the number of '1' bits located before the bit indicating the logical page # 3 is 1, the physical page corresponding to the logical page # 3 is "(starting block of the partition) * (the number of physical pages per block) (Start physical page) + 1 ". Since the number of '1' bits located before the bit representing the logical page # 5 is 2, the physical page corresponding to the logical page # 5 is "(the start block of the partition) * (the number of physical pages per block) (Start physical page) + 2 ".

As described above, the mapping table according to an embodiment of the present invention can efficiently convert logical pages and physical pages using bitmap information. On the other hand, the mapping table 200 may further include the valid number of pages (VALID CNT) of the partition, in addition to the above-described information. Further, the mapping table 200 may further include validity information. At this time, the validity information indicates the validity of the logical page included in the partition, and may indicate that the pages of the partition are not written, valid, or invalid. In addition, the mapping table 200 may further include an index of the starting logical page, but is not limited thereto.

Meanwhile, the mapping table according to an embodiment of the present invention can align the bitmap with the cluster. That is, the processor 13 limits the size of the bitmap to the number of logical pages contained in the cluster, and by matching the logical page indicated by the first bit of the bitmap with the first logical page of the cluster, It is possible to reduce the overhead of the time.

3 is a flowchart illustrating a method of performing a read operation by the processor 13 according to an embodiment of the present invention.

Referring to FIG. 3, the processor 13 extracts a partition corresponding to the target logical page based on the cluster including the target logical page requested to be read (S310). For example, the processor 13 searches the cluster field (240 in FIG. 2) of the mapping table to extract a partition having a cluster including the target logical page. On the other hand, the processor 13 extracts the partition index in descending order of the partition index. This is because the processor 13 gradually increases the index and allocates the partitions, so that the larger the index, the higher the probability that the processor 13 has valid data.

Thereafter, the processor 13 determines whether there is a physical page mapped to the target logical page using the bitmap of the extracted partition and the offset of the target logical page (S320). That is, the processor 13 determines whether or not the bit located at "(logical page)% (the number of logical pages per cluster)" in the bitmap of the extracted section is "1" Determine if the page exists. At the same time, the processor 13 can determine whether the extracted partition includes a valid page by referring to the valid page number field (VALID PAGE # of FIG. 2) or the validity field of the mapping table.

If there is a physical page mapped to the target logical page, the processor 13 calculates the physical page address using the bitmap field, the start block field, and the start physical page field of the extracted partition (S330). That is, the processor 13 reads the bit of the bit read from the bitmap corresponding to the offset of the target logical page to calculate the offset of the physical page, and calculates the sum of the offset of the starting physical page of the partition and the calculated physical page Accesses the start block of the partition as a basis.

Referring to FIG. 4, in response to a read request for logical page # 4, processor 13 searches for a partition corresponding to cluster # 1 to which logical page # 4 belongs. At this time, the processor 13 searches in the descending order of the indexes to extract the partition # 2. Since the bit corresponding to the offset (i.e., the first bit) of the logical page # 4 is '1' in the bitmap '1001' of the partition # 2, the processor 13 writes the logical page # It is determined that the physical page exists. The processor 13 then determines the start block (that is, the block # 2) based on the offset (i.e., 0) of the physical page corresponding to logical page # 4 and the sum of the starting physical page Block # 0) can read the data stored in the second physical page.

On the other hand, if there is no physical page mapped to the target logical page in the above-described step S320, the processor 13 searches for another partition. At this time, the processor 13 searches for a partition having a large index, so that the index of the searched partition may be lower than the index of the partition searched at the above-described step S310.

4, the processor 13, in response to the read request for the logical page # 5, extracts the partition # 2 corresponding to the cluster # 1 to which the logical page # 5 belongs. However, since the bit corresponding to the offset (i.e., the first bit) of the logical page # 5 is '0' in the bitmap '1001' of the partition # 2, It is determined that there is no mapped physical page. Then, the processor 13 searches for the partition # 1 corresponding to the cluster # 1. Since the bit corresponding to the offset (i.e., 1) of the logical page # 5 is '1' in the bitmap '0100' of the partition # 1, the processor 13 determines that the physical page mapped to the logical page # 5 exists .

Referring again to FIG. 3, the processor 13 accesses the flash memory 11 using the physical page mapped to the target logical page, and reads the data stored in the physical page (S340).

5 is a flowchart illustrating a method of performing a write operation by the processor 13 according to an embodiment of the present invention. As described above, since the flash memory 11 does not allow overwriting, the processor 13 must allocate a new physical page if there is a physical page mapped to the logical page. Hereinafter, this will be described in detail.

First, the processor 13 extracts a partition corresponding to the target logical page based on the cluster including the logical page requested to be written (S510). Subsequently, the processor 13 determines whether there is a physical page mapped to the target logical page using the bitmap of the extracted partition and the offset of the target logical page (S520). If the partition corresponding to the target logical page is not extracted in step S520, the processor 13 directly performs step S540 without performing the following step S530.

If there is a physical page mapped to the target logical page in step S520, the processor 13 calculates the address of the physical page mapped to the target logical page using the bitmap of the extracted partition and the offset of the target logical page (S530). Meanwhile, the operation method of the processor 13 in the above-described steps S510 to S530 is the same as or similar to the steps S310 to S330 in FIG. 3, respectively, and detailed description will be omitted.

Then, the processor 13 searches for a partition in the allocated state to store the data of the target logical page (S540). At this time, the processor 13 searches for a partition based on a stream table. Here, the stream table is information on partitions in an allocated state including pages in an unallocated state, and includes an identifier (for example, an index) of corresponding partitions, a logical page last written to the partition, And may include information about physical pages. Based on the stream table, the processor 13 searches for a partition whose index of the last written logical page is smaller than the index of the target logical page.

6 is a diagram illustrating an example of a mapping table and a stream table according to an embodiment of the present invention. An example in which the processor 13 performs a write operation to the logical page # 3 will be described with reference to FIG. First, since the partition # 1 of the mapping table 601 includes the information about the logical page # 3, the logical page # 3 has the physical mapped physical page (that is, the physical page # 6). Thus, the processor 13 searches for a partition having a logical page smaller than # 3 among the last written logical pages 610 of the stream table 602. [ In this case as well, the processor 13 can first search for the index of the stream table 602 starting from the largest index. Thus, the processor 13 can determine partition # 3 as a new partition.

Referring again to FIG. 5, the processor 13 may store the data of the target logical page on the next page of the physical page last allocated to the discovered new partition (S550). Referring again to Figure 6, for example, the processor 13 determines that the physical page # 10 (i.e., physical page # 10) of the physical page last allocated to each partition of the stream table 602 ), The data of the target logical page can be stored. Thereafter, the processor 13 may update the mapping table and the stream table so as to correspond to the target logical page and the physical page allocated thereto (S560). 6, the number of effective pages (VALID) of the partition # 1 mapped in the logical page # 3 is adjusted to (2-1), and the logical page # 3 is newly allocated to the partition # 3 Is adjusted to '0111', and the number of effective pages (VALID) of partition # 3 is adjusted to 3.

However, if no new partition is found in step S530, the processor 13 allocates a new partition (S570). On the other hand, the maximum usable number of partitions can be limited. Accordingly, if the number of preallocated partitions is the maximum number of available partitions, the processor 13 performs the partition merge (S580). This will be described in detail with reference to FIG.

Meanwhile, if the partition is searched or allocated but the storage space of the flash memory 11 is insufficient (for example, the last page is allocated), the processor 13 performs a deletion operation (i.e., garbage collection) (S590) . In this case, the processor 13 can arrange the order of the valid pages in the victim block to be deleted and perform the copying operation. On the other hand, the processor 13 can determine a block having the smallest number of valid pages as a big team block, but the present invention is not limited thereto.

7 is a flowchart illustrating a process of merging partitions according to an embodiment of the present invention. If the maximum number of uses of a partition is limited, the processor 13 can merge the partitions.

To this end, the processor 13 determines the victim partitions to be used for merging partitions (S710). For example, the processor 13 may group the partitions corresponding to each cluster in a cluster unit, and compare the number of effective pages of the grouped partitions to select a victim group group. At this time, if the number of partitions included in the victim partition group is equal to or larger than "(the number of logical pages included in the cluster / the bitmap size of the partition + 2)", at least one unallocated partition can be obtained. Therefore, the processor 13 can compare the number of valid pages only when the number of partitions included in the partition group is equal to or larger than "(the number of logical pages included in the cluster / the bitmap size of the partition + 2)".

On the other hand, the correspondence of the partition to the cluster may mean that the index of the start logical page of the partition belongs to the cluster. If the starting logical page of partition # 0 is logical page # 0, the starting logical page of partition # 1 is logical page # 3, and the starting logical page of partition # 2 is logical page # 2, Partitions [# 0, # 1, # 2] correspond to cluster # 0.

Thereafter, the processor 13 sorts and copies the valid pages of the big-team partitions in order (S720). That is, the processor 13 performs a read operation in order from the logical page having the lowest index, and can perform the write operation to the allocated physical page using the lowest index partition of the big team. Referring again to FIG. 8, the processor 13 merges the partitions # 0, # 1, and # 2 into one or two partitions through the above-described process, thereby obtaining one or two unallocated partitions Can be obtained.

On the other hand, the processor 13 can perform the erase operation to the flash memory 11 together because the merge operation includes the copy operation (i.e., read and write operations) of the valid physical page. Thus, the processor 13 can determine the big-team partitions in the same way as in the erase operation. However, the present invention is not limited thereto, and the processor 13 may determine the high density partitions as the big team partitions.

As described above, the memory management system 10 according to an embodiment of the present invention manages the mapping table in units of a plurality of pages, thereby generating about 8 times as much memory usage efficiency as the conventional page-level memory management system . FIG. 9 is a table comparing a result of applying the memory management system 10 according to an embodiment of the present invention to a page-based memory management system. In the table of Fig. 9, "# of PARTITION (x)" indicates a number of times of the number of partitions covering the storage space of the flash memory 11 when it is assumed that the writing operation is performed in an increasing order. For example, if your partition size is 512 KB in 64 GB of storage, you must have a 128K partition to use the entire storage space without any partition merging. In this case, if "# of PARTITION (double)" is 2, it indicates that the partition is allocated to 256 KB.

The above-described electronic apparatus and memory management method having a memory management system according to an embodiment of the present invention may be implemented in the form of a recording medium including instructions executable by a computer such as a program module executed by a computer . Computer readable media can be any available media that can be accessed by a computer and includes both volatile and nonvolatile media, removable and non-removable media. The computer-readable medium may also include computer storage media. Computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data.

While the systems and methods of the present invention have been described with reference to particular embodiments, some or all of their components or operations may be implemented using a computer system having a general purpose hardware architecture.

It will be understood by those skilled in the art that the foregoing description of the present invention is for illustrative purposes only and that those of ordinary skill in the art can readily understand that various changes and modifications may be made without departing from the spirit or essential characteristics of the present invention. will be. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

10: Memory Management System
11: Flash memory
12: random access memory
13: Processor
200, 601: mapping table
602: Stream table

Claims (15)

In an electronic device using a flash memory,
A memory for temporarily storing a program for performing a conversion between a physical address and a logical address for the flash memory access; And
And a processor for executing the program,
The processor, as the program is executed,
Determining a first partition corresponding to the first logical page in response to an access request for a first logical page, reading table information corresponding to the first partition from a mapping table, Calculating an address of a first physical page, accessing the first physical page of the flash memory,
Wherein the mapping table comprises:
A plurality of logical pages are managed in a single partition unit in accordance with the order of access requests and the order in which the indexes of the logical pages requested to be accessed are incremented, and each logical page included in each partition and a physical page And a bitmap indicating offset information of the bitmap. The method according to claim 1,
The mapping table
Cluster information corresponding to each partition, starting block information corresponding to each partition, and starting physical page information. 3. The method of claim 2,
Wherein a position of a '1' bit included in the bit map indicates offset information of each logical page, and a number of '1' bits included in the bit map indicates offset information of each physical page. The method of claim 3,
The processor
Extracting the first partition based on a cluster including the first logical page, and using the bitmap of the first partition and the offset of the first logical page, Lt; RTI ID = 0.0 > physical < / RTI > The method of claim 3,
If the access request is a read request,
The processor
The address of the first physical page is calculated using the bitmap, the start block, and the start physical page of the first partition when there is a physical page mapped to the first logical page, If there is no physical page mapped to the cluster, extracts a second partition corresponding to the cluster,
And the index of the second partition is smaller than the index of the first partition. 6. The method of claim 5,
The processor
A first physical page of the first partition and a second physical page of the first partition, wherein the first physical page and the offset of the first physical page are read by reading the bits before the bit corresponding to the offset of the first logical page in the bitmap of the first partition, Of the first partition of the first partition. The method of claim 3,
If the access request is a write operation,
The processor
The address of the first physical page is calculated using the bitmap, the start block, and the start physical page of the first partition when the physical page mapped to the first logical page exists, Browse the partitions,
And wherein the third partition is one in which the index of the second logical page written last is less than the index of the first logical page. 8. The method of claim 7,
The processor
Searching for a third partition in the allocated state based on a stream table,
The stream table
For each of the partitions in the allocated state including the page in the unallocated state, an identifier of each partition, a logical page last written to each partition, and information on the last allocated physical page. 9. The method of claim 8,
The processor
If the third partition is not searched based on the stream table and if the number of pre-allocated partitions is the maximum number of usable partitions, merge pre-allocated partitions. 10. The method of claim 9,
The processor
Grouping partitions having start logical pages belonging to each cluster, determining a big team partition group based on the number of valid pages of the grouped partitions,
Wherein the number of partitions included in the victim partition group is equal to or greater than (the number of pages included in the cluster / the bitmap size of the partition + 2). A memory management method for an electronic device using a flash memory,
Responsive to an access request for a target logical page, determining a first partition corresponding to the target logical page;
Reading table information corresponding to the first partition from a mapping table and calculating an address of a physical page corresponding to the target logical page; And
Accessing the physical page of the flash memory,
Wherein the mapping table comprises:
A plurality of logical pages are managed in a single partition unit in accordance with the order of access requests and the order in which the indexes of the logical pages requested to be accessed are incremented, and each logical page included in each partition and a physical page And a bitmap indicating offset information of the bitmap. 12. The method of claim 11,
The mapping table
And cluster information corresponding to each partition, start block information corresponding to each partition, and start physical page information. 13. The method of claim 12,
Wherein a position of a '1' bit included in the bit map indicates offset information of each logical page, and a number of '1' bits included in the bit map indicates offset information of each physical page. 14. The method of claim 13,
The step of determining the first partition
Extracting the first partition based on a cluster including the target logical page; And
Determining whether a physical page mapped to the target logical page exists using the bitmap of the first partition and the offset of the target logical page,
Wherein the step of calculating the address of the physical page corresponding to the target logical page
Wherein the address of the physical page is calculated using the bitmap of the first partition, the start block, and the start physical page. A computer-readable recording medium on which a program for implementing the method of any one of claims 11 to 14 is recorded.

Images