KR101829995B1 - Transactional memory apparatus based on collision prediction between transactions and method for operating transactional memory apparatus - Google Patents

Abstract

A transactional memory device based on collision prediction between transactions and a method for operating a transactional memory device are disclosed. A transactional memory device based on the collision prediction between transactions may include: an interface for receiving a processing request for a second transaction different from a first transaction while the first transaction is processed; and a processor for predicting the probability of a conflict between the first and second transactions in a first memory region where the first transaction is processed and a second memory region for processing the second transaction. It is possible to improve processing performance.

Description

Technical Field [0001] The present invention relates to a transactional memory device and a transactional memory device based on conflict prediction between transactions, and more particularly to a transactional memory device and a transactional memory device,

The embodiments of the present invention predict a possibility of a collision between transactions, and consider a possibility of a collision, a memory area (for example, an HTM (Hardware Transactional Memory) area, a STM (Software Transactional Memory) area, To a transactional memory device and a method of operation of a transactional memory device that improve processing performance for a transaction.

The Transactional Memory (TM) has greatly changed the parallel programming paradigm for transaction processing. Recently, as the Transactional Synchronization Extension (TSX) has been proposed, researches using it have been actively conducted.

In addition, studies have been made to improve the processing performance of transaction null memory. For example, HyTM (Hybrid) which improves processing performance by selectively using HTM (Hardware TM) or STM (Software TM) TM) has been proposed.

However, such a HyTM can detect a collision, but it is not easy to select a memory area suitable for processing a transaction among HTMs or STMs because it can not predict the possibility of collision.

Therefore, there is a need for a technique capable of improving processing performance by easily selecting a memory area suitable for processing a transaction by predicting a possibility of collision between transactions and determining a memory area for processing the transaction in consideration of the possibility of collision .

The present invention predicts a possibility of a collision between transactions based on a transaction history between transactions and determines a memory area (for example, an HTM area, an STM area, a serial execution area) to process a transaction in consideration of the possibility of collision, The present invention aims to improve processing performance by easily selecting a memory area suitable for processing the memory area.

It is another object of the present invention to provide an environment in which a transaction can be efficiently processed by optimally adjusting the number of retries given to a transaction.

To achieve the above object, a transactional memory device based on inter-transaction conflict prediction includes an interface for receiving a processing request for a second transaction different from the first transaction while a first transaction is being processed, A processor for predicting a probability of a conflict between the first and second transactions in a first memory region to be processed and for determining a second memory region to process the second transaction, have.

A method for operating a transactional memory device based on a conflict prediction between transactions, comprising: confirming whether a first transaction different from the second transaction is being processed, in association with a processing request input for a second transaction; Predicting a possibility of a conflict between the first and second transactions in a first memory area in which the first transaction is handled if it is determined that the first transaction is being processed; And determining a second memory area to process.

According to an embodiment of the present invention, a possibility of collision between transactions is predicted based on a transaction history between transactions, and a memory area (for example, an HTM area, an STM area, a serial execution area) Thereby making it possible to easily select a memory area suitable for processing a transaction, thereby improving processing performance.

In addition, according to the embodiment of the present invention, it is possible to optimally adjust the number of retries given to a transaction and to provide an environment in which transactions can be efficiently processed.

1 is a block diagram of a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.
2 is a diagram illustrating an example of a configuration of a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating an example of information on a transaction configured in the transactional memory device based on the inter-transaction conflict prediction according to an embodiment of the present invention.
FIG. 4 is a view for explaining an example of execution of a momentum-based jump algorithm in a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.
5 is a flowchart illustrating a method of operating a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.

Hereinafter, an operation method of a transactional memory device and a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.

1, a transactional memory device (hereinafter referred to as a 'transactional memory device') 100 based on a conflict prediction between transactions includes an interface 101, a processor 103 and a database 105 can do.

The interface 101 can receive a processing request for a second transaction different from the first transaction while the first transaction is being processed.

The interface 101 receives a processing request for the arbitrary second transaction automatically when the processing request for the second transaction is discarded by the processor 103 after the completion of the processing of the first transaction .

The processor 103 is configured to predict the probability of a conflict between the first and second transactions in a first memory area in which the first transaction is processed, The area can be determined. Here, the first memory area or the second memory area may be any one of a plurality of memory areas (for example, an HTM area, an STM area, and a straight-line performing area).

In the collision probability prediction, the processor 103 acquires a processing history between transactions from the database 105, and can predict a possibility of collision between the first and second transactions based on the processing history between the acquired transactions. Specifically, when processing the first transaction and the second transaction in the same memory area based on a transaction history between transactions, the processor 103 calculates a first number of times a collision occurs and a capacity abort ) Is calculated, and the possibility of collision between the first and second transactions can be predicted using the first number of times and the second number of times calculated. At this time, the processor 103 may further use the number of retries given to the first transaction (or the second transaction) to predict the possibility of collision between the first and second transactions.

As a result, the processor 103 can predict the possibility of a collision between the first and second transactions using at least one of a first count, a second count, and a retry count. At this time, the processor 103 may predict the collision probability by adding the first number, the second number, and the number of retries. Here, the processor 103 can estimate the collision probability by considering the weights for the number of times (the first number, the second number, and the number of retries), and a specific method regarding the collision probability may be expressed by Equation (1) Will be described later.

In determining the second memory area, the processor 103 considers the priorities of the plurality of memory areas (e.g., HTM area-1 order, STM area-2 order, and serial-row performing area-3 order) The second memory area may be determined from among a plurality of memory areas, and when the possibility of collision is equal to or greater than a set value, a memory area different from the first memory area may be determined as the second memory area. For example, the processor 103 may determine the 'HTM area' as the second memory area according to the priorities of the plurality of memory areas, but if the possibility of collision is equal to or greater than the set value, the first memory area is the 'HTM area' , And the " STM area " can be determined as the second memory area.

The processor 103 may process the second transaction in the determined second memory area, taking into account the possibility of the conflict. At this time, if the processing result of the second transaction does not satisfy the predetermined criterion (e.g., when a collision occurs), the processor 103 counts the number of times, , And may discard the processing request if the counted number reaches the number of retries given to the second transaction. In other words, when the processor 103 determines that a conflict has occurred as a result of the processing of the second transaction in the second memory area (e.g., a second transaction has a conflict with the first transaction, , Counts the number of times (the number of times actually retried), and proceeds to reprocess the second transaction. At this time, the processor 103 regards that it is efficient to process the second transaction alone when the counted number coincides with the preset number of retries in the second transaction, The request can be discarded.

On the other hand, when the processing result of the second transaction in the determined second memory area satisfies the predetermined criterion (for example, when no collision occurs), the processor 103 determines, based on the counted number, You can adjust the number of retries given to a transaction. At this time, the processor 103 may replace the retry count with the counted number or decrease the retry count by the set value. For example, when the counted number is '5' and the retry count is '10', the processor 103 may adjust the retry count to '5' by replacing the retry count with the counted number, or '8' .

The processor 103 may also be configured to calculate an average for the number of times counted in each of the plurality of second transactions if the second transaction is a plurality of transactions, The request can be discarded. In other words, the processor 103 processes the arbitrary second transaction, which has performed a relatively large number of reprocessing processes (that is, prediction of the possibility of collision and determination of the second memory area) It is considered to be efficient, and the processing request for the second transaction can be discarded. For example, when the number of times counted in each of the plurality of second transactions is '5, 6, 4, 5, 15', the processor 103 determines that the second transaction counted higher than the average value ('7' , The processing request associated with the second transaction counted as '15' may be discarded.

On the other hand, the processor 103, after discarding the processing request for the second transaction, via the interface 101, if the processing request is automatically re-entered after the processing of the first transaction is completed, Can be treated alone.

The database 105 can store the processing history between transactions.

2 is a diagram illustrating an example of a configuration of a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.

2, the transactional memory device 200 may include a TM controller (TM controller) 201, an HTM manager 211, and an STM manager 217 have.

The TM controller 201 is a component that manages processing of transactions of all workloads and includes a fallback handler 203, an execution predictor 205, a conflict resolver ) 207, and a retry handler (209).

The fallback handler 203 is a module for determining STM or serial execution processing when a problem occurs in processing a transaction as an HTM. At this time, the fallback handler 203 receives the information of the transaction from the execution predictor 205, and determines the best transaction processing region by judging the STM or serial execution processing based on the information of the transaction. Here, the transaction information may be, for example, a collision prediction value for a transaction, a transaction size, a number of transaction write operations, and the like.

The execution predictor 205 constructs transaction meta data and a probabilistic collision matrix using accumulated data (i.e., a transaction history between transactions) after executing a past transaction, It is possible to provide the corresponding information to the fallback handler 203.

The conflict resolver 207 can resolve conflicts occurring when a transaction is simultaneously performed in the HTM and the STM. The conflict resolver 207 performs transaction detection on the collision and, unlike the existing method of performing serial processing, detects conflicts through a conflict detector based on a bloom filter, the transaction on the HTM and the STM The priority of the transaction on the basis of the priority of the transaction, and the order of processing for the transaction can be determined based on the priority of the transaction.

The retry handler 209 sets an optimal retry threshold for the transactions being processed on the HTM and uses the steep descent method and the momentum to perform an optimal retry according to the workload Threshold can be learned.

The HTM manager 211 is a module for managing the HTM processing of the transaction, and may include a LiteHTM 213 and a BF-HTM 215. [

Lite HTM 213 can manage the processing of transactions according to a basic HTM processing algorithm that is activated when STM is not running at the same time.

The BF-HTM 215 can manage the processing of the transaction in accordance with the HTM processing algorithm that operates when the STM is executed at the same time. The BF-HTM 215 may use a Bloom filter-based impulse detection algorithm to solve the collision problem with the STM. At this time, the BF-HTM 215 may set an optimal Bloom filter value for each workload to maximize the performance of the Bloom filter (i.e., low storage overhead and low false positive) have.

The STM manager 217 is a module for managing the STM process of the transaction. The STM manager 217 has a SpectSTM 219 responsible for basic STM and an sgl lock 221 for processing serial execution.

I) Transaction processing through transaction collision prediction analysis algorithm

A transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention can process a transaction through a transaction collision prediction analysis algorithm.

Specifically, a transactional memory device constructs a matrix for predicting collision between transactions and accumulates metadata for each transaction. A transactional memory device is a memory area that performs a collision prediction for a transaction input from a user based on metrics and meta data for each transaction to ensure the best performance, for example, HTM, STM, and serial execution area Any one can be determined.

Transactional memory devices can support transaction processing independently for each processor and MESI protocol (Modified Exclusive Shared Invalid protocol) can be used for concurrency control between processors. In this case, the shared memory in the transactional memory device can manage the transaction to be assigned to each processor through the transaction list. Through the metadata of the conflict prediction table and the transaction, ≪ RTI ID = 0.0 > TM). ≪ / RTI >

Transactional memory devices can handle transactions through shared memory on multiple cores. At this time, in the shared memory, transactions inputted by the user are allocated through the transaction list. Here, the transaction list includes a transaction ID (Trxid) and a running bit. The transaction ID represents the ID of the transaction, and the ID of the transaction can be generated by the hash value. The running bit is a signature that determines whether the processor of the current transaction is operating in the processor, and provides a quick comparison operation.

Meanwhile, the transactional memory device can generate a predication table as a data structure for determining a best memory area (TM) for a corresponding transaction. At this time, the transactional memory device can generate the prediction table through the information of the transaction that has been performed in the past. Specifically, the transactional memory device can stochastically quantify the collision prediction probability (i.e., collision probability) for each transaction through Equation (1), and include the collision prediction probability as a numerical value in the prediction table .

The types of aborts that can occur for transaction x (first transaction) and transaction y (second transaction) are roughly divided into three types. For example, Abortcon (x, y) means the first number of collisions between two transactions x and y, and Abortcap (x, y) means the capacity abort May be a second number of times that the < RTI ID = 0.0 > Also, Abortattemp (x, y) can refer to the number of retries given to transaction x (or transaction y) for a transaction performed through a retry policy.

The collision prediction probability stored in the predication table can be determined according to the weights of?,?, And? For each of Abortcon (x, y), Abortcap (x, y) and Abortattemp (x, y).

On the other hand, the transactional memory device can determine the memory area TM that exhibits the best performance according to the collision prediction probability (proc) of the prediction table for the transactions x and y. At this time, the transactional memory device can determine the memory area TM showing the best performance based on the algorithm according to the equation (2).

)보다 높을 경우, 직렬실행으로 처리하고, 제1 임계값과 제2 임계값(예컨대, low 임계값) 사이에 존재할 경우 STM으로 처리할 수 있다. 또한, 트랜잭셔널 메모리 장치는 제2 임계값 보다 낮을 경우, HTM으로 처리할 수 있다.That is, the transactional memory device determines whether the collision prediction probability (proc) is greater than a first threshold (e.g., a high threshold,

, It can be processed in serial execution and processed by the STM if it exists between the first threshold and a second threshold (e.g., a low threshold). In addition, if the transactional memory device is lower than the second threshold value, it can be handled by the HTM.

However, since the probability of a collision prediction does not always occur, the transactional memory device can basically perform a transaction processing with a low cost as an HTM, and if a collision occurs Can be processed into a memory area determined according to the collision prediction probability (proc).

When a transactional memory device processes a transaction in HTM, STM, or serial execution in each core, the transaction being executed performs concurrency control through the MESI protocol, and the result of the transaction is stored in transaction metadata and probabilistic collision metrics Can be recorded. At this time, the transaction metadata is a data structure for recording information about all the transactions, for example, as shown in FIG. Information acquired through transactions can be managed separately in each core. To provide efficient collision prediction, transactional memory devices can collect transaction information managed by each core through a single, independent processor. Here, the independent processor performs the role of composing a predication table after merging the transaction data.

Ⅱ) Transaction processing through intelligent HTM retry policy algorithm

Transactional memory devices can process transactions through an intelligent HTM retry policy algorithm. In other words, the transactional memory device is an intelligent retry policy (IRP) on the HTM, and it can learn the number of retries according to the workload and select the optimal number of retries.

The transactional memory device uses the IRP that accumulates the number of past retries of the transaction and calculates the statistical information so that the number of retries that are closer to the optimal one than the existing method that calculates the number of retries based on the transactions processed immediately before Can be calculated.

Specifically, to estimate the optimal number of retries, the transactional memory device may store an optimal retry value of a previously performed transaction in a hash-based data structure. Here, the data structure may have a structure of a transaction ID (Txid) and a number of retries (retry number), and the corresponding data may be updated at the end of a transaction.

The transactional memory device can select the number of retries based on either the average value, the median value or the mode value depending on the characteristics of the data when the number of retries selection algorithm is performed.

- Number of retries based on average value

)를 구할 수 있다.The transactional memory device is a method for selecting the optimum number of retries based on the average value. The sum of the total data is obtained and the average value of the sum is selected as the optimal number of retries. The optimal number of retries based on (

) Can be obtained.

For example, if there is retry count data as shown in [Table 1], the transactional memory can obtain 38/5 = 7.6 ≒ 7 as the optimal retry count based on the average value.

 - Number of retries based on median value

The transactional memory device selects the optimal number of retries based on the median value as the average value may lose its representative value when the number of retries based on the average value is excessively large can do. For example, in the transactional memory device, when selecting the number of retries based on the average value, Tx5 in Table 1 has an excessively large value (for example, 10 or larger) in comparison with other values, If it is judged, the optimal number of retries can be obtained by selecting the number of retries based on the median value.

)를 선정할 수 있다.At this time, the transactional memory device can detect the median based on the statistical information and select the number of retries based on the median value detected. Here, the transactional memory device calculates the optimal number of retries based on the median value (Equation 4)

) Can be selected.

는 모든 트랜잭션의 재시도 횟수를 의미할 수 있다.here,

May refer to the number of retries of all transactions.

For example, the transactional memory device can calculate the median value in Table 1 as (5 + 1) / 2 = 3, so 5 can be selected as the optimal number of retries.

- Number of retries based on statistics

As a result, the transactional memory device can be selected based on the average value or the median value depending on the distribution characteristics of the data, as a method of selecting the number of retries. In this case, the transactional memory device calculates the dispersion and standard deviation in order to grasp the distribution of data, and when the dispersion value is large (when the dispersion value is equal to or larger than the set reference value), it is performed based on the median value, , The optimal number of retries can be selected based on the average value.

)이, 특정 임계값을 초과할 경우, 최적의 재시도 횟수를 갱신할 수 있다.On the other hand, the transactional memory device is a condition for updating the number of retries for optimal time,

) Exceeds the specific threshold value, it is possible to update the optimal number of retries.

는 현재 트랜잭션 및 이전 트랜잭션의 수행 시간 손실율을 나타낸다.Here, clock (Tx) means the number of CPU cycles in which the transaction Tx is performed,

Represents the execution time loss rate of the current transaction and the previous transaction.

On the other hand, when using the IRP, the transactional memory device can perform the retry count algorithm based on the momentum as the deep learning algorithm. At this time, the transactional memory device performs updating by adding a certain ratio of the slope used in the existing update to the current slope value, thereby to solve the problem (i. E., A problem that may occur in calculating the optimal number of retries using the slope descending algorithm The problem is to find the solution in a direction in which the slope is lowered based on the slope calculated from the slope calculated by the above method, but the global minina can not be found and the local minina is found.

In addition, the transactional memory device can calculate the global minimum value, that is, the optimal number of retries, through a momentary-based jump algorithm, by jumping a specific value for values that can not be resolved by momentum.

In order to solve the above problem, first, the transactional memory device can find an arbitrary value (temp) through the expression (6).

The transactional memory device then computes a derivative value next at the local minimum and compares it with the previous derivative value last to determine whether the jump algorithm or momentum You can choose to perform the algorithm. In this case, when the last value is greater than the next value, the transactional memory device uses the momentum technique because the slope value is lowered. When the last value is smaller than the next value, Because the value increases sharply, you can use the jump algorithm to escape the local minimum.

5 is a flowchart illustrating a method of operating a transactional memory device based on inter-transaction conflict prediction according to an embodiment of the present invention.

Referring to FIG. 5, in step 501, the transactional memory device can check whether a first transaction different from the second transaction is being processed, in association with a processing request input for the second transaction.

In step 503, the transactional memory device determines whether the first transaction is being processed, estimating the probability of a conflict between the first and second transactions in the first memory area in which the first transaction is processed .

At this time, the transactional memory device can predict the possibility of collision between the first and second transactions based on the transaction history between transactions. More specifically, the transactional memory device may be configured to, based on a transaction history between transactions, determine, when processing the first transaction and the second transaction in the same memory area, a first number of times a conflict occurs, abort is generated, and the possibility of collision between the first and second transactions can be predicted by using the first number and the second number calculated. In addition, the transactional memory device may further use the number of retries given to the first transaction (or second transaction) to predict the probability of a conflict between the first and second transactions. As a result, the transactional memory device can predict the probability of a conflict between the first and second transactions using at least one of a first number of times, a second number of times, and a number of retries.

In step 505, the transactional memory device may determine a second memory area to process the second transaction, taking into account the potential for conflict. At this time, the transactional memory device determines the second memory area among the plurality of memory areas in consideration of the priority for the plurality of memory areas, and when the possibility of collision is equal to or greater than the set value, The memory area can be determined as the second memory area.

Thereafter, the transactional memory device may process the second transaction in the determined second memory area, taking into account the possibility of the conflict. At this time, if the processing result of the second transaction does not satisfy the predetermined criterion (e.g., when a collision occurs), the transactional memory device counts the number of times, Region, and discards the processing request if the counted number reaches the number of retries given to the second transaction. In other words, when the transactional memory device determines that a conflict has occurred as a result of the processing of the second transaction in the second memory area (e.g., when the second transaction has a conflict with the first transaction, , Counts the number of times (the number of actual retry attempts), and proceeds to reprocess the second transaction. At this time, when the counted number of times matches the preset number of retries in the second transaction, the transactional memory device regards that it is efficient to process the second transaction alone, The processing request can be discarded.

On the other hand, if the processing result of the second transaction in the determined second memory area satisfies a predetermined criterion (for example, if no collision occurs), the transactional memory device stores, 2 You can adjust the number of retries given to a transaction. At this time, the transactional memory device may replace the retry count with the counted number, or may reduce the retry count by the set value.

In addition, the transactional memory device may further comprise: an average value calculation unit for calculating an average value for the number of times counted in each of the plurality of second transactions when the second transaction is a plurality of transactions, The processing request can be discarded. In other words, the transactional memory device can process the arbitrary second transaction, which has performed a relatively large number of reprocessing processes (that is, prediction of the possibility of collision and determination of the second memory area) , It is possible to discard the processing request for the second transaction.

On the other hand, the transactional memory device can automatically re-enter the processing request after the processing of the first transaction is completed after discarding the processing request for the second transaction, and when the processing request is re- And can process the second transaction alone.

The apparatus described above may be implemented as a hardware component, a software component, and / or a combination of hardware components and software components. For example, the apparatus and components described in the embodiments may be implemented within a computer system, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA) A programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to execution of the software. For ease of understanding, the processing apparatus may be described as being used singly, but those skilled in the art will recognize that the processing apparatus may have a plurality of processing elements and / As shown in FIG. For example, the processing unit may comprise a plurality of processors or one processor and one controller. Other processing configurations are also possible, such as a parallel processor.

The software may include a computer program, code, instructions, or a combination of one or more of the foregoing, and may be configured to configure the processing device to operate as desired or to process it collectively or collectively Device can be commanded. The software and / or data may be in the form of any type of machine, component, physical device, virtual equipment, computer storage media, or device , Or may be permanently or temporarily embodied in a transmitted signal wave. The software may be distributed over a networked computer system and stored or executed in a distributed manner. The software and data may be stored in one or more computer readable storage media.

The method according to an embodiment may be implemented in the form of a program instruction that may be executed through various computer means and stored in a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions stored on the medium may be those specially designed and constructed for the embodiments or may be available to those skilled in the art of computer software. Examples of computer-readable storage media include magnetic media such as hard disks, floppy disks and magnetic tape; optical media such as CD-ROMs and DVDs; magneto-optical media such as floppy disks; Includes hardware devices specifically configured to store and execute program instructions such as magneto-optical media and ROM, RAM, flash memory, and the like. Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. For example, it is to be understood that the techniques described may be performed in a different order than the described methods, and / or that components of the described systems, structures, devices, circuits, Lt; / RTI > or equivalents, even if it is replaced or replaced.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

100: Transactional memory device based on conflict prediction between transactions
101: interface 103: processor
105: Database

Claims (10)

An interface for receiving a processing request for a second transaction different from the first transaction while the first transaction is being processed; And
A processor for predicting a conflict possibility between the first and second transactions in a first memory area in which the first transaction is processed and for determining a second memory area to process the second transaction,
Lt; / RTI >
The processor comprising:
Processing the second transaction in the determined second memory area,
If the processing result of the second transaction does not satisfy the predetermined criterion, counts the number of times, then predicts the collision probability and reruns the determination of the second memory area, When the number of times of retries given to the client device 10
Transactional memory device based on conflict prediction between transactions. The method according to claim 1,
Based on the transaction history between transactions,
The processor comprising:
Wherein when the first transaction and the second transaction are processed in the same memory area, a first number of times of occurrence of a collision and a second number of occurrence of a capacity bolt (capacity abort) are calculated, And estimating the possibility of collision using at least one of the second number and the second number
Transactional memory device based on conflict prediction between transactions. delete The method according to claim 1,
The processor comprising:
If the processing result of the second transaction satisfies the predetermined criterion,
And adjusting the number of retries given to the second transaction based on the counted number
Transactional memory device based on conflict prediction between transactions. The method according to claim 1,
If the second transaction is a plurality of transactions,
The processor comprising:
Calculating an average value for the counted number of times of each of the plurality of second transactions,
Discarding the processing request associated with any second transaction counted higher than the average value
Transactional memory device based on conflict prediction between transactions. 6. The method of claim 5,
The interface comprises:
A processing request for the second arbitrary transaction is re-input after completion of processing of the first transaction
Transactional memory device based on conflict prediction between transactions. The method according to claim 1,
The processor comprising:
Determining the second memory area among the plurality of memory areas in consideration of priorities of the plurality of memory areas,
And determining, as the second memory area, a memory area different from the first memory area when the possibility of collision is equal to or larger than a set value
Transactional memory device based on conflict prediction between transactions. Determining whether a first transaction different from the second transaction is being processed, in association with a processing request input for the second transaction;
Predicting a probability of a conflict between the first and second transactions in a first memory area where the first transaction is processed if the first transaction is identified as being being processed;
Determining a second memory area to process the second transaction, taking into account the possibility of conflict;
Processing the second transaction in the determined second memory area; And
If the processing result of the second transaction does not satisfy the predetermined criterion, counts the number of times, then predicts the collision probability and reruns the determination of the second memory area, If the number of retries is reached, discarding the processing request
The method comprising the steps of: (a) determining a conflict prediction method for a transactional memory device; 9. The method of claim 8,
The step of predicting the collision probability comprises:
Based on the transaction history between transactions,
Calculating a first number of times a collision occurs and a second number of times a capacity bolt occurs when the first transaction and the second transaction are processed in the same memory area; And
Estimating the possibility of collision using at least one of the first number and the second number calculated;
The method comprising the steps of: (a) determining a conflict prediction method for a transactional memory device; delete

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