KR101795766B1 - Method for fabricating array substrate for liquid crystal display device of touch panel in cell type and method for the same - Google Patents

Abstract

The present invention relates to an array substrate for a horizontal electric field type liquid crystal display device and a method of manufacturing the same and a method for manufacturing the same. Forming an auxiliary common wiring; Forming a gate insulating film on the entire surface of the substrate including the gate wiring, the common wiring, and the auxiliary common wiring to expose the common wiring; Forming an active layer on the gate insulating film above the gate wiring; A plurality of data lines for defining red (R), green (G), and blue (B) pixel regions are formed on the gate insulating film so as to intersect with the gate wirings, Forming source and drain electrodes and a metal wiring electrically connected to the exposed common wiring; Forming a protective film over the entire surface of the substrate including the data line, the source electrode, the drain electrode, and the metal line and exposing the drain electrode; And forming a plurality of pixel electrodes electrically connected to the drain electrode on the protection layer located in the red (R), green (G), and blue (B) pixel regions, and spaced apart from each other.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an array substrate for a liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an array substrate for a liquid crystal display of a touch panel in cell type and a method of manufacturing the same.

A liquid crystal display displays an image by controlling light transmittance through an electric field in a liquid crystal layer in accordance with a video signal. Such a liquid crystal display device is a flat panel display device having advantages of small size, thinness, and low power consumption, and is used as a portable computer such as a notebook PC, office automation equipment, and audio / video equipment.

Particularly, an active matrix type liquid crystal display device in which a switching element is formed for each liquid crystal cell is advantageous for moving picture because it can actively control the switching element.

A thin film transistor (hereinafter referred to as "TFT") is mainly used as a switching element used in an active matrix type liquid crystal display device.

In addition, the liquid crystal display device is a passive light emitting device, and the brightness of the screen is adjusted by using a backlight generated from the backlight unit disposed on the back surface of the liquid crystal display panel.

In recent years, many technologies for attaching a touch screen panel on such a liquid crystal display device have been proposed, and many products therefor are being released.

Such a touch screen panel generally refers to a user interface that is attached on a display device and detects electrical touch at a touch point where the touch point is contacted with an opaque object such as a finger or a pen to sense the touch point. When a user's finger, touch pen, or the like touches the screen, the liquid crystal display with the touch screen panel detects the contact position information and can implement various applications based on the detected information have.

Meanwhile, the existing capacitive-sensing In Cell Touch technology is a method of detecting the amount of change in capacitance formed between two electrodes existing in a thin film transistor substrate Is required to form an electrode.

Scanning is performed using two common electrodes. In the IPS (In Plane Switching) mode, a common electrode and a pixel electrode are formed on the same plane to form a separate wiring, so that at least two steps There is a disadvantage in that a mask process is added.

Therefore, the array substrate structure for the liquid crystal display device of the conventional in-cell touch type of the horizontal electric field method requires the addition of the third metal wiring for transmitting the common electrode signal, so that the array substrate for a liquid crystal display As shown in Fig.

In this regard, an array substrate structure for an in-cell touch-type liquid crystal display of the horizontal electric field type according to the related art will be described with reference to FIGS. 1 and 2. FIG.

1 is a plan view of an array substrate for a liquid crystal display of an in-cell touch system of a horizontal electric field type according to the related art.

Fig. 2 is a cross-sectional view taken along the line II-II in Fig. 1, and is a cross-sectional view of an array substrate for a liquid crystal display of an in-cell touch system of the horizontal electric field type according to the related art.

As shown in Figs. 1 and 2, a horizontal electric field type in-cell touch type liquid crystal display device according to the related art includes a plurality of gate wirings 13 (not shown) extending in one direction on a lower substrate 11 and spaced apart from each other in parallel And a common wiring 13b; A plurality of data lines 21 intersecting with the gate lines 13 and defining red (R), green (G) and blue (B) pixel regions in the crossing region; A thin film transistor T provided at the intersection of the gate wiring 13 and the data wiring 21 and composed of the gate electrode 13a, the active layer 17, the source electrode 21a and the drain electrode 21b, ; An upper substrate (not shown in FIG. 3H, not shown) having a black matrix layer (not shown) for blocking light from being transmitted to regions excluding the pixel region and a color filter layer (not shown) ); And a liquid crystal layer (see 51 in Fig. 3H, not shown) formed between these substrates.

Here, the gate wiring 13 supplies a scan signal from a gate driver (not shown), and the data wiring 21 supplies a video signal from a data driver (not shown). The gate wiring 13 and the data wiring 21 intersect each other with the gate insulating film 15 therebetween to define respective pixel regions.

The thin film transistor T causes the pixel electrode 19 to be charged with a pixel signal supplied to the data line 21 in response to a scan signal supplied to the gate line 13. The thin film transistor T includes a gate electrode 13a included in the gate line 13, a source electrode 21a connected to the data line 21, A drain electrode 21b connected to the gate electrode 19 and an active layer 17 overlapping the gate electrode 13a with the gate insulating film 15 interposed therebetween and forming a channel between the source electrode 21a and the drain electrode 21b, And an ohmic contact layer (not shown) formed on the active layer 17 except for the channel for ohmic contact with the source electrode 21a and the drain electrode 21b.

The data line 21 is supplied with a pixel signal from a data driver (not shown) through a data pad (not shown).

A transparent pixel electrode 19b is disposed on the front surface of the pixel region and spaced apart from the gate line 13 and the data line 21, A protective film 23 is formed.

Metal wirings 25 are formed on the protective film 23 located in the blue pixel region among the red, green and blue pixel regions in parallel with the data lines 21.

A plurality of common electrodes 29 spaced from each other are formed on the protective film 23 located in the red, green and blue pixel regions. The common electrodes 29 are electrically connected to the common wiring 13b Respectively.

The pixel electrode 19 overlaps the plurality of common electrodes 29 with a protective film 23 interposed therebetween to form a fringe field in each pixel region.

Thus, when a video signal is supplied to the pixel electrode 19 through the thin film transistor T, the common electrodes 29 to which the common voltage is supplied form a fringe field so that the thin film transistor substrate and the color filter substrate (not shown) The liquid crystal molecules arranged in the horizontal direction are rotated by the dielectric anisotropy. The light transmittance of the liquid crystal molecules passing through the pixel region changes according to the degree of rotation, thereby realizing the gradation.

A method of fabricating an array substrate for an in-cell touch-type liquid crystal display according to the related art having the above-described structure will be described with reference to FIGS. 3A to 3H.

3A to 3H are cross-sectional views illustrating manufacturing steps of an array substrate for an in-cell touch-type liquid crystal display according to the related art.

3A, a plurality of pixel regions including a switching region are defined on a transparent lower substrate 11, a first conductive metal layer (not shown) is deposited on the transparent substrate 11, This is selectively patterned through a first mask process to form a gate wiring 13 and a gate electrode 13a extended from the gate wiring 13 and a common wiring 13b spaced apart in parallel with the gate wiring 13 At the same time.

Then, as shown in FIG. 3B, an amorphous silicon layer (not shown) is deposited on the gate insulating layer 15 after depositing a gate insulating layer 15 on the entire surface of the lower substrate.

Then, the amorphous silicon layer (not shown) is selectively patterned through a second mask process to form an active layer 17 on the gate electrode 13a.

Then, as shown in FIG. 3C, a transparent conductive material layer (not shown) is deposited on the entire surface of the substrate including the active layer 17 and then selectively patterned through a third mask process to form the gate insulating film The pixel electrodes 19 are formed.

Next, as shown in FIG. 3D, a second conductive layer (not shown) is deposited on the entire surface of the substrate including the pixel electrode 19 and the active layer 17, and the second conductive layer is selectively patterned through a fourth mask process A source electrode 21a and a drain electrode 21b spaced apart from each other by a channel region are formed on the active layer 17 together with the data line 21 crossing perpendicularly to the gate line 13. [ The pixel electrode 19 is directly connected to the drain electrode 21b and is connected to the pixel region formed by the gate line 13 and the data line 21, that is, red (R), green (G) (B) pixel region.

3E, a protective film 23 is deposited on the entire surface of the substrate including the source electrode 21a and the drain electrode 21b, and then the protective film 23 and the protective film 23 are removed through a fifth mask process. And a common wiring contact hole (not shown in FIG. 1, 24) for exposing the common wiring 13b located in the blue pixel region is selectively formed by selectively patterning the gate insulating film 15 on the lower side.

 Next, as shown in FIG. 3F, a third conductive layer (not shown) is deposited on the protective film 23 including the common wiring contact hole 24, and then the third conductive layer And a metal wiring 25 parallel to the data wiring 21 is formed on the protective film 23 located in the blue pixel region. At this time, the metal wiring 25 is used for touch sensing in an in-cell touch type touch panel.

Next, as shown in FIG. 3G, a second transparent conductive material layer (not shown) is deposited on the entire surface of the substrate including the metal wiring 25, and then the second transparent conductive material layer (Not shown) are selectively patterned to form a plurality of common electrodes 29 spaced from each other. At this time, the plurality of common electrodes 29 are electrically connected to the common wiring 13b through the common wiring contact hole 24.

Next, as shown in FIG. 3H, an upper substrate 41 is prepared, and a black matrix (not shown) is formed in the boundary region of each pixel region so as to prevent light from being transmitted to regions other than the pixel region, And a color filter layer 45 is formed between the black matrix layers 43. In this case,

A liquid crystal layer 51 is formed between the upper substrate 41 and the lower substrate 11 and then a cover glass 61 is attached on the upper substrate 41 to form an in- Thereby completing display device manufacturing.

However, according to the related art, when a touching line is brought into contact with another signal line of a liquid crystal display device at the time of implementing an in-cell touch, a malfunction is caused which causes a malfunction.

As a result, metal wirings are formed in the middle of the two-layer insulating film, so that a common wiring contact hole and wiring formation process are required.

At least seven mask processes are applied to form a separate sensing line (i.e., a metal line) at the time of forming the wiring for touch sensing according to the existing process order. This is because the development cost due to the increase in the number of masks for patterning and Which leads to an increase in material cost.

Therefore, the prior art technology is a factor that causes an increase in the time required for the process and an increase in the equipment investment cost due to the increase in the number of mask processes, and causes a problem that the frequency of defect occurrence increases due to an increase in the process step, It comes.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is an object of the present invention to provide a process for minimizing equipment investment cost and development cost by reducing the number of manufacturing masks of an array substrate of a horizontal electric field type liquid crystal display device for an in- And a method for manufacturing the array substrate of a horizontal electric field type liquid crystal display device for an in-cell touch panel.

According to an aspect of the present invention, there is provided an array substrate of a horizontal electric field type liquid crystal display device for an in-cell touch panel, comprising: a plurality of gate wirings extending in one direction on a substrate, An auxiliary common wiring formed on the substrate; A gate insulating film formed on the entire surface of the substrate and exposing the common wiring; An active layer formed on the gate insulating film above the gate line; A plurality of data lines for defining red (R), green (G), and blue (B) pixel regions in an area intersecting with the gate wiring, source electrodes and drain electrodes spaced apart by a channel region of the active layer, A metal wiring electrically connected to the electrode and the common wiring and arranged in parallel with the data wiring; The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. And electrodes.

According to another aspect of the present invention, there is provided a method of fabricating an array substrate of a horizontal electric field type liquid crystal display device for an in-cell touch panel, including a plurality of gate wirings and common wirings extending in one direction, Forming an auxiliary common wiring on the common wiring; Forming a gate insulating film on the entire surface of the substrate including the gate wiring, the common wiring, and the auxiliary common wiring to expose the common wiring; Forming an active layer on the gate insulating film over the gate wiring; A plurality of data lines for defining red (R), green (G), and blue (B) pixel regions are formed on the gate insulating film so as to intersect with the gate wirings, Forming source and drain electrodes and a metal wiring electrically connected to the exposed common wiring; Forming a protective film over the entire surface of the substrate including the data line, the source electrode, the drain electrode and the metal line and exposing the drain electrode; And forming a plurality of pixel electrodes spaced apart from each other on the protective film located in the red (R), green (G), and blue (B) pixel regions.

According to the array substrate of the horizontal electric field type liquid crystal display device for the in-cell touch panel and the method of manufacturing the same according to the present invention, in the process of fabricating the array substrate of the horizontal electric field type, The additional process for forming the insole touch sensor can be omitted, and the existing process can be applied as it is without any separate process development.

Therefore, according to the array substrate of the horizontal electric field type liquid crystal display device for the in-cell touch panel according to the present invention and the manufacturing method thereof, the in-cell touch structure can be realized by only 5 mask processes compared to the existing 7 mask process, It is possible to form a simple structure that is unnecessary, thereby shortening the process time and securing high process stability.

Furthermore, by using a common wiring contact hole formed in the gate insulating film, it is possible to realize a structure in which a common wiring is provided on the same line as the data wiring, thereby holding an electric field between the data wiring and preventing cross talk, The aperture ratio can be increased by minimizing the allignment margin of the filter.

1 is a plan view of an array substrate for a liquid crystal display of an in-cell touch system of a horizontal electric field type according to the related art.
Fig. 2 is a cross-sectional view taken along the line II-II in Fig. 1, and is a cross-sectional view of an array substrate for a liquid crystal display of an in-cell touch system of the horizontal electric field type according to the related art.
3A to 3H are cross-sectional views illustrating manufacturing steps of an array substrate for an in-cell touch-type liquid crystal display according to the related art.
4 is a plan view of an array substrate for an in-line touch type liquid crystal display of the horizontal electric field type according to the present invention.
5 is a cross-sectional view taken along the line V-V in FIG. 4, and is a cross-sectional view of an array substrate for a liquid crystal display of the in-cell touch system of the horizontal electric field type according to the present invention.
6A to 6U are cross-sectional views illustrating manufacturing steps of an array substrate for an in-cell touch-type liquid crystal display according to the present invention.

Hereinafter, an array substrate for an in-cell touch-type liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view of an array substrate for an in-line touch type liquid crystal display of the horizontal electric field type according to the present invention.

5 is a cross-sectional view taken along the line V-V in FIG. 4, and is a cross-sectional view of an array substrate for a liquid crystal display of the in-cell touch system of the horizontal electric field type according to the present invention.

4 and 5, the array substrate for a horizontal electric field in-cell touch type liquid crystal display according to the present invention includes a plurality of gate wirings (106), a common wiring (103b) and an auxiliary common wiring (105b) formed on the common wiring (103b); A gate insulating film 111 formed on the entire surface of the substrate and exposing the common wiring 103b; An active layer 113a formed on the gate insulating film 111 above the gate wiring 106; A plurality of data lines 119a defining red (R), green (G) and blue (B) pixel regions in an area intersecting with the gate wiring 106 and a plurality of data lines 119a defining a channel region of the active layer 113a A source electrode 119b and a drain electrode 119c spaced apart from each other and a metal wiring 119d electrically connected to the common wiring 103b and arranged in parallel with the data wiring 119a; The gate wiring 106 and the data wiring 119a intersect with each other with a protective film 123 interposed therebetween in the red (R), green (G), and blue (B) pixel regions, And a plurality of pixel electrodes 129a electrically connected to the electrodes 119c.

Here, the gate wiring 106 supplies a scan signal from a gate driver (not shown), and the data wiring 119a supplies a video signal from a data driver (not shown). The gate wiring 106 and the data wiring 119a intersect each other with the gate insulating film 111 therebetween to define respective pixel regions.

The gate wiring 106 is formed in at least a double-layer structure or a single-layer structure including a transparent conductive layer on the lower substrate 101. For example, a multilayer structure in which a first conductive layer using a transparent conductive layer and a second conductive layer using an opaque metal are laminated, or a single-layer structure using an opaque metal.

At this time, ITO, IZO or ITZO is used as the first conductive layer, and Cu, Mo, Al, Cu alloy, Mo alloy, Al alloy or the like is used as the second conductive layer.

The thin film transistor T causes the pixel electrode 129a to be charged with the pixel signal supplied to the data line 119a in the scan signal supplied to the gate line 106. [ The thin film transistor T includes a gate electrode 111 included in the gate wiring 106, a source electrode 119b connected to the data line 119a, A drain electrode 119c connected to the gate electrode 129a and an active layer 113a overlapping the gate electrode 106 with the gate insulating film 111 therebetween and forming a channel between the source electrode 119b and the drain electrode 119c, And an ohmic contact layer (not shown) formed on the active layer 113a except the channel for ohmic contact with the source electrode 119b and the drain electrode 119c.

The data line 119a is supplied with a pixel signal from a data driver (not shown) through a data pad (not shown).

A transparent common wiring 103b is formed on the front surface of the pixel region with a space separated from the gate wiring 106 and the data wiring 119a. On the common wiring 103b, The auxiliary common wiring 105b is formed in parallel with the gate wiring 106 which is formed on the substrate.

Among the plurality of pixel regions, a metal wiring 119d is formed in the blue (B) pixel region in parallel with the data wiring 119a at the time of forming the data wiring 119a. And is electrically connected to the common wiring 103b under it.

In addition, a plurality of rod-shaped transparent pixel electrodes 129a are formed on the protective film 123 located in the plurality of pixel regions, and the pixel electrodes 129a are electrically connected to the drain electrode 119c .

Therefore, the common wiring 103b and the auxiliary common wiring 105b supply a reference voltage for driving the liquid crystal, that is, a common electrode to each pixel. At this time, the common wiring 103b is formed of a transparent conductive material layer, and the auxiliary common wiring 103b is formed by stacking a transparent conductive material layer and an opaque metal layer like the gate wiring 106. [

The plurality of pixel electrodes 129a overlap the lower common line 103b with a protective film 123 interposed therebetween in each pixel region to form a fringe field.

When a video signal is supplied to the pixel electrode 129a through the thin film transistor T in this way, the common wiring 103b to which the common voltage is supplied forms a fringe field, and is connected between the thin film transistor substrate and the color filter substrate The liquid crystal molecules arranged in the horizontal direction are rotated by the dielectric anisotropy. The light transmittance of the liquid crystal molecules passing through the pixel region changes according to the degree of rotation, thereby realizing the gradation.

A method of fabricating an array substrate for an in-cell touch-type liquid crystal display according to the present invention will now be described with reference to FIGS. 6A to 6U.

6A to 6U are cross-sectional views illustrating manufacturing steps of an array substrate for an in-cell touch-type liquid crystal display according to the present invention.

6A, a non-pixel region is defined along with a plurality of pixel regions including a switching region on a transparent substrate 101, a first transparent conductive material layer 103 is formed on the transparent substrate 101, And the first conductive metal layer 105 are sequentially deposited by a sputtering method. At this time, the first transparent conductive material layer 103 may be any one selected from transparent conductive material groups including indium tin oxide (ITO) and indium zinc oxide (IZO).

The first conductive metal layer 105 may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), molybdenum alloy, (Nd) / Cr, Mo / Al (Nd) / Mo, Cu / Mo, Ti / Al (Nd) / Ti, Mo / Al, Mo alloy / Al alloy, Mo / Al alloy, Cu / Mo alloy, Cu / Mo (Ti)

Then, as shown in FIG. 6B, a photo-resist having a high transmittance is applied on the first conductive metal layer 105 to form a first photoresist 107.

Subsequently, the first photoresist layer 107 is exposed using the first diffraction mask 109 including the light intercepting portion 109a, the transflective portion 109b and the transmissive portion 109c. At this time, the light shielding portion 109a of the first diffraction mask 109 is located on the first photoresist layer 107 corresponding to the gate wiring formation region including the gate electrode and the auxiliary common wiring formation region, The transflective portion 109b of the diffraction mask 109 is located above the first photoresist 107 corresponding to the common wiring formation area. Further, in addition to the first diffraction mask 109, a mask using a light diffraction effect, for example, a half-tone mask or another mask may be used.

 Then, as shown in FIG. 6C, the first photoresist layer 107 is patterned through the exposure process and then the developing process to form a first pattern 107a of the gate wiring formation area and the auxiliary wiring, And the second pattern 107b of the forming region. At this time, the first pattern 107a of the gate wiring formation area and the auxiliary common wiring formation area maintains the thickness of the first photoresist film 107 because the light is not transmitted through the first pattern 107a. However, A part of the light is transmitted through the pattern 107b and removed by a predetermined thickness. That is, the second pattern 107b of the common wiring formation region has a thickness thinner than the first pattern 107a of the gate wiring formation region and the auxiliary common wiring formation region.

6D, using the first pattern 107a of the gate wiring formation area and the auxiliary common wiring formation area of the first photosensitive film and the second pattern 107b of the common wiring formation area as masks, 1) conductive metal layer 105 and the first transparent conductive material layer 103 are patterned to form a gate wiring 106 (not shown in FIG. 4), a gate electrode 106a protruded from the gate wiring 106, 103b are simultaneously formed. At this time, the gate wiring (not shown in FIG. 4) and the gate electrode 106a are formed of the first conductive metal layer pattern 105a and the first transparent conductive material layer pattern 103a. 4, the common wiring 103b is formed in a space formed by crossing the entire surface of the pixel region, that is, the gate wiring 106 and the data wiring (not shown, see 119a in FIG. 4) do.

6E, a part of the thickness of the gate electrode 106a and the first pattern 107a on the auxiliary common wiring formation area and a part of the thickness of the common wiring 103b on the common wiring 103b are removed through an ashing process, The entire second pattern 107b on the second conductive metal layer pattern 105b is etched to completely remove the second pattern 107b. At this time, the second conductive metal layer pattern 105b on the common wiring 103b is exposed to the outside.

Then, as shown in FIG. 6F, the gate electrode 106a partially etched in the ashing process and the first pattern 107a on the auxiliary common wiring formation region are shielded by the barrier layer to expose the exposed second conductive metal layer pattern The auxiliary wiring 105b is selectively removed to form the auxiliary common wiring 105b on the common wiring 103b and the common wiring 103b is exposed and then the remaining first pattern 107a is removed , An auxiliary common wiring 105b is formed on the common wiring 103b. At this time, the common wiring 103b is formed of a layer of a transparent conductive material, and the auxiliary common wiring 105b is formed of a layer of opaque conductive metal material.

6G, a gate insulating film 111 made of silicon nitride (SiNx) or silicon oxide film (SiO ₂ ) is formed on the entire surface of the substrate, and then an amorphous silicon layer (a-Si: H) 113 is deposited. At this time, the amorphous silicon layer (a-Si: H) 113 may be formed by a chemical vapor deposition (CVD) method or another deposition method.

Then, a photo-resist having a high transmittance is coated on the amorphous silicon layer 113 to form a second photoresist layer 115.

The second photoresist layer 115 is then subjected to an exposure process using a second diffraction mask 116 including a light intercepting portion 116a, a transflective portion 116b, and a transmissive portion 116c. At this time, the light shielding portion 116a of the second diffraction mask 116 is located above the second photoresist 115 corresponding to the region overlapping the gate electrode, The first wiring 116b is located on the second photoresist 115 corresponding to the source electrode and the drain electrode forming region, the data wiring forming region and the pixel region of the thin film transistor T and the transmitting portion 116c is located on the common wiring contact hole 116b. And is located above the second photoresist film 115 corresponding to the formation region. At this time, in addition to the second diffraction mask 116, a mask using a light diffraction effect, for example, a half-tone mask or another mask may be used.

6H, a development process is performed after the exposure process, and then the second photoresist film 115 is selectively patterned to form a first pattern 115a in the active layer formation region, and the thin film transistor The second pattern 115b is formed in the region corresponding to the source electrode and the drain electrode formation region, the data wiring formation region, and the pixel region of the TFTs T. At this time, the first pattern 115a of the active layer formation region maintains the second photoresist film thickness because the first pattern 115a does not transmit light, but the source electrode and the drain electrode formation region of the thin film transistor T, The second pattern 115b corresponding to the region and the pixel region is partially removed by the thickness of the second photoresist layer. That is, the second pattern 115b of the region corresponding to the source electrode and the drain electrode forming region, the data wiring forming region and the pixel region of the thin film transistor T is thinner than the first pattern 115a of the active layer forming region .

6I, the amorphous silicon layer 113 is selectively patterned using the first pattern 115a and the second pattern 115b as masks to form a second wiring pattern 115a located in the common wiring contact hole formation region The amorphous silicon layer 113 is removed. At this time, the portion of the gate insulating film 111 under the removed amorphous silicon layer 113 is exposed to the outside.

6J, an ashing process is performed to form a source electrode and a drain electrode forming region of the thin film transistor T together with a part of the thickness of the first pattern 115a in the active layer forming region, The second pattern 115b corresponding to the data wiring formation region and the pixel region is completely removed to expose the amorphous silicon layer 113 of the removed second pattern 115b to the outside.

6K, the remaining first pattern 115a is selectively removed together with the amorphous silicon layer 113 exposed as a blocking layer to selectively remove the gate insulating layer 111 and the active layer 113a together with the active layer 113a. And a common wiring contact hole 117 for exposing the common wiring 103b are simultaneously formed. At this time, the common wiring contact hole 117 is formed in the gate insulating film 111 located in the blue (B) pixel region out of the plurality of pixel regions.

Next, as shown in FIG. 61, a second conductive metal layer 119 is deposited on the gate insulating film 111 including the active layer 113 and the common wiring contact hole 117 by a sputtering method, The third photoresist film 121 having excellent transparency is applied. At this time, the second conductive metal layer 119 may be formed of a metal such as aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), molybdenum alloy, (Nd) / Cr, Mo / Al (Nd) / Mo, Cu / Mo, Ti / Al (Nd) / Ti, Mo / Al, Mo alloy / Al alloy, Mo / Al alloy, Cu / Mo alloy, Cu / Mo (Ti)

Subsequently, the third photoresist layer 121 is subjected to an exposure process using a third mask (not shown).

Then, as shown in FIG. 6M, the development process is performed after the exposure process, and then the third photoresist layer 121 is selectively patterned to form a data wiring formation region, a source electrode and a drain electrode formation region, That is, the third photoresist pattern 121a remaining only in the region where the touch sensing line is formed is formed.

6N, the second conductive metal layer 119 may be selectively patterned using the third photoresist pattern 121a as a mask to form data lines (not shown) intersecting the gate wirings 106 to form pixel regions 119a and the source electrode 119b and the drain electrode 119c spaced apart from each other with the active layer 113a interposed therebetween and electrically connected to the common wiring 103b through the common wiring contact hole 117 A metal wiring, that is, a touch sensing wiring 119d is formed. At this time, the touch sensing wiring 119d is located in the blue (B) pixel region among the plurality of pixel regions, and is disposed in parallel with the data line 119a.

6O, the remaining third photoresist pattern 121a is removed, and then the data line 119a, the source electrode 119b, the drain electrode 119c, and the touch sensing line 119d are removed, A protective film 123 made of silicon nitride (SiNx) or a silicon oxide film (SiO ₂ ) is formed on the entire surface of the substrate.

Then, a photo-resist having a high transmittance is applied on the protective film 123 to form a fourth photoresist film 125.

6P, the fourth photosensitive film 125 is exposed and developed through a photolithography process technique using a fourth mask (not shown), and then selectively patterned to expose the fourth photosensitive film pattern 125a, .

Then, as shown in FIG. 6Q, the protective film 123 is selectively removed using the fourth photoresist pattern 125a as a mask to form a drain electrode contact hole 127 exposing the drain electrode 119c do.

6R, the fourth photoresist pattern 125a is removed, and a second transparent conductive material layer 129 is deposited on the protective layer 123 including the drain electrode contact hole 127. Then, as shown in FIG. The fifth photoresist layer 131 is coated on the second transparent conductive material layer 129.

Then, as shown in FIG. 6S, the fifth photoresist layer 131 is exposed and developed through a photolithography process technique using a fifth mask (not shown), and then selectively patterned to form a fifth photoresist pattern 131a ).

6T, the second transparent conductive material layer 129 is selectively patterned using the fifth photoresist pattern 131a as a mask to form a plurality of pixel electrodes 129a spaced apart from each other. At this time, the plurality of pixel electrodes 129a overlap with the common wiring 103b at the lower end.

Thereafter, as shown in FIG. 6U, the color filter substrate 41 is prepared, and the boundary of each pixel region is formed on the color filter substrate 141 in order to block the light from being transmitted to regions except for the pixel region A red (R), a green (G), and a blue (B) color filter layer 145 are formed between the black matrix layer 143 and the black matrix layer 143.

An overcoat layer (not shown) is then formed on the entire surface of the color filter substrate including the red (R), green (G), and blue (B) color filter layers 145 for planarization.

Subsequently, a liquid crystal layer 151 is formed between the color filter substrate 141 and the substrate 101, and then a cover glass 161 is attached on the color filter substrate 141, Thereby completing display device manufacturing.

As described above, according to the array substrate of the horizontal electric field type liquid crystal display device for the in-cell touch panel according to the present invention and the manufacturing method thereof, when the source electrode and the drain electrode are formed in the horizontal electric field type array substrate manufacturing process, ) Can be formed at the same time, thereby eliminating the additional insulating film and the wiring forming step. Thus, the additional process for forming the in-line touch sensor can be omitted, and the existing process can be applied without any additional process development .

Therefore, according to the array substrate of the horizontal electric field type liquid crystal display device for the in-cell touch panel according to the present invention and the manufacturing method thereof, the in-cell touch structure can be realized by only 5 mask processes compared to the existing 7 mask process, It is possible to form a simple structure that is unnecessary, thereby shortening the process time and securing high process stability.

Furthermore, by using a common wiring contact hole formed in the gate insulating film, it is possible to realize a structure in which a common wiring is provided on the same line as the data wiring, thereby holding an electric field between the data wiring and preventing cross talk, The aperture ratio can be increased by minimizing the allignment margin of the filter.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments.

Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention defined in the following claims are also within the scope of the present invention.

101: Substrate 103: First transparent conductive material layer
103b: common wiring 105: first conductive metal layer
105b: auxiliary common wiring 106: gate wiring
106a: gate electrode 107: first photoresist film
107a: first photoresist pattern 109: first diffraction mask
111: gate insulating film 113: amorphous silicon layer
113a: active layer 115: second photoresist film
116: second diffraction mask 117: common wiring contact hole
119: second conductive metal layer 119a: data wiring
119b: source electrode 119c: drain electrode
119d: metal wiring 121: third photoresist film
121a: third photoresist pattern 123: protective film
125: fourth photoresist film 127: drain electrode contact hole
129: second transparent conductive material layer 129a: pixel electrode
131: fifth photosensitive film 141: color filter substrate
143: Black matrix layer 145: Color filter layer
151: liquid crystal layer 161: cover glass

Claims (11)

A plurality of gate wirings extending in one direction on the substrate and spaced apart from each other in parallel, common wirings, auxiliary common wirings formed on the common wirings and connected to the common wirings;
A gate insulating film formed on the entire surface of the substrate and exposing the common wiring;
An active layer formed on the gate insulating film above the gate wiring;
A plurality of data lines for defining red (R), green (G), and blue (B) pixel regions in an area intersecting with the gate wiring, a source electrode and a drain electrode spaced by a channel region of the active layer, And a metal wiring electrically connected to the common wiring and arranged in parallel with the data wiring; And
The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. The gate line and the data line intersect with each other. Electrodes,
And the metal wiring overlaps with the pixel electrode. The liquid crystal display device according to claim 1, wherein the metal wiring is electrically connected to a common wiring located in a blue (B) pixel region out of the red (R), green (G), and blue An array substrate for a liquid crystal display device. The array substrate according to claim 1, wherein the metal interconnection is formed of the same material as the data interconnection and is formed on the same layer. The array substrate for a horizontal electric field type liquid crystal display device according to claim 1, wherein the metal wiring is used as a touch sensing wiring in an incelel touch panel using a horizontal electric field type. Forming an auxiliary common wiring formed on the common wiring and connected to the common wiring together with a plurality of gate wirings and a common wiring extending in one direction on the substrate and spaced apart from each other in parallel;
Forming a gate insulating film over the entire surface of the substrate including the gate wiring, the common wiring, and the auxiliary common wiring to expose a part of the common wiring;
Forming an active layer on the gate insulating film above the gate wiring;
A plurality of data lines for defining red (R), green (G), and blue (B) pixel regions are formed on the gate insulating film so as to intersect with the gate wirings, Forming source and drain electrodes and a metal wiring electrically connected to the exposed common wiring;
Forming a protective film over the entire surface of the substrate including the data line, the source electrode, the drain electrode, and the metal line and exposing the drain electrode; And
And forming a plurality of pixel electrodes electrically connected to the drain electrode on the protective film located in the red (R), green (G), and blue (B) pixel regions,
The metal wiring overlaps with the pixel electrode,
Wherein the active layer is formed through a mask process using a diffraction mask and a common wiring contact hole exposing a part of the common wiring is formed in the gate insulating film during the mask process. The organic electroluminescent device according to claim 5, wherein the metal wiring is electrically connected to a common wiring located in a blue (B) pixel region of the red (R), green (G), and blue A method of manufacturing an array substrate for a liquid crystal display device. 6. The method of claim 5, wherein the metal interconnection is formed of the same material as the data interconnection and is formed on the same layer. 6. The method of claim 5, wherein the metal wiring is used as a touch sensing wiring in an in-cell touch panel using a horizontal electric field type. The method of manufacturing an array substrate for a horizontal electric field type liquid crystal display according to claim 5, wherein the metal interconnection is formed simultaneously with the data line, the source electrode, and the drain electrode. The method of manufacturing an array substrate for a horizontal electric field type liquid crystal display according to claim 5, wherein the step of forming the gate wiring, the common wiring, and the auxiliary common wiring is performed through a mask process using a diffraction mask. delete

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