KR101752425B1 - Light emitting diode chip having wavelength converting layer, method of fabricating the same and package having the same - Google Patents

Light emitting diode chip having wavelength converting layer, method of fabricating the same and package having the same Download PDF

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KR101752425B1
KR101752425B1 KR1020100115082A KR20100115082A KR101752425B1 KR 101752425 B1 KR101752425 B1 KR 101752425B1 KR 1020100115082 A KR1020100115082 A KR 1020100115082A KR 20100115082 A KR20100115082 A KR 20100115082A KR 101752425 B1 KR101752425 B1 KR 101752425B1
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South Korea
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wavelength conversion
layer
conversion layer
opening
substrate
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KR1020100115082A
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KR20120053784A (en
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손정훈
김방현
정정화
권석순
김정두
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서울반도체 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

A light emitting diode chip having a wavelength conversion layer, a method of manufacturing the same, and a package having the same. According to one aspect of the present invention, there is provided a light emitting diode chip comprising: a substrate having a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface; A semiconductor laminated structure including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; An electrode electrically connected to the semiconductor laminated structure; And a wavelength conversion layer covering an upper portion of the semiconductor laminated structure, the wavelength conversion layer having an opening exposing the electrode. Further, the opening has an inner wall inclined with respect to the upper surface of the substrate. Thus, light can be prevented from being emitted to the outside without wavelength conversion at the periphery of the electrode.

Description

TECHNICAL FIELD [0001] The present invention relates to a light emitting diode chip having a wavelength conversion layer, a method of manufacturing the same, and a package having the same. [0001] The present invention relates to a light emitting diode chip having a wavelength conversion layer,

The present invention relates to a light emitting diode chip, a method of manufacturing the same, and a package having the same. More particularly, the present invention relates to a light emitting diode chip having a wavelength conversion layer, a method of manufacturing the same, and a package having the same.

Currently, light emitting diodes are used as backlight sources for various display devices such as mobile phones due to their ability to reduce size and weight and to save energy and to maintain the lifetime for a long period of time. A light emitting device, that is, a light emitting diode package It is expected to be applied to general lighting instead of a white light source such as a fluorescent lamp because white light having a high color rendering property can be realized.

Meanwhile, there are various methods for realizing white light using a light emitting diode. In general, a method of realizing white light by combining an InGaN light emitting diode emitting blue light of 430 nm to 470 nm and a phosphor capable of converting blue light into a long wavelength is used have. For example, the white light may be realized by a combination of a blue light emitting diode and a yellow phosphor excited by the blue light emitting diode to emit yellow light, or a combination of a blue light emitting diode, a green phosphor and a red phosphor.

Conventionally, a white light emitting element has been formed by applying a resin containing a phosphor in a recessed region of a package in which a light emitting diode is mounted. However, when the resin is applied to the package, the phosphor is not uniformly distributed in the resin, and it is difficult to form the resin to a uniform thickness.

Accordingly, a method of attaching a wavelength conversion sheet on a light emitting diode has been studied. The wavelength conversion sheet can be formed by mixing a phosphor, for example, with glass. By attaching such a wavelength conversion sheet to the upper surface of the light emitting diode, white light can be realized at a chip level.

However, since the wavelength conversion sheet is attached to the upper surface of the light emitting diode, it is limited to realize white light in a light emitting diode having a structure in which light is mainly emitted to the upper surface of the light emitting diode. In a light emitting diode having a structure in which a considerable amount of light is emitted from a side surface of a light emitting diode, for example, a side surface of a growth substrate, wavelength conversion using a wavelength conversion sheet is not suitable.

On the other hand, when a resin containing a phosphor is applied to the package, the resin can be applied after bonding wires to the light emitting diode. Therefore, even if the electrode of the light emitting diode is covered with a resin containing a phosphor, it is not a problem. However, when forming the wavelength conversion layer at the chip level, it is required to bond the wire to the light emitting diode after the wavelength conversion layer is formed. Therefore, an opening for exposing the electrode of the light emitting diode must be formed in the wavelength conversion layer.

The wire bonding is performed in a package manufacturing process. Generally, a capillary for supplying a gold wire is used to form a wire ball on an electrode of a light emitting diode, a capillary is moved to pull out a wire from the capillary, And the like to a lead terminal. However, since the width of the capillary is generally relatively larger than that of the electrode of the light emitting diode, it is necessary that a relatively wide opening is formed in the wavelength conversion layer to accommodate the capillary. Furthermore, the width of the opening is formed to allow for misalignment of the wire ball and the capillary relative to the electrode, so that the width of the opening is generally larger than the width of the electrode. Accordingly, the light emitted around the electrode is directly emitted to the outside without wavelength conversion, so that a blue ring is formed around the electrode. The electrode may be relatively wide to remove the blue ring, but it is undesirable because the electrode absorbs light and lowers light extraction efficiency.

In order to facilitate wire bonding, a technique of forming an additional electrode using a bump ball or the like on the electrode may be considered. In this case, an additional electrode is first formed on the electrode using a bump ball or the like, the wavelength conversion layer is formed to be relatively thick, and then the wavelength conversion layer is removed by grinding or polishing to expose the upper surface of the additional electrode have. However, this technique incurs an additional cost due to the formation of the bump balls, causes material loss of the wavelength conversion layer due to removal of a part of the wavelength conversion layer by grinding or polishing, and does not uniformly form the bump balls, Bad bonding may result.

On the other hand, a part of the light converted in the wavelength conversion layer, such as a long wavelength visible light, is again incident into the light emitting diode. The light incident into the light emitting diode may be absorbed by the semiconductor layers inside the light emitting diode, the substrate, or the lead terminal mounted with the light emitting diode. Therefore, it is necessary to prevent the light converted in the wavelength conversion layer from being incident into the light emitting diode and being lost.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a wavelength conversion layer capable of easily bonding a wire without increasing the electrode size without forming an additional electrode and preventing a blue ring from being generated around the electrode Emitting diode chip and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting diode chip capable of performing light conversion such as wavelength conversion on light emitted through a side surface of a substrate and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting diode chip capable of preventing the light converted in the wavelength conversion layer from being incident on the light emitting diode chip and being lost again.

According to one aspect of the present invention, there is provided a light emitting diode chip comprising: a substrate having a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface; A semiconductor laminated structure including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; An electrode electrically connected to the semiconductor laminated structure; And a wavelength conversion layer covering an upper portion of the semiconductor laminated structure, the wavelength conversion layer having an opening exposing the electrode. Further, the opening has an inner wall inclined with respect to the upper surface of the substrate.

In addition, the entrance of the opening located on the surface of the wavelength conversion layer has a relatively wide width as compared with the bottom of the opening, and the bottom of the opening may be located on the electrode region.

Since the opening portion formed in the wavelength conversion layer is inclined, the capillary having a relatively wide width can be accommodated. Further, since the wavelength conversion layer covers the region around the electrode, the light emitted from the semiconductor laminated structure to the periphery of the electrode is converted into wavelength- Lt; / RTI >

The opening of the opening may have a relatively wide width as compared with the electrode region. Furthermore, the width of the opening may be relatively narrow as compared with the electrode region at a half of the thickness of the wavelength conversion layer. Accordingly, the light emitted around the electrode can be emitted to the outside through at least a half or more of the thickness of the wavelength conversion layer, so that sufficient wavelength conversion can be performed.

In addition, the inclination angle of the inner wall of the opening can be adjusted in consideration of the shape of the capillary and the relative position of the capillary relative to the electrode.

Furthermore, the wavelength conversion layer may cover the side surface of the semiconductor multilayer structure and the side surface of the substrate. Since the wavelength conversion layer covers the side surface of the substrate, the wavelength conversion can be performed on the light emitted through the side surface of the substrate.

On the other hand, the wavelength conversion layer may have a substantially uniform thickness, and the upper surface of the wavelength conversion layer may be flat. The wavelength conversion layer located on the side surface of the substrate may have substantially the same thickness as the wavelength conversion layer located on the semiconductor multilayer structure.

In some embodiments, the light emitting diode chip may further include a distributed Bragg reflector interposed between the wavelength conversion layer and the semiconductor laminated structure. Furthermore, the light emitting diode chip may further include a stress relieving layer interposed between the distributed Bragg reflector and the semiconductor laminated structure.

The distributed Bragg reflector may be formed by alternately laminating insulating layers having different refractive indices such as SiO 2 / TiO 2 or SiO 2 / Nb 2 O 5 . The distributed Bragg reflector may be formed to transmit the light generated in the active layer by adjusting the optical thickness of the insulating layers and to reflect the converted light in the wavelength conversion layer.

On the other hand, the stress relieving layer relaxes the stress caused in the distributed Bragg reflector to prevent the distributed Bragg reflector from being peeled off from the underlying layer, for example, the semiconductor laminated structure. The stress relieving layer may be formed of a spin-on-glass (SOG) or a porous silicon oxide film.

Further, the light emitting diode chip may further include a lower distributed Bragg reflector located on the lower surface of the substrate. The lower distributed Bragg reflector may have a relatively high reflectance for almost all the regions of the visible light region as well as the light generated in the active layer. For example, the lower distribution Bragg reflector may have a reflectance of 90% or more with respect to light in the blue region, light in the green region, and light in the red region. Also, the metal layer may be located on the lower distributed Bragg reflector. The metal layer may be formed of a reflective metal.

In some embodiments, the electrode electrically connected to the semiconductor laminated structure includes: a first electrode electrically connected to the first conductive type semiconductor layer; And a second electrode electrically connected to the second conductive type semiconductor layer. In this case, the opening may include a first opening exposing the first electrode and a second opening exposing the second electrode.

According to still another aspect of the present invention, there is provided a light emitting diode package on which a light emitting diode chip is mounted. This package includes a lead terminal, a light emitting diode chip described above, and a bonding wire connecting the lead terminal and the electrode of the LED chip.

Furthermore, the wire ball of the bonding wire is located in the opening of the wavelength conversion layer. That is, the wire ball is positioned below the entrance of the wavelength conversion layer.

According to still another aspect of the present invention, a method of fabricating a light emitting diode chip includes arranging a plurality of bare chips on a support substrate. Each of the bare chips includes a substrate having a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface, and a gallium nitride compound semiconductor layered structure disposed on the top surface of the substrate, wherein the first conductivity type semiconductor layer, A semiconductor multilayer structure including a conductive semiconductor layer, and an electrode electrically connected to the semiconductor multilayer structure. On the other hand, a wavelength conversion layer covering the plurality of bare chips is formed on the supporting substrate. Thereafter, openings for exposing the electrodes are formed by patterning the wavelength conversion layer. The opening has an inner wall which is inclined with respect to the upper surface of the substrate.

In addition, the entrance of the opening located on the surface of the wavelength conversion layer has a relatively wide width as compared with the bottom of the opening, and the bottom of the opening may be located on the electrode region.

The openings may be formed by irradiating a laser beam, but are not limited thereto. The laser beam may be provided using a CO 2 laser having a wavelength of about 10 mu m, for example. It is possible to prevent the electrodes and the semiconductor layers from being damaged by the laser beam by using a laser of a long wavelength reflected from an electrode material such as Au. Furthermore, by using a laser beam having energy at a central portion and relatively weak energy at a peripheral portion, it is possible to easily form an inclined opening in the wavelength conversion layer.

In some embodiments, the bare chip comprises: a distributed Bragg reflector located above the semiconductor stack; And a stress relieving layer interposed between the distributed Bragg reflector and the semiconductor laminated structure.

The method may further include dividing the wavelength conversion layer into individual light emitting diode chips after the opening is formed, and removing the support substrate. Further, the wavelength conversion layer may be divided before the support substrate is removed, but the present invention is not limited thereto, and may be performed after removing the support substrate.

Since the wavelength conversion layer is formed on the bare chips on the support substrate, a uniform wavelength conversion layer can be formed on the substrate side of the bare chips. Furthermore, since the supporting substrate is removed, the heat radiation path of the light generated in the active layer can be reduced.

According to the present invention, since the wavelength conversion layer is disposed on the edge portion of the electrode, it is possible to prevent light from being radiated around the electrode without wavelength conversion, and therefore, A diode chip can be provided. Furthermore, a light emitting diode chip capable of performing wavelength conversion with respect to light emitted through the side surface of the substrate can be also provided. Further, according to the present invention, by arranging the distributed Bragg reflector having wavelength selectivity between the wavelength conversion layer and the semiconductor laminated structure, it is possible to prevent the light converted in the wavelength conversion layer from entering again into the semiconductor laminated structure, Can be improved.

1 is a cross-sectional view of a light emitting diode chip for explaining a problem of a light emitting diode chip having a wavelength conversion layer that exposes an electrode through a vertical opening.
2 is a cross-sectional view illustrating a light emitting diode chip according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a light emitting diode package with a light emitting diode chip according to an embodiment of the present invention. Referring to FIG.
4 is a cross-sectional view illustrating a method of fabricating a light emitting diode chip according to an embodiment of the present invention.
5 is a schematic cross-sectional view illustrating a light emitting diode chip according to another embodiment of the present invention.
6 is a schematic cross-sectional view illustrating a light emitting diode chip according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, etc. of components may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

Embodiments of the present invention disclose a light emitting diode chip having a uniform wavelength conversion layer. The wavelength conversion layer has an opening for exposing an electrode for bonding the wire, and the inner wall of the opening is inclined. Further, the bottom of the opening is defined within the electrode region. With this feature, it is possible to reduce the waste of material of the wavelength conversion layer, particularly, the phosphor while forming the wavelength conversion layer at the chip level, and there is no need to form additional electrodes using bump balls or the like, It is possible to provide a light emitting diode chip having a wavelength conversion layer by a simpler process.

Before describing embodiments of the present invention, the problem of a light emitting diode chip having a wavelength conversion layer that exposes an electrode through a vertical opening is first described with reference to FIG.

1, a semiconductor laminated structure 30 including a first conductive semiconductor layer 25, an active layer 27, and a second conductive semiconductor layer 29 is disposed on a substrate 21, The first electrode 41 and the second electrode 42 are connected to the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 29, respectively. A transparent conductive layer 31 may be disposed on the second conductive semiconductor layer 29 and the second electrode 42 may be connected to the transparent conductive layer 31.

The wavelength conversion layer 50 covers the semiconductor laminated structure 30. [ The wavelength conversion layer 50 has openings 50a and 50b for exposing the first electrode 41 and the second electrode 42. [ The inner walls 50c and 50d of the openings 50a and 50b are perpendicular to the upper surface of the substrate 21. [ That is, the bottoms of the openings 50a and 50b have the same width as the openings.

The light emitting diode chip having the wavelength conversion layer 50 is mounted on a printed circuit board or a lead frame 91 and the wires 95 are bonded to the electrodes 41 and 42 exposed to the wavelength conversion layer 50. [ do.

The wire 95 is bonded to the electrode using a capillary 60. A wire ball 95a is formed on the electrodes 41 and 42 to be attached to the electrode and then the capillary 60 The wire 95 is pulled out from the capillary 60. As shown in Fig. The wire 95 is connected to a lead terminal such as the lead frame 91, and the wire bonding process is completed.

However, the capillary 60 has a relatively wide width W as shown in Fig. The wavelength conversion layer 50 may be damaged when the capillary 60 is brought into contact with the wavelength conversion layer 50 so that the openings 50a and 50b are relatively As shown in Fig. The openings 50a and 50b have a greater width than the first and second electrodes 41 and 42 so that the bottoms of the openings 50a and 50b are electrically connected to the first and second electrodes 41 and 42 As shown in FIG. As a result, a part of the light generated in the semiconductor laminated structure 30 is emitted to the outside through the openings 50a and 50b of the wavelength conversion layer 50 without wavelength conversion. Accordingly, color deviations such as a blue ring are generated around the first and second electrodes 41 and 42, for example.

The widths of the first and second electrodes 41 and 42 may be relatively wide in order to remove the color deviation of the blue ring and the like. However, since the electrodes 41 and 42 are formed in the semiconductor laminated structure 30 The light extraction efficiency is reduced, which is undesirable.

The present invention provides technical features that can solve the above-described problems and other problems. Hereinafter, embodiments of the present invention will be described in detail.

2 is a cross-sectional view illustrating a light emitting diode chip 100 according to an embodiment of the present invention.

The light emitting diode chip 100 includes a gallium nitride semiconductor laminated structure 30 including a substrate 21, a first conductivity type semiconductor layer 25, an active layer 27 and a second conductivity type semiconductor layer 29, A first electrode 41, a second electrode 42, and a wavelength conversion layer 50. The light emitting diode chip 100 further includes a buffer layer 23, a transparent conductive layer 31, an insulating layer 33, a stress relaxation layer 35 and an upper distributed Bragg reflector 37, a lower distributed Bragg reflector 45, And a metal layer 47.

The substrate 21 has an upper surface on which the semiconductor laminated structure is located, a lower surface opposed to the upper surface, and a side surface connecting the upper surface and the lower surface. The substrate 21 is not particularly limited and may be a substrate on which a nitride semiconductor layer can be grown, for example, sapphire, silicon carbide, spinel, silicon, or the like. The substrate 21 may be relatively thicker than the semiconductor laminated structure and a part of the light generated in the semiconductor laminated structure may be emitted through the side surface of the substrate 21. [

The active layer 27 and the first and second conductivity type semiconductor layers 25 and 29 may be formed of a III-N compound semiconductor, for example, an (Al, Ga, In) N semiconductor. The first and second conductive semiconductor layers 25 and 29 may each be a single layer or a multilayer. For example, the first conductive type and / or the second conductive type semiconductor layers 25 and 29 may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 27 may be a single quantum well structure or a multiple quantum well structure. For example, the first conductivity type may be n-type and the second conductivity type may be p-type, but the present invention is not limited thereto and vice versa. The buffer layer 23 relaxes the lattice mismatch between the substrate 21 and the first conductivity type semiconductor layer 25 to reduce the defect density generated in the semiconductor layers 25, 27 and 29.

The first electrode 41 may be electrically connected to the first conductivity type semiconductor layer 27 by contacting the exposed surface of the first conductivity type semiconductor layer 25. The second electrode 42 is located on the second conductivity type semiconductor layer 29 and electrically connected to the second conductivity type semiconductor layer 29. The first electrode 41 and the second electrode 42 may include, for example, Ti, Cu, Ni, Al, Au, or Cr, and may be formed of two or more of them. A transparent conductive layer 31 such as Ni / Au, ITO, IZO, or ZnO may be formed on the second conductive type semiconductor layer 29 for current dispersion, and the second electrode 42 may be formed on the second conductive type semiconductor layer 29, Lt; / RTI > layer. The thickness of the first electrode 41 and the second electrode 42 is not particularly limited and may be, for example, 100 to 200 탆.

On the other hand, the insulating layer 33 may cover the upper portions of the semiconductor laminated structure 30 and the transparent conductive layer 31. The insulating layer 33 may be formed of, for example, silicon nitride or silicon oxide. In addition, the insulating layer 33 may be formed of a distributed Bragg reflector in which insulating layers having different refractive indexes, for example, SiO 2 / TiO 2 or SiO 2 / Nb 2 O 5 are alternately laminated. In this case, by adjusting the optical thickness of the insulating layers having different refractive indexes, the insulating layer 33 transmits the light generated in the active layer 27 and reflects the light incident from the outside or converted in the wavelength conversion layer 50 . This distributed Bragg reflector has a reflection band that reflects light in a long wavelength region of the visible light region and transmits short wavelength visible light or ultraviolet light generated in the active layer 27. In particular, since the light absorptivity of Nb 2 O 5 is relatively small as compared with TiO 2 , it is more preferable to form distributed Bragg reflectors using SiO 2 / Nb 2 O 5 to prevent light loss.

On the other hand, the stress relieving layer 35 may be located on the semiconductor laminated structure 30, for example, on the insulating layer 33, and the upper distributed Bragg reflector 37 may be disposed thereon.

The upper distributed Bragg reflector 37 may be formed by alternately laminating insulating layers having different refractive indices such as SiO 2 / TiO 2 or SiO 2 / Nb 2 O 5 . In this case, by adjusting the optical thicknesses of the insulating layers having different refractive indexes, the upper distributed Bragg reflector 37 transmits the light generated in the active layer 27 and transmits the light incident from the outside or converted from the wavelength conversion layer 50 Can be reflected. The upper distributed Bragg reflector 37 has a reflection band that reflects light in a longer wavelength region of the visible light region and transmits short wavelength visible light or ultraviolet light generated in the active layer 27. In particular, since the light absorptivity of Nb 2 O 5 is relatively small as compared with TiO 2 , it is more preferable to form distributed Bragg reflectors using SiO 2 / Nb 2 O 5 to prevent light loss.

On the other hand, the stress relieving layer 35 may be formed of a spin-on-glass (SOG) or a porous silicon oxide film. The stress relieving layer 35 relaxes the stress of the upper distributed Bragg reflector 37 to prevent peeling of the upper distributed Bragg reflector 37.

In the case of forming the upper distributed Bragg reflector 37 by alternately laminating the insulating layers having different refractive indexes such as SiO 2 / TiO 2 or SiO 2 / Nb 2 O 5 , since the relatively high density layers are laminated, The stress generated in the reflector becomes large. So that the distributed Bragg reflector is liable to be peeled off from the underlying layer, for example, the insulating layer 33. Therefore, by disposing the stress relieving layer 35 under the upper distributed Bragg reflector 37, it is possible to prevent the upper distributed Bragg reflector 37 from being peeled off.

When the upper distributed Bragg reflector 37 is employed, the insulating layer 33 may be formed of a single layer, such as silicon nitride or silicon oxide, and may be omitted.

On the other hand, a lower distributed Bragg reflector 45 is disposed below the substrate 21. The lower distribution Bragg reflector 45 is formed by alternately laminating layers having different refractive indexes, and the light in the blue wavelength region, such as the light generated in the active layer 27, as well as the light in the yellow wavelength region and / And has a relatively high reflectance, preferably 90% or more, more preferably 99% or more, for light in the red wavelength region. Further, the lower distribution Bragg reflector 45 may have a reflectance of 90% or more, preferably 99% or more, as a whole over a wavelength range of 400 to 700 nm, for example.

A lower distributed Bragg reflector 45 having a relatively high reflectance over a wide wavelength region is formed by controlling the respective optical thicknesses of the repeated stacked material layers. The lower distributed Bragg reflector 45 may be formed, for example, by alternately laminating a first layer of SiO 2 and a second layer of TiO 2 , or alternatively by alternating between a first layer of SiO 2 and a second layer of Nb 2 O 5 And may be formed by laminating. It is more preferable to alternately laminate the first layer of SiO 2 and the second layer of Nb 2 O 5 because the light absorptance of Nb 2 O 5 is relatively smaller than that of TiO 2 . As the number of layers of the first layer and the second layer increases, the reflectance of the distributed Bragg reflector 45 is more stable. For example, the number of layers of the distributed Bragg reflector 45 may be 50 or more, that is, 25 or more.

It is not necessary that the first layers or the second layers alternately stacked have the same thickness and the first layers and the second layers are formed so as to have a relatively high reflectance for the wavelengths of light generated in the active layer 27 as well as for other wavelengths in the visible region The thickness of the two layers is selected. In addition, a plurality of distributed Bragg reflectors having a high reflectance for a specific wavelength band may be laminated to form the lower distributed Bragg reflector 45.

By adopting the lower distribution Bragg reflector 45, when the light converted in the wavelength conversion layer 50 is incident on the substrate 21 again, the incident light can be reflected again and emitted to the outside, The efficiency can be improved.

On the other hand, the first and last layers of the distributed Bragg reflector 45 may be SiO 2 . By placing the SiO 2 on the first layer and the last layer of distributed Bragg reflector 45 it may be stably attached to the distributed Bragg reflector 45 on the substrate 21, and, by using the final SiO 2 layer lower distributed Bragg The reflector 45 can be protected.

The metal layer 47 is located below the bottom distributed Bragg reflector 45. The metal layer 47 may be formed of a reflective metal such as aluminum to reflect light transmitted through the lower distributed Bragg reflector 45, but may be formed of a metal other than the reflective metal. Furthermore, the metal layer 47 helps dissipate the heat generated in the laminated structure 30 to the outside, thereby improving the heat dissipation performance of the light emitting diode chip 100.

The wavelength conversion layer 50 covers the upper part of the semiconductor laminated structure 30. The wavelength conversion layer 50 may be formed by containing a phosphor in epoxy or silicon. For example, after the wavelength conversion layer 50 contains a phosphor in epoxy or silicon, the wavelength conversion layer 50 may be applied by a method such as screen printing . Further, the wavelength conversion layer 50 may have a refractive index within a range of 1.4 to 2.0, for example, and a powder such as TiO 2 , SiO 2 , Y 2 O 3 or the like may be incorporated into the wavelength conversion layer 50 have.

The wavelength conversion layer 50 has openings 50a and 50b for exposing the first electrode 41 and the second electrode 42, respectively. These openings 50a, 50b have inclined inner walls 50c, 50d. The bottoms of the openings 50a and 50b may be located on the electrode regions of the first electrode 41 and the second electrode 42, respectively. The bottom portion has a smaller size than the electrode region of the corresponding electrode and may have a width that is relatively larger than the width of the wire ball formed in the opening portion. The openings 50a and 50b may have a relatively larger width than the first electrode 41 and the second electrode 42, respectively. Furthermore, the openings of the openings 50a, 50b may have a size corresponding to the width W of the capillary 60. [ In addition, the width of the opening portion at a half of the thickness of the wavelength conversion layer 50 may be approximately equal to or smaller than the width of the corresponding electrode and the electrode region.

The wavelength conversion layer 50 covers the top of the semiconductor laminated structure 30 and further covers the side surface of the substrate 21 and the side surface of the semiconductor laminated structure 30. [ Accordingly, not only the light emitted through the upper surface of the semiconductor laminated structure 30 but also the light emitted from the side surface of the substrate 21 is provided with the light emitting diode chip 100 capable of performing wavelength conversion. The top surface of the wavelength conversion layer 50 may be flat and the thickness of the wavelength tuning layer 50 on the semiconductor laminated structure 30 and the thickness of the wavelength conversion layer 50 on the side surface of the substrate 21 may be substantially . ≪ / RTI >

Although a single semiconductor lamination structure 30 is illustrated and described as being placed on the substrate 21 in this embodiment, a plurality of semiconductor lamination structures may be located on the substrate 21 in an electrically spaced relation to each other , The wavelength conversion layer 50 may cover these semiconductor laminated structures. A distributed Bragg reflector such as the distributed Bragg reflector 37 of FIG. 2 may be located between the plurality of semiconductor laminated structures and the wavelength conversion layer, and a stress relieving layer may be provided between the distributed Bragg reflector and the semiconductor laminated structure Can be intervened.

FIG. 3 is a cross-sectional view illustrating a light emitting diode package mounted with a light emitting diode chip 100 according to an embodiment of the present invention.

Referring to FIG. 3, the light emitting diode package includes a light emitting diode chip 100 and a mount 91 for mounting the light emitting diode chip 100. In addition, the light emitting diode package may include a bonding wire 95 and a lens 97.

The mount 91 may be, for example, a printed circuit board, a lead frame, a ceramic substrate, or the like, and includes lead terminals 93a and 93b. The first electrode (41 in FIG. 2) and the second electrode (42 in FIG. 2) of the light emitting diode chip 100 are electrically connected to the lead terminals 93a and 93b through the bonding wires 95, respectively. At this time, the wire ball 95a of the bonding wire 95 is located inside the openings 50a and 50b of the wavelength conversion layer 50. That is, the wire ball 95a is positioned below the entrance of the opening 50a, 50b of the wavelength conversion layer 50.

On the other hand, the lens 97 covers the light emitting diode chip 100. The lens 97 adjusts the directivity angle of the light emitted from the LED chip 100 so that light is emitted in a desired direction. Since the wavelength conversion layer 50 is formed in the light emitting diode chip 100, the lens 97 need not contain a phosphor.

Hereinafter, a method of manufacturing an LED chip 100 according to an embodiment of the present invention will be described in detail with reference to FIG.

Referring to Fig. 4 (a), bare chips 150 are arranged on a supporting substrate 101. Fig. The bare chips 150 may be arranged on the supporting substrate 101 at regular intervals. 2, the bare chips 150 are formed of a gallium nitride-based material including a substrate 21, a first conductivity type semiconductor layer 25, an active layer 27, and a second conductivity type semiconductor layer 29 A semiconductor laminated structure 30, a first electrode 41, and a second electrode 42. A buffer layer 23 may be interposed between the first conductivity type semiconductor layer 25 and the substrate 21. Further, the bare chips 150 may include a transparent conductive layer 31 and an insulating layer 33 and may include a stress relieving layer 35 and an upper distributed Bragg reflector 37, a lower distributed Bragg reflector 45, And a metal layer 47. That is, the bare chip 150 corresponds to a portion of the light emitting diode chip 100 of FIG. 2 except for the wavelength conversion layer 50, and a detailed description of each component of the bare chip 150 It is omitted.

The supporting substrate 101 supports the bare chips 150 so that they are equally spaced. The support substrate 101 may be a substrate made of, for example, glass, ceramics, sapphire, GaN, Si, or the like.

Referring to FIG. 4B, a wavelength conversion layer 50 covering the bare chips 150, the first and second electrodes 41 and 42 is formed on the support substrate 101. The wavelength conversion layer 50 may contain a phosphor, and may contain a powder such as TiO 2 , SiO 2 , Y 2 O 3 or the like to control the refractive index. The wavelength conversion layer 50 is formed thick enough to cover the first and second electrodes 41 and 42, and the upper surface thereof has a flat shape. The wavelength conversion layer 50 also fills the area between the bare chips 150 to cover the side surface of the substrate 21 of each bare chip 150. The wavelength conversion layer 50 may be formed by various application methods such as injection molding, transfer molding, compression molding, and printing.

Referring to FIG. 4C, after the wavelength conversion layer 50 is formed, openings 50a and 50b are formed to expose the first and second electrodes 41 and 42 of the respective bare chips. The openings 50a and 50b are formed to have inclined inner walls as described with reference to FIG. The openings 50a and 50b may be formed using a laser beam, for example, a laser beam using a CO 2 laser. The CO 2 laser emits a laser beam having a wavelength of about 10 μm, and by using this laser beam, the openings 50a and 50b can be formed without damaging the electrodes 41 and 42. After the openings 50a and 50b are formed, the fluorescent material or resin remaining on the electrodes 41 and 42 may be removed by wet or dry cleaning.

Referring to FIG. 4 (d), after the opening is formed, the supporting substrate 101 is removed. In order to easily remove the support substrate 101, a release film (not shown) may be formed on the support substrate 101. Such a release film may be a film which is peeled off by, for example, heat or ultraviolet light. Therefore, the support substrate 101 can be easily removed by applying heat to the peeling film or by irradiating light such as ultraviolet rays.

Thereafter, the wavelength conversion layer 50 covering the bare chips 150 is divided to complete the individual LED chips 100 having the wavelength conversion layer 50. The wavelength conversion layer 50 may be divided before the support substrate 101 is removed, and then the support substrate 101 may be removed. The wavelength conversion layer 50 may be divided using a blade or using a laser.

The bare chip 150 may include a plurality of semiconductor laminated structures 30, and the semiconductor laminated structure 30 may include a plurality of the semiconductor laminated structures 30. In the present embodiment, And may include wires that electrically connect the structures 30.

5 is a schematic cross-sectional view illustrating a light emitting diode chip 200 according to another embodiment of the present invention.

5, the light emitting diode chip 200 according to the present embodiment is substantially similar to the light emitting diode chip 100 described with reference to FIG. 2, except that the wavelength conversion layer 50 is disposed on the substrate 21 There is a difference. That is, the wavelength conversion layer 50 does not cover the side surface of the substrate 21. The light emitting diode chip 200 is manufactured by forming the wavelength conversion layer 50 on the substrate 21, that is, at the wafer level, before the substrate 21 is divided. The wavelength conversion layer 50 may be in contact with the upper surface of the substrate 21, but the present invention is not limited thereto. The wavelength conversion layer 50 may be disposed on the first conductive semiconductor layer 25.

On the other hand, the openings 50a and 50b may be formed before the substrate 21 is divided, but not limited thereto, and may be formed after the substrate 21 is divided.

6 is a schematic cross-sectional view illustrating a light emitting diode chip 300 according to another embodiment of the present invention.

Referring to FIG. 6, the light emitting diode chips 100 and 200 described above have a horizontal structure, but the LED chip 300 according to the present embodiment has a vertical structure.

The light emitting diode chip 300 includes a semiconductor laminated structure 30 including a substrate 51, a first conductivity type semiconductor layer 25, an active layer 27 and a second conductivity type semiconductor layer 29, 41 and a wavelength conversion layer 60. The light emitting diode chip 300 may also include an insulating layer 33, a stress relieving layer 35 and an upper distributed Bragg reflector 37, as described with reference to FIG. Further, the light emitting diode chip 104 may include a reflective metal layer 55, a barrier metal layer 57, and a bonding metal 53.

The substrate 51 is a secondary substrate separated from a growth substrate for growing the semiconductor layers 25, 27 and 29 and attached to the compound semiconductor layers 25, 27 and 29 already grown. The substrate 51 may be a conductive substrate such as a metal substrate or a semiconductor substrate, but is not limited thereto, and may be an insulating substrate such as sapphire.

The semiconductor laminated structure 30 is disposed on the substrate 51 and includes a first conductivity type semiconductor layer 25, an active layer 27, and a second conductivity type semiconductor layer 29. Here, the p-type compound semiconductor layer 29 is located closer to the substrate 51 than the n-type compound semiconductor layer 25 like a general vertical type light emitting diode in the semiconductor laminated structure 30. The semiconductor laminated structure 30 may be located on a partial area of the substrate 51. That is, the substrate 51 has a relatively large area as compared with the semiconductor laminated structure 30, and the semiconductor laminated structure 30 can be located in a region surrounded by the edge of the substrate 51.

The first conductive semiconductor layer 25, the active layer 27, and the second conductive semiconductor layer 29 are similar to the semiconductor layers described with reference to FIG. On the other hand, a rough surface can be formed on the upper surface of the n-type compound semiconductor layer 25 by placing the n-type compound semiconductor layer 25 having a relatively small resistance on the opposite side of the substrate 51. On the other hand, the upper electrode 41 is located on the semiconductor laminated structure 30, for example, the first conductivity type semiconductor layer 25, and is electrically connected to the first conductivity type semiconductor layer 25.

A reflective metal layer 55 may be interposed between the substrate 51 and the semiconductor laminated structure 30. A barrier metal layer 57 may be interposed between the substrate 51 and the reflective metal layer 55 to form the reflective metal layer 55, . Further, the substrate 51 may be bonded to the semiconductor laminated structure 30 through the bonding metal 53. The reflective metal layer 55 and the barrier metal layer 57 may function as a lower electrode electrically connected to the second conductive type semiconductor layer 29. [

The insulating layer 33 covers the upper surface of the semiconductor laminated structure 30 on which the stress relaxation layer 35 and the upper distributed Bragg reflector 37 can be placed. The insulating layer 33, the stress relieving layer 35, and the upper distributed Bragg reflector 37 may be formed of the same material as described with reference to FIG. 2, so that detailed description is omitted in order to avoid duplication. In addition, the insulating layer 33 may be omitted. In addition, the insulating layer 33 may be a distributed Bragg reflector as described in the embodiment of FIG. 2, in which case the stress relieving layer 35 and the upper distributed Bragg reflector 37 may be omitted.

On the other hand, the wavelength conversion layer 60 is disposed on the semiconductor laminated structure 30. The insulating layer 33, the stress relaxation layer 35 and the distributed Bragg reflector 37 are located between the wavelength conversion layer 60 and the semiconductor laminated structure 30. The wavelength conversion layer 60 may be located on the upper side of the semiconductor laminated structure 30 but is not limited thereto and may be formed on the side surface of the semiconductor laminated structure 30, It is possible. The wavelength conversion layer 60 has an opening 60a for exposing the upper electrode 41 and an inner wall 60c of the opening 60a is formed on the upper surface of the substrate 51, And is inclined with respect to the upper surface. The opening 60a is the same as the openings 50a and 50b described above with reference to FIG. 2, and thus a detailed description thereof will be omitted.

In this embodiment, the wavelength conversion layer 60 may be formed before the substrate 51 is divided into individual chip units, but it is not limited thereto and may be formed after being divided into bare chips.

Claims (18)

A substrate having a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface;
A semiconductor laminated structure including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer;
An electrode electrically connected to the semiconductor laminated structure;
A wavelength conversion layer covering an upper portion of the semiconductor laminated structure and having an opening exposing the electrode;
A distributed Bragg reflector interposed between the wavelength conversion layer and the semiconductor laminated structure; And
And a stress relieving layer interposed between the distributed Bragg reflector and the semiconductor laminated structure,
Wherein the opening has an inner wall inclined with respect to an upper surface of the substrate. The method according to claim 1,
Wherein an opening of the opening located on a surface of the wavelength conversion layer has a width relatively larger than a bottom of the opening and a bottom of the opening is located on the electrode region. The method of claim 2,
Wherein an opening of the opening has a relatively wide width as compared with the electrode region. The method of claim 3,
Wherein a width of the opening portion at a half of a thickness of the wavelength conversion layer is relatively narrower than that of the electrode region. The method according to claim 1,
Wherein the wavelength conversion layer covers a side surface of the semiconductor laminated structure and a side surface of the substrate. The light emitting diode chip according to claim 5, wherein the upper surface of the wavelength conversion layer is flat. delete delete The method according to claim 1,
Wherein the stress relieving layer is formed of SOG or a porous silicon oxide film. Lead terminal;
A light emitting diode chip according to any one of claims 1 to 6 and 9; And
And a bonding wire connecting an electrode of the light emitting diode chip and the lead terminal. The method of claim 10,
And the wire ball of the bonding wire is located within the opening of the wavelength conversion layer. A plurality of bare chips arranged on a support substrate, each bare chip having a top surface, a bottom surface, a side surface connecting the top surface and the bottom surface, and a gallium nitride compound semiconductor layered structure positioned on the top surface of the substrate, 1. A semiconductor device comprising: a semiconductor multilayer structure including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; an electrode electrically connected to the semiconductor multilayer structure; a distributed Bragg reflector located on the semiconductor multilayer structure; And a stress relieving layer interposed between the reflector and the semiconductor laminated structure,
Forming a wavelength conversion layer on the support substrate to cover the plurality of bare chips,
And patterning the wavelength conversion layer to form openings for exposing the electrodes,
Wherein the opening has an inner wall inclined with respect to an upper surface of the substrate. The method of claim 12,
Wherein an opening of the opening located on a surface of the wavelength conversion layer has a relatively wide width as compared with a bottom of the opening and the bottom of the opening is located on the electrode region. The method of claim 12,
Wherein the openings are formed by irradiating a laser beam. 15. The method of claim 14,
Wherein the laser beam is formed by a CO 2 laser. delete The method of claim 12,
After the opening is formed, the wavelength conversion layer is divided into individual LED chips,
And removing the supporting substrate. 18. The method of claim 17,
Wherein the step of dividing the wavelength conversion layer is performed after removing the supporting substrate.
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