KR101747791B1 - Memory system and data storage device, and data management method thereof - Google Patents

Abstract

One embodiment of the present invention relates to a data management method of a data storage device having a data management unit different from a data management unit of a user apparatus. A data management method according to an embodiment of the present invention includes the steps of: receiving information on a storage area of a file to be deleted from the user device; storing, in a storage area of the file to be deleted, And performing an erase operation on the storage area corresponding to the selected data management unit. The data management method according to the embodiment of the present invention can prevent the shortening of the life time of the flash memory and improve the overall performance of the flash memory system by eliminating the inconsistency between the file management unit in terms of the hard disk and the data management unit in terms of the flash memory have.

Description

[0001] MEMORY SYSTEM AND DATA STORAGE DEVICE, AND DATA MANAGEMENT METHOD THEREOF [0002]

The present invention relates to a memory system and its data management method, and more particularly to a flash memory system and a method for managing data thereof.

Unlike a hard disk, a flash memory does not support overwrite, so erasing must be preceded by rewriting. The erase operation of the flash memory is performed on a memory block basis. Due to the characteristics of the flash memory, it is difficult to apply the file system for the hard disk directly to the flash memory. In order to solve this problem, a flash conversion layer (FTL) which is a middleware is used between a file system for a hard disk and a flash memory. The flash conversion layer allows the flash memory to be read and written freely like an existing hard disk.

On the other hand, the unit for managing files in the file system and the unit for managing data stored in the flash memory in the flash conversion layer are different. This inconsistency of the management unit may cause unnecessary copying of data and a large amount of merging operations to the flash memory. This copying and merging operation is a major cause of shortening the life of the flash memory.

The present invention aims at preventing the shortening of the life time of the flash memory and improving the overall performance of the flash memory system by eliminating the inconsistency between the management unit of the hard disk and the management unit of the flash memory.

A data management method of a data storage device having a data management unit different from a data management unit of a user device according to an embodiment of the present invention includes receiving information on a storage area of a file to be deleted from the user device; Selecting a storage area corresponding to a data management unit of the data storage device among the storage areas of the file to be deleted; And performing an erase operation on the storage area corresponding to the selected data management unit.

According to an embodiment, information on a storage area that does not match the data management unit of the data storage device among the storage areas of the files to be deleted is separately managed.

In an embodiment, the user equipment changes information about the metadata of the file to be deleted, indicating that the file to be deleted is deleted at a higher level.

In an embodiment, when information on a storage area of at least two files to be deleted is provided from the user device, the data storage device stores information on a storage area of the at least two files to be deleted in a buffer memory .

In an embodiment, the selecting step selects a storage area corresponding to a data management unit of the data storage device among information on storage areas of the at least two files to be deleted stored in the buffer memory.

In an embodiment, the user apparatus manages data on a sector-by-sector basis, the data storage apparatus manages data on a page basis, and each page is divided into a plurality of sectors.

The data management method of a data storage device using a data management unit different from the data management unit of the user apparatus according to an embodiment of the present invention is characterized in that the data storage device includes a data storage unit for storing data, The method comprising: receiving information on a storage area of a file to be deleted from the user device; And invalidating a storage area corresponding to a management unit of the data storage device among the storage areas of the file to be deleted, wherein the data on the invalidated marking storage area, among the data stored in the buffer memory, It is not written to the storage unit.

In one embodiment of the present invention, the method further comprises marking a storage area that does not match the management unit of the data storage device among the storage areas of the file to be deleted, Is written to the storage unit.

The method may further include generating a trim management table for managing a storage area that is inconsistent with the management unit of the data storage device among the storage areas of the files to be deleted.

In an embodiment, the trim management table is stored in the buffer memory, and the information of the trim management table is adjusted by a push method.

In an embodiment, when information on a storage area of at least two files to be deleted is provided from the user device, the data storage device stores information on a storage area of the at least two files to be deleted in the buffer memory .

In an embodiment, the invalid marking step invalidly marks a storage area corresponding to a data management unit of the data storage device among information on a storage area of the at least two files to be deleted stored in the buffer memory.

A memory system according to an embodiment of the present invention includes a host generating a Trim command; And a data storage device for performing an erase operation in response to a Trim command from the host, wherein the data storage device is a data storage unit of a data storage unit of a storage area designated as an area to be deleted by the Trim command And performs an erase operation on the matching area.

In an embodiment, the data storage device separately manages information on an area that does not match the data management unit of the data storage device among the storage areas designated as the area to be deleted by the trim command.

In an embodiment, the data storage device manages data on a page basis, the host manages data on a sector basis, and each page is divided into a plurality of sectors.

In an embodiment, the data storage device may include a mapping table for converting a logical address provided from the host into a physical address of the data storage device, and the mapping table may include, Mark storage that matches the management unit as invalid.

In an embodiment, the mapping table indicates a storage area that is inconsistent with the management unit of the data storage device among the storage areas designated as the area to be deleted, as valid.

In an embodiment, the data storage device further includes a trim management table for managing information on a storage area that is inconsistent with the management unit of the data storage device among the areas designated as the deletion area.

If the storage area managed by the trim management table matches the data management unit of the data storage device by another trim command from the host, the mapping table stores the write status information .

In an embodiment, after the write status information of the mapping table is updated, information on a storage area corresponding to a data management unit of the data storage device managed in the trim management table is deleted from the trim management table.

In an embodiment, the data storage device further includes a buffer memory for storing the trim management table, and the data storage device manages information stored in the trim management table by an extrusion method.

In an embodiment, the data storage device includes a buffer memory for storing information about at least two trim commands transmitted from the host.

As an embodiment, the data storage device further comprises at least two flash memories for storing data and a control unit for controlling the at least two flash memories, wherein the control unit is operable so that the at least two flash memories are operated in parallel , The processing order of the at least two trim instructions stored in the buffer memory is adjusted.

A data storage device connected to a user device according to an embodiment of the present invention includes a storage unit for storing data; A buffer memory for temporarily storing data to be written to the storage unit; And a control unit for controlling the storage unit and the buffer memory, wherein the data of the storage area matching the data management unit of the storage unit among the storage areas designated as the area to be deleted by the trim command transmitted from the user apparatus And is not written to the storage unit.

In an embodiment, data in a storage area that does not match the data management unit of the storage unit among the storage areas designated as the area to be deleted is written to the storage unit.

The mapping table may further include a mapping table for converting a logical address provided from the user device into a physical address of the data storage device, The writing state information of the matching storage area is invalidated and the writing state information of the storage area that does not match the data management unit of the storage unit among the storage areas designated as the area to be deleted is effectively displayed.

As an embodiment, the system further includes a trim management table for managing a storage area that does not match the management unit of the storage unit indicated as valid in the mapping table.

In an embodiment, when the storage area managed in the trim management table matches another data management unit of the storage unit by another Trim command transmitted from the user apparatus, the mapping table is written based on the trim management table And updates the status information.

As an embodiment, the apparatus further includes a buffer memory for storing information on the at least two trim commands when receiving at least two trim commands from the user device.

As an embodiment, the storage unit comprises at least two flash memories, wherein the control unit is operable to cause the at least two flash memories to operate in parallel, Adjust.

The memory system according to the embodiment of the present invention eliminates the inconsistency between the file management unit in terms of the hard disk and the data management unit in terms of the flash memory so that the copying of the valid data caused by the inconsistency of the data management unit, Thereby preventing occurrence. Thus, the memory system according to the embodiment of the present invention prevents the shortening of the life time of the flash memory and improves the overall performance of the flash memory system. Further, the memory system according to the embodiment of the present invention further improves the response speed of the flash memory system to the command of the host by supporting the trim operation.

1 is a block diagram illustrating a memory system in an embodiment of the present invention.
2 is a block diagram illustrating a flash memory system according to an embodiment of the present invention.
FIG. 3 exemplarily shows a directory entry structure that the file system of FIG. 2 creates to manage a file.
4 is a block diagram showing the software layer structure of the flash memory system shown in FIG.
5 is a block diagram illustrating the address translation operation of the flash translation layer in more detail.
Figure 6 is a block diagram illustrating an exemplary address translation through a mapping table.
7 is a diagram illustrating an embodiment of the present invention for processing a trim command using only a mapping table without a trim management table.
8 and 9 illustrate an embodiment of the present invention for processing a trim command using a mapping table and a trim management table.
10 is a flowchart showing the erasing operation at a lower level of the flash storage device of FIG.
11 is a flow chart showing the operation of the flash transform layer when a delete operation at a lower level is performed.
12 to 14 are block diagrams for explaining a method of processing a trim command of a flash storage device when the flash storage device supports the flush function.
15 is a flowchart illustrating a write-back operation of the flash storage device according to an embodiment of the present invention.
Figures 16-18 illustrate a flash storage device collecting trim commands provided at different times and processing the collected trim commands at one time.
19 to 23 are block diagrams illustrating a method of processing a trim instruction of a flash storage device in a case where the flash storage device includes a plurality of flash memories.
FIG. 24 shows an example in which a flash memory system according to an embodiment of the present invention is applied to a memory card.
FIG. 25 shows an example in which a trim command processing technique according to an embodiment of the present invention is applied to a solid state drive (SSD).
26 is a block diagram illustrating an exemplary configuration of the SSD controller shown in FIG.
FIG. 27 is a block diagram illustrating an example of implementing a trim instruction processing technique in a flash memory module according to an embodiment of the present invention. Referring to FIG.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, in order to explain the present invention in detail so that those skilled in the art can easily carry out the technical idea of the present invention. .

Ⅰ. Memory system supporting trim operation

1 is a block diagram illustrating a memory system 100 in accordance with an embodiment of the present invention. Referring to Figure 1, a memory system 100 includes a host 110 and a storage device 120, which includes a control unit 121 and a storage unit 122.

The host 110 supports a TRIM operation. The trimming operation means that the host 110 processes only metadata about the file when there is a delete request for a specific file from the user. In this case, since only the metadata of the host 110 is processed without actually deleting the data stored in the storage unit 122, the user can recognize that the deletion operation for the file is performed quickly.

On the other hand, in order to substantially delete the data stored in the storage unit 122, the host 110 provides a TRIM command to the storage device 120. [ The trim command includes information (for example, address information) for specifying an area to be substantially deleted. The control unit 121 performs an erase operation on the data stored in the storage unit 122 in response to the Trim command. Such a trim command may be defined by various names such as a deallocate command, an unwrite command, a deletion command, and a file delete command.

The units for managing files in the host 110 and the units for managing data stored in the storage unit 122 in the storage unit 120 may be different from each other. For example, the host 110 manages files on a sector basis from the viewpoint of a hard disk, and the storage device 120 stores pages and / or blocks of a flash memory- and can manage the data stored in the storage unit 122 on a block-by-block basis.

Such a mismatch between the management unit of the host 110 and the storage device 120 may cause degradation of performance of the memory system 100. For example, when an erase operation is performed on the data stored in the storage unit 122 in response to a Trim command from the host 110, the mismatch of the management unit may result in a copy of valid data and a large number of merge operations merge operation. Therefore, the life of the storage device 120 may be shortened, and performance may be deteriorated.

In order to solve such a problem, the storage device 120 according to the embodiment of the present invention includes a TRIM Manage Table (123). The trim management module 123 separately manages an area that does not match the management unit of the storage device 120 among the areas of the storage unit 122 designated as the area to be substantially deleted in accordance with the trim command from the host 110. [ The memory system 100 according to the embodiment of the present invention can reduce the life span of the storage device 120 by eliminating the mismatch of management units between the host 110 and the storage device 120 by using the trim management module 123 And performance degradation can be prevented.

Ⅱ. Flash storage device in a flash memory system that processes the Trim command

2 is a block diagram illustrating a flash memory system 1000 in accordance with an embodiment of the present invention. In FIG. 2, a flash storage device 1200 is shown as an example of the storage device 120 of FIG.

2, the flash memory system 1000 includes a host 1100 and a flash storage device 1200. [ For the sake of simplicity, the host 1100 manages files in units of sectors, and the flash storage 1200 manages data stored in the flash memory 1210 on a page basis Is assumed. The flash storage device 1200 eliminates the inconsistency of the management unit between the host 1100 and the flash storage device 1200 using the TRIM Manage Table of the flash conversion layer 1232. [

The host 1100 includes a processing unit 1110 and a driving unit 1120. A processing unit (e.g., CPU) 1110 controls the overall operation of the host 1100 and the drive unit 1120 drives the flash storage device 1200 under the control of the processing unit 1110. The drive unit 1120 may be configured as a main memory for driving software programs of the host 1100. [

The drive unit 1120 includes an application 1121, a file system 1122, a device driver 1123, and a host memory 1124. The application 1121 is also referred to as an application program, and is software executing on an operating system (OS). For example, the application 1121 is programmed to support the creation and deletion of a file.

The file system 1122 manages files used in the host 1100. [ Hereinafter, it is assumed that the file system 1122 manages files used in the host 1100 on a sector basis from the viewpoint of a hard disk. Here, a sector is the smallest data management unit that the application 1121 can access, and generally has a size of 512B (bytes).

The file system 1122 changes the metadata of the file requested to be deleted when the application 1121 requests deletion of a specific file. After that, when the application 1121 accesses the corresponding file, the file system 1122 refers to the changed metadata and provides information that the corresponding file is deleted.

On the other hand, since the file system 1122 changes only the metadata (e.g., file name) of the file, the data corresponding to the file requested to be deleted stored in the flash memory 1210 is not deleted. Thus, the processing unit 1110 provides a Trim command to the flash storage device 1200 to substantially delete the data stored in the flash memory 1210. The directory entry structure of the file system 1122 and the file system 1122 will be described in more detail in FIG. 3 below.

The device driver 1123 is a program that allows the flash storage 1200 to communicate with the host 1100. [ In order to use the flash storage device 1200, a device driver 1123 corresponding to the flash storage device 1200 must be installed in the host 1100. The host memory 1124 may temporarily store the data written to or read from the flash storage device 1200. The host memory 1124 can also be used as a working memory for driving the application 1121, the file system 1122, and the device driver 1123.

In an embodiment of the present invention, flash storage 1200 receives a TRIM command from host 1100. The trim command includes information (e.g., a sector address of a file requested to be deleted) for designating an area to be deleted. Flash storage device 1200, in response to the Trim command, marks the requested area of the flash memory 1210 as invalid.

The flash storage device 1200 performs an erase operation on the invalidated area in idle time (e.g., the idle time of the control unit 1230 when there is no request from the host) do. 2, the flash storage device 1200 includes a flash memory 1210, a buffer memory 1220, and a control unit 1230.

The flash memory 1210 performs an erase operation, a read operation, or a write operation under the control of the control unit 1230. [ The flash memory 1210 is composed of a plurality of memory blocks. Each memory block is composed of a plurality of pages. In Fig. 2, three memory blocks 1121 to 1213 are illustratively shown. Each memory block is illustratively shown as having four pages.

The size of each page is larger than the size of the sector. That is, each page can be divided into a plurality of sectors. For example, each page has a size of about 2 kilobytes (bytes) and a sector has a size of 512 bytes (bytes). The flash memory 1210 performs an erase operation on a memory block basis and performs a write or read operation on a page basis.

On the other hand, one bit or two or more bits of data may be stored in one memory cell of the flash memory 1210. A memory cell capable of storing one bit of data in one memory cell is called a single level cell (SLC) or a single bit cell. A memory cell capable of storing two or more bits of data in one memory cell is called a multi-level cell (MLC) or a multi-bit cell.

The buffer memory 1220 may temporarily store data read from the flash memory 1210 or data to be braked from the host 1100. In addition, the buffer memory 1220 can be used to drive firmware such as Flash Translation Layer (FTL). The buffer memory 1220 may be implemented as a DRAM, an SRAM, an MRAM, a PRAM, or the like.

2, the control unit 1230 includes a central processing unit (CPU) 1231, a flash translation layer (FTL) 1232, a flash controller 1233, and a buffer controller 1234. The central processing unit 1231 analyzes and processes the signals input from the host 1100. [ In addition, the central processing unit 1231 controls the overall operation of the flash storage device 1200.

The flash conversion layer 1232 converts a logical address (LA) provided from the host 1100 into a physical address (PA) on the flash memory 1210. For example, the flash translation layer 1232 translates the sector address transferred from the host into a page address on the flash memory 1210.

In addition, the flash conversion layer 1232 manages data stored in the flash memory 1210, for example, on a page basis. The flash conversion layer 1232 marks the corresponding page as invalid when all of the data stored in the predetermined page is requested to be deleted by the trim command from the host 1100.

The flash conversion layer 1232 marks the corresponding page of the mapping table as vaild when only a part of the data stored in the predetermined page is requested to be deleted by the trim command from the host 1100. [ In this case, the flash conversion layer 1232 may manage the page separately. For this, the flash conversion layer 1232 may include a TRIM Manage Table. The trim management table manages the pages requested to delete only a part of the data stored in the page.

On the other hand, the trim management table can be stored in the buffer memory 1220. In this case, the size of the area allocated to the trim management table among the areas of the buffer memory 1220 can be variously set by the designer. For example, in order to reduce the overhead of the control unit 1230 according to page management, the size of the area allocated to the trim management table may be limited to a predetermined size.

When the area to which the trim management table is allocated is limited to a predetermined size, the size of the information about the page to be managed in the trim management table may exceed the size of the allocated area. In this case, the information on the page of the trim management table can be managed by the push method. The page management scheme of the flash translation layer 1232 and the flash translation layer 1232 will be described in more detail in FIGS. 5 to 9 below.

On the other hand, the flash controller 1233 controls reading, writing and erasing operations of the flash memory 1210, and the buffer controller 1234 controls reading and writing operations of the buffer memory 1220.

FIG. 3 illustrates an exemplary directory entry structure that the file system 1122 of FIG. 2 creates to manage a file. Referring to FIG. 3, the directory entry structure includes a file name, an extension, an attribute, a create date and time, a starting secter, file size), and the like.

The file system 1122 (see FIG. 2) changes the metadata of the file requested to be deleted when there is a request to delete a specific file from the application 1121 (see FIG. 2). For example, the file system 1122 places the hexadecimal byte code 'E5h' in the file name of the file requested to be deleted. As another example, the file system 1122 changes the attribute value of the file requested to be deleted to 'OxE5'. This is a special tag, meaning "this file has been deleted." Thus, if the application 1121 subsequently accesses the file, the file system 1122 provides information that the file has already been deleted. Information about the file system 1122 may be stored periodically or in non-volatile memory (e.g., flash memory 1210) using idle time.

Meanwhile, the file system 1122 can be variously selected according to the operating system (OS) of the flash memory system 1000 (see FIG. 2). For example, if the operating system of the flash memory system 1000 is a disk operating system (DOS) or a Windows based operating system, a file allocation table (FAT) file system, a virtual FAT (VFAT) A file system, an exFAT (extended FAT) file system, a new technology file system (NTFS), and the like can be used.

As another example, if the operating system of the flash memory device 1000 is a UNIX-based operating system, a UNIX file system (UFS) may be used. If the operating system of the flash memory device 1000 is a Linux (LINUX) based operating system, a file system for LINUX may be used. If the operating system of the flash memory device 1000 is a mobile OS (for example, iOS (OS for iPhone, iPad) and Android OS), a file system for mobile OS may be used.

4 is a block diagram illustrating the software hierarchy of flash memory system 1000 shown in FIG. 4, the software layer structure of the flash memory system 1000 comprises an application 1121, a file system 1122, a flash translation layer 1232, and a flash memory 1210. The application 1121 and the file system 1122 on the host 1100 (see FIG. 2) side can be referred to as a high level. The flash conversion layer 1232 and the flash memory 1210 on the side of the flash storage device 1200 (see FIG. 2) may be referred to as a low level.

The application 1121 forwards the file delete request to the file system 1122. [ The file system 1122 changes the metadata of the file requested to be deleted. For example, the file system 1122 places 'E5h' in the file name (see FIG. 3). Therefore, when the application 1121 subsequently accesses the file, the file system 1122 provides information that the file has been deleted. The file deletion request of the application 1121 and the change of the metadata of the file system 1122 may be referred to as a 'delete operation at a high level'.

In order to substantially delete the data stored in the flash memory 1210, the file system 1122 provides a trim command (TRIM cmd) to the flash translation layer 1232. The trim command includes sector address (Sector ADDR) information for specifying a file requested to be deleted. The flash translation layer 1232 converts the sector address to a page address (Page ADDR) and marks the page of the flash memory 1210 to be erased as invalid.

The flash memory 1210 performs an erase operation on the page marked as invalid, for example, at idle time. For example, the idle time means that there is no request from the host 1100 (see FIG. 2) to the control unit 1230 (see FIG. 2). As is well known, the flash memory 1210 performs an erase operation on a block-by-block basis, so that an erase operation on a page of the flash memory 1210 is performed by copying and merge data, erase operation. The marking operation of the flash conversion layer 1232 and the erasing operation of the flash memory 1210 may be referred to as a " delete operation at a low level ".

5 is a block diagram illustrating the address translation operation of the flash translation layer 1232 in more detail. 5, the flash conversion layer 1232 receives a sector address (Sector ADDR), which is a logical address, and stores it in a page address (Page ADDR), which is a physical address on the flash memory 1210, .

The address translation of the flash translation layer 1232 may be performed through a mapping table. The mapping method includes a page mapping method and a block mapping method. The page mapping performs address conversion on a page basis (for example, 2 KB), and the block mapping method performs address conversion on a block basis (for example, 1 MB).

The address translation of the flash translation layer 1232 is a read operation, a write operation, and an erase operation performed in the actual flash memory 1210, as viewed from the high level application 1121 or the file system 1122 Thereby making the hard disk device look like a read operation and an erase operation. That is, the flash conversion layer 1232 performs an emulate function.

5, the flash translation layer 1232 may include a TRIM Manage Table. The trim management table manages the corresponding page separately when only a part of the data stored in the page is requested to be deleted. The deletion operation at the lower level using the mapping table and the trim management table will be described in more detail in Figs. 7 to 9 below.

Figure 6 is a block diagram illustrating an exemplary address translation through a mapping table. For the sake of brevity, it is assumed in FIG. 6 that the address translation through the page mapping scheme is performed.

Referring to FIG. 6, a mapping table maps a sector address (Sector ADDR), which is a logical address, to a page address (Page ADDR) that is a physical address. For convenience of explanation, it is assumed that four sectors are mapped to one page. For example, as shown in FIG. 6, the first to fourth sectors Sector1 to Sector4 are mapped to the third page (Page 3).

The mapping table indicates whether or not data stored in the page is valid data through write state information (WSI). For example, 'v' in the write status information (WSI) indicates that the data stored in the page is valid data.

The pages (Page0 to Page3) of the block 1211 of the flash memory 1210 are assumed to be divided into four sub pages (Sub_Page0 to Sub_Page3), respectively. The size of each subpage is the same as each sector, and each subpage is assumed to correspond to each sector. For example, as shown in FIG. 6, the third page (Page 3) is divided into four sub pages (Sub_Page0 to Sub_Page3), and four sub pages (Sub_Page0 to Sub_Page4) of the third page Are assumed to correspond to the first to fourth sectors Sector1 to Sector4, respectively.

7 to 9 for the sake of explanation, three files (File1 to File3) are valid data as shown in Fig. 6, and the first to third pages Page 3).

7 is a diagram illustrating an embodiment of the present invention for processing a trim command using only a mapping table without a trim management table. For the sake of brevity, it is assumed that a trim command (TRIM cmd) including the address information of the first file (File1) shown in Fig. 6 is provided. That is, it is assumed that there is a deletion request at the lower level with respect to the first file (File1).

Referring to FIG. 7, a trim command (TRIM cmd) is provided from host 1100. The trim command (TRIM cmd) contains the sector address of the file to be deleted. The information on the sector address may be provided as a starting sector number (Start Sector No) and a number of sectors (# of Sectors). For example, since the first file File1 corresponds to the first to fifth sectors Sector1 to Sector5, the starting sector number may be '1' and the number of sectors may be '5'.

When the trim command (TRIM cmd) is provided from the host 1100, the flash conversion layer 1232 (see FIG. 2) updates the writing status information (WSI) of the mapping table. That is, the writing state information (WSI) of the page corresponding to the transferred sector address is marked as invalid. Illustratively, the 'x' indication of the write status information (WSI) shown in FIG. 7 indicates that the data stored in the page is invalid.

More specifically, in FIG. 7, the first file (File1) corresponds to the first to fifth sectors (Sector1 to Sector5). In this case, since the first to fourth sectors (Sector1 to Sector4) of the first file (File1) correspond to the third page (Page 3), the writing status information WSI for the third page (Page 3) It is marked as invalid. In addition, since the fifth sector (Sector 5) of the first file (File1) corresponds to the second page (Page2), the writing status information (WSI) of the second page (Page2) is marked as invalid. Erase operations on the second and third invalid pages (Page 2, Page 3) are performed at the idle time of, for example, the control unit 1230 (see FIG. 2).

On the other hand, data corresponding to the fifth sector (Sector5) of the first file (File1) is stored in the subpage (0) of the second page (Page2) 3) stores data corresponding to the sixth to eighth sectors (Sector6 to Sector8) of the second file (File2).

Therefore, if the second page (Page 2) is updated to invalid by the trim command (TRIM cmd) for the first file (File 1), the valid data of the second file (File 2) can be deleted together. In order to prevent the data of the second file (File2) from being deleted, the flash memory 1210 stores the data stored in the subpages (1-3) of the second page (Page2) (Page of page 1212, see FIG. 2).

This copying operation can shorten the life of the flash memory 1210 due to an increase in the number of times of writing. In addition, a new page storing valid data generated through a copy operation may cause an increase in the merge operation to generate a free block. Accordingly, in order to solve such a problem, the flash storage device 1200 according to another embodiment of the present invention manages the second page (Page 2) separately using the trim management table. This will be described in more detail in Figs. 8 and 9 below.

8 and 9 illustrate an embodiment of the present invention for processing a trim command using a mapping table and a trim management table. For the sake of brevity, it is assumed that a trim command (TRIM cmd) including address information of the first file (File1) is provided as in Fig.

Referring to FIG. 8, the flash storage device 1200 processes a trim command (TRIM cmd) from the host 1100 using a mapping table and a TRIM Manage Table. The mapping table manages the page when the sector address transmitted from the host 1100 matches the page unit of the flash memory 1210. The trim management table manages the page when the sector address transmitted from the host 1100 does not match the page unit of the flash memory 1210.

More specifically, a trim command (TRIM cmd) including the sector address of the first file (File 1) is provided to the flash storage device 1200. In this case, the first to fourth sectors (Sector1 to Sector4) of the first file (File1) coincide with the page unit of the flash memory 1210. [ That is, the first to fourth sectors (Sector1 to Sector4) coincide with the third page (Page3). Thus, the flash translation layer 1232 (see FIG. 2) updates the write status information (WSI) for the third page (Page 3) of the mapping table to invalid.

On the other hand, the fifth sector (Sector 5) of the first file (File 1) does not coincide with the page unit of the flash memory 1210. That is, the fifth sector corresponds to only the subpage 0 of the subpages 0 to 3 of the second page Page2. In other words, among the data stored in the sub pages 0 to 3 of the second page (Page 2), only the data stored in the sub page (0) is invalid data.

In this case, the flash conversion layer 1232 maintains the write status information (WSI) for the second page (Page 2) of the mapping table as valid. Thus, an erase operation is not performed on the second page (Page 2) marked valid for the idle time (for example, the idle time of the control unit 1230), and an erase operation for the third page Only the erase operation is performed. On the other hand, the second page (Page 2) is managed separately by the trim management table.

The trim management table manages the second page (Page 2) separately. That is, the trim management table manages the page when the sector address delivered from the host 1100 does not match the page unit of the flash memory 1210. In other words, the trim management table manages pages that partially contain invalid data among the pages.

For example, referring to FIG. 8, since the fifth sector (Sector 5) corresponds to the subpage (0) of the second page, the data stored in the subpage (0) of the second page (Page 2) is invalid data. Therefore, the trim management table marks the writing status information (WSI) of the subpage (0) among the subpages (0 to 3) of the second page (Page 2) as invalid.

On the other hand, if all the sub pages of the page managed by the trim management table are updated to be invalid, the flash conversion layer 1232 updates the corresponding page of the mapping table to invalid. In this case, information on the page is deleted from the trim management table. This is explained in more detail with reference to Fig.

In FIG. 9, it is assumed that the trim instruction (TRIM cmd) including the sector address of the second file (File 2) is provided to the flash storage device 1200. That is, it is assumed that a deletion request at the lower level with respect to the second file (File2) is provided. In this case, since the second file (File2) corresponds to the sixth to eighth sectors (Sector6 to Sector8), the starting sector number may be '6' and the number of color gamers may be '3'.

When the trim command (TRIM cmd) for the second file (File 2) is provided, the sixth to eighth sectors (Sector 6 to Sector 8) of the second file (File 2) do not coincide with the page unit of the flash memory. That is, the sixth to eighth sectors (Sector6 to Sector8) correspond only to the subpages (1 to 3) among the subpages (0 to 3) of the second page (Page). Thus, the flash translation layer 1232 maintains the second page (Page 2) of the mapping table once valid. In this case, the second page (Page 2) is separately managed in the trim management table.

Since the sixth through eighth sectors Sector6 through Sector8 of the second file File2 correspond to the subpages 1 through 3 of the second page Page2, The write status information WSI of the subpages 1 to 3 is invalidated. In this case, the data stored in the sub page 0 of the second page (page 2) is already invalidated by the trim command for the first file (File1). Therefore, the data stored in the second page (Page 2) becomes ineffective by the trim command for the first and second files (File1, File2).

Since all the data stored in the second page (Page 2) is invalid, the flash conversion layer 1232 updates the write status information (WSI) for the second page (Page 2) of the mapping table to invalid. Therefore, an erase operation for the second page (Page 2) will be performed in a subsequent idle time (for example, the idle time of the control unit 1230 (see FIG. 2)). On the other hand, information on the second page (Page 2) is deleted from the trim management table.

As described above, the mapping table maintains the write state information of a page including a part of invalid data as once valid. Therefore, an operation for copying valid data stored in the page to a page of another block is not performed. This means that the merge operation caused by the copy operation of valid data can be prevented.

In this case, the trim management table manages a page including a part of invalid data. When all of the data stored in the page managed by the trim management table is in an invalid state, the writing state information of the mapping table for the page is updated to be invalid. Therefore, the flash memory can perform the erase operation at the lower level only for the sector address coinciding with the page unit among the sector addresses transferred from the host.

Meanwhile, the size of the memory allocated to the trim management table in the buffer memory 1220 (see FIG. 2) may be limited by the designer. In this case, the size of the information about the page address to be managed in the trim management table may exceed the size allocated to the buffer memory 1220. [

When the size of the information about the page to be managed in the trim management table exceeds the size allocated to the buffer memory 1220, the information about the page managed in the trim management table can be managed by the push method. That is, the information on the oldest page among the information on the pages managed in the trim management table is deleted, and the information on the newly requested page can be managed.

For example, it is assumed that information on the first page, the second page, and the third pages (Page1, Page2, Page3) is managed in the trim management management table. When the information about the fourth page (Page 4) belonging to another block is to be managed in the trim management table and the information about the fourth page (Page 4) is managed, the size of the information about the page to be managed in the trim management table Is larger than the size of the area allocated to the trim management table. In this case, the flash conversion layer 1232 deletes information on the oldest first page (Page 1) from the trim management table, and manages information on the fourth page (Page 4) in the trim management table.

FIG. 10 is a flowchart showing the erasing operation at a lower level of the flash storage device 1200 of FIG.

In step S11, a trim command (TRIM cmd) is provided to the flash storage device 1200 from the host 1100 (see FIG. 2). The trim command includes information (for example, sector address information) designating an area in which an erase operation is to be performed among the areas of the flash memory 1210 (see FIG. 2).

In step S12, the mapping table and the TRIM Manage Table of the flash conversion layer 1232 (see FIG. 2) are updated. For example, when the sector address transmitted from the host 1100 matches the page unit of the flash memory 1210, the writing state information WSI of the mapping table for the page is displayed as invalid. As another example, if the sector address delivered from the host 1100 does not match the page unit of the flash memory 1210, the write state information (WSI) of the mapping table for that page is marked as valid, Managed by the management table.

In step S13, an erase operation according to the mapping table is performed. That is, when the writing state information WSI of the mapping table is in an invalid state, the erasing operation for the page is performed. However, as is well known, since the erase operation of the flash memory is performed on a block-by-block basis, the flash memory may involve copying and / or merging operations on the page.

11 is a flow chart showing the operation of the flash transform layer 1232 (see FIG. 2) when a delete operation at a lower level is performed.

In step S110, the sector address (Sector ADDR) of the file to be deleted is transferred to the flash conversion layer 1232. [ For example, the sector address is provided as a sector start number (Start Sector No) and the number of sectors (# of Sectors).

In step S120, it is determined whether the transferred sector address is a partial sector address (Partial Sector ADDR). Here, the partial sector address (partial sector ADDR) means a sector address which does not coincide with the page unit of the flash memory 1210 (see FIG. 2).

If the transferred sector address is not a partial sector address (that is, the transferred sector address matches the page unit), the flash conversion layer 1232 updates the writing state information (WSI) of the mapping table (Step S130). That is, the writing state information (WSI) of the page corresponding to the transferred sector address is updated to be invalid. If the received sector address is a partial sector address (that is, if the received sector address does not coincide with the page unit), step S140 is performed.

In step S140, it is determined whether or not a trim management table (TRIM Manage Table) corresponding to the partial sector address (partial sector address) exists. If the trim management table does not exist, the flash conversion layer 1232 generates a trim management table for managing the page corresponding to the partial sector address (step S150).

If the trim management table exists, the flash conversion layer 1232 updates the write status information (WSI) of the trim management table (step S160). That is, the writing state information of the subpage corresponding to the partial sector address is updated to be invalid.

In step S170, it is determined whether or not all the write status information of the trim management table has been updated. That is, it is determined whether or not all of the write status information on the sub pages of the predetermined page are updated to be invalid. If all the write status information is updated to be invalid, the flash translation layer 1232 updates the write status information of the mapping table (step S180). That is, the writing state information of the mapping table for the page is updated to be invalid.

As described above, the flash memory system 1000 according to the embodiment of the present invention supports the TRIM operation. That is, when there is a deletion request for a predetermined file, the host 1100 changes the metadata of the file system 1122 to notify the user that the file has been deleted, and the actual deletion operation is performed in response to the Trim command (TRIM cmd) Is performed in the storage device 1200.

In this case, the flash storage device 1200 eliminates the inconsistency of management units between the host 1100 and the flash storage device 1200 using the TRIM Manage Table. Accordingly, the flash storage device 1200 can prevent a copy operation of data stored in a page caused by a mismatch of management units. As a result, the shortening of the life of the flash storage device 1200 and deterioration of performance can be prevented.

In the above description, it is assumed that data of the files (File1 to File3) are stored in pages of the flash memory 1210. [ However, it should be understood that this is an example. For example, when the flash storage device 1200 supports a flush operation, the data of the files (File1 to File3) may be stored in the buffer memory 1220 (see FIG. 2). Hereinafter, a method of processing the Trim command according to another embodiment of the present invention will be described in detail when the flash storage device 1200 supports the flush operation.

Ⅲ. Flash storage device with flush function

12 to 14 are block diagrams for explaining a method of processing a trim command of a flash storage device when the flash storage device supports the flush function. The flash storage device described below is similar to the flash storage device 1200 of FIG. 2, except that it supports a flush operation. Therefore, in the following, the same components are described using the same reference numerals.

12 is a block diagram showing the address translation between the buffer memory 1220 and the flash memory 1210 via the mapping table. For convenience of explanation, it is assumed that the size of each sector of the buffer memory 1220 is the same as a sector that is a management unit of the file system 1122 (see FIG. 2).

Referring to FIG. 12, the buffer memory 1220 includes a plurality of sectors. Sectors of the buffer memory 1220 temporarily store data. The data stored in the sectors of the buffer memory 1220 is written to the pages of the block 1211 of the flash memory 1210 under the control of the control unit 1230 (see FIG. 2). The operation of writing some or all of the data stored in the sectors of the buffer memory 122 to the pages of the flash memory 1210 may be referred to as a 'flush operation'.

For example, some or all of the data stored in the sectors of the buffer memory 1220 may be written to pages of the flash memory 1210 when the buffer memory 1220 has insufficient free space. In another example, some or all of the data stored in the sectors of the buffer memory 1220 may be flashed in the idle time of the control unit 1230 (see FIG. 2) (when there is no request from the host 1100 (see FIG. 2) May be written to the pages of memory 1210.

Pages (Page0 to Page3) of the block 1211 of the flash memory 1210 are divided into four sub pages (Sub_Page0 to Sub_Page3), respectively. It is assumed that the size of each sub page of the flash memory 1210 is equal to the size of the sector of the buffer memory 1220. That is, it is assumed that four sectors correspond to one page.

The mapping table maps the sector address of the buffer memory 1220 to the page address (Page ADDR) of the flash memory 1210. The symbol 'BSA' in the mapping table shown in FIG. 12 indicates the sector address of the buffer memory. For example, the first to fourth sectors (Sector1 to Sector4) of the buffer memory 1220 are mapped to the third page (Page 3) of the flash memory 1210. For convenience of explanation, it is assumed that three files (File1 to File3) are stored as valid data in the sectors S1 to S12 of the buffer memory 1220.

When the flash memory device 1200 according to the embodiment of the present invention is provided with the trim command TRIM cmd from the host 1100, the data of the file requested to be deleted is written from the buffer memory 1220 to the flash memory 1210 Is invalidated. That is, the flash storage device 1200 updates the writing state information (WSI) of the mapping table, thereby preventing the data stored in the buffer memory 1220 from being written to the flash memory 1210.

The operation of preventing data from being written from the buffer memory 1220 to the flash memory 1210 may be referred to as an " unwrite operation ". In this case, the address information included in the Trim command designates the area to be written and held. Therefore, in this case, the Trim command may be referred to as a " write-back copending command ". In the following Figs. 13 and 14, embodiments of the present invention for performing a write-back operation will be described in more detail.

13 is a diagram illustrating an embodiment of the present invention for processing a trim command using only a mapping table without a trim management table. For the sake of brevity, it is assumed that a trim command (TRIM cmd) including the sector address information of the first file (File1) is provided. It is also assumed that the sector address provided from the host 1100 and the sector address of the buffer memory 1220 are the same.

Referring to FIG. 13, a trim command (TRIM cmd) is provided from the host 1100. The trim command (TRIM cmd) contains the sector address of the file to be deleted. The information on the sector address may be provided as a starting sector number (Start Sector No) and a number of sectors (# of Sectors). For example, since the data of the first file File1 is stored in the first to fifth sectors S1 to S5 of the buffer memory 1220, the starting sector number is '1', and the number of sectors is '5' ≪ / RTI >

When the trim command (TRIM cmd) is provided from the host 1100, the flash conversion layer 1232 (see FIG. 2) updates the writing status information (WSI) of the mapping table. That is, the flash conversion layer 1232 marks the write status information (WSI) of the page corresponding to the sectors of the buffer memory 1220 requested to be written back as invalid. For example, since the data of the first file (File1) is stored in the first to fifth sectors (S1 to S5) of the buffer memory 1220, the flash conversion layer 1232 stores the first to fifth sectors The writing state information WSI of the mapping table corresponding to S1 to S5 is marked as invalid.

In this case, the first to fourth sectors S1 to S4 of the buffer memory 1220 correspond to the third page (Page 3), and the fifth sector (S5) corresponds to the second page (Page 2). Therefore, the writing status information (WSI) for the second and third pages (Page 2, Page 3) of the mapping table is marked as invalid. The second and third pages (Page 2, Page 3) marked invalid are not flushed afterwards. That is, the data stored in the first to eighth sectors S1 to S8 of the buffer memory 1220 are not written to the first and second pages (Page1, Page2) of the flash memory 1210. [

On the other hand, the data of the second file (File2) is stored in the sixth to eighth sectors (S6 to S8) of the buffer memory 1220. Therefore, if the second page (Page 2) is marked as invalid by the trim command (TRIM cmd) for the first file (File 1), valid data of the second file (File 2) is written to the flash memory 1210 It may not. This means that if the buffer memory 1220 is a volatile memory (for example, DRAM (DRAM)), the data of the second file (File2) may be lost.

In order to solve this problem, the flash storage device 1200 according to another embodiment of the present invention separately manages the second page (Page 2) using the trim management table. This is explained in more detail in Fig. 14 below.

14 is a diagram illustrating an embodiment of the present invention for processing a trim command using a mapping table and a trim management table. For the sake of brevity, it is assumed that a trim command (TRIM cmd) including address information of the first file (File1) is provided as in Fig.

Referring to FIG. 14, the flash storage device 1200 processes a trim command (TRIM cmd) from the host 1100 using a mapping table and a TRIM Manage Table.

More specifically, a trim command (TRIM cmd) including the sector address of the first file (File 1) is provided to the flash storage device 1200. That is, the flash memory device 1200 is provided with a write-back instruction for the data stored in the first to fifth sectors S1 to S5 of the buffer memory 1220.

In this case, the first to fourth sectors S1 to S4 coincide with page units of the flash memory 1210. That is, the first to fourth sectors S1 to S4 coincide with the third page (Page 3). Thus, the flash translation layer 1232 (see FIG. 2) updates the write status information (WSI) for the third page (Page 3) of the mapping table to invalid.

On the other hand, the fifth sector S5 does not coincide with the page unit of the flash memory 1210. That is, the fifth sector S corresponds only to the subpage 0 of the subpages 0 to 3 of the second page (Page 2). In this case, the flash conversion layer 1232 maintains the write status information (WSI) for the second page (Page 2) of the mapping table as valid. Therefore, the data stored in the fifth to eighth sectors (S5 to S8) marked valid at the idle time is written to the second page (Page 2). On the other hand, the second page (Page 2) partially contains invalid data, so that the second page (Page 2) is separately managed in the trim management table.

14, the trim management table manages the subpages of the second page and the second page. That is, since the data stored in the subpage (0) of the subpages (0 to 3) of the second page (Page 2) is invalid data, the trim management table can not invalidate the write status information (WSI) .

On the other hand, a trim command for the second file (File2) may be provided before the flush operation for the data stored in the first to fourth sectors S1 to S4 is performed. 12, the second file (File2) is stored in the sixth to eighth sectors S6 to S8 of the buffer memory 1220, and the sixth to eighth sectors S6 to S8 are stored in the sixth (1 to 3) of the second page (Page 2).

Therefore, when a trim command for the second file (File2) is provided, all the subpages (0 to 3) of the second page (Page2) of the trim management table are updated to be invalid. In this case, the flash conversion layer 1232 updates the writing status information (WSI) of the second page (Page 2) of the mapping table to invalid. As a result, when the flush operation is performed after this, the data stored in the first to eighth sectors S1 to S8 may not be written to the flash memory 1210.

15 is a flowchart showing a write-back coping operation of the flash storage device 1200 according to an embodiment of the present invention.

In step S21, the host 1100 provides the flash storage device 1200 with the trim command TRIM cmd. The Trim command includes address information of a sector of the buffer memory 1220 that is not to be written to the flash memory 1210. Thus, the trim command (TRIM cmd) may be referred to as an " unwrite command ".

In step S22, the mapping table and the TRIM Manage Table of the flash conversion layer 1232 are updated. For example, when the sector address included in the Trim command matches the page unit of the flash memory 1210, the writing state information (WSI) of the mapping table for the page is displayed as invalid. As another example, if the sector address included in the Trim command does not match the page unit of the flash memory 1210, the write status information (WSI) of the mapping table for the page is displayed as valid, Lt; / RTI >

In step S23, an unwrite operation according to the mapping table is performed. That is, when the writing state information (WSI) of the mapping table is invalid, the data stored in the sectors of the buffer memory is not written to the page of the flash memory 1210. On the other hand, the writing state information (WSI) of the mapping table and the trim management table is updated in the same manner as the description of FIG. 11, so that detailed description is omitted.

As described above, the flash memory system 1000 according to the embodiment of the present invention supports an unwrite operation. In this case, the flash storage device 1200 eliminates the inconsistency of management units between the host 1100 and the flash storage device 1200 using the TRIM Manage Table. Accordingly, the flash storage device 1200 can prevent valid data in the buffer memory 1220, which is generated due to the mismatch of management units, from being written and snapped.

Meanwhile, the flash storage device 1200 may receive a plurality of trim commands from the host 1100 with a time difference. In this case, flash storage 1200 may collect trim commands and process the collected trim commands at idle time at a time. This will be described in more detail in Figs. 16 to 18 below.

IV. Flash storage devices that collect trim commands

Figures 16-18 illustrate a flash storage device collecting trim commands provided at different times and processing the collected trim commands at one time. Except for collecting trim commands, the flash storage device described below is similar to flash storage device 1200 of FIG. Therefore, the differences from the flash memory device 1200 of FIG. 2 will be mainly described below. Further, the same components are described using the same reference numerals.

16, first to third trim commands TRIM cmd_1 to TRIM cmd_3 are provided to the control unit 1230 of the flash storage device 1200. It is assumed that the first to third trim commands (TRIM cmd_1 to TRIM cmd_3) are provided to the control unit 1230 at different times, respectively.

Buffer memory 1220 includes a TRIM Collection Area for collecting the provided trim commands. The control unit 1230 temporarily stores the first to third trim commands TRIM cmd_1 to TRIM cmd_3 in the trim collection area of the buffer memory 1220 and then sets the idle time of the control unit (TRIM cmd_1 to TRIM cmd_3) collected at the time when no request is received from the control unit 1100).

More specifically, the central processing unit 1231 of the control unit 1230 analyzes the command received. When the received command is a Trim command, the central processing unit 1231 sends the information included in the Trim command (e.g., Start Sector Number and # of Sectors) to the buffer controller 1234 To the buffer controller 1220. The buffer controller 1234 stores the information contained in the trim command in the TRIM Collection Area of the buffer memory 1220. The flash storage device 1232 then stores the trim The mapping table and the TRIM Manage Table are updated using the information stored in the command collection area.

17 is a flow chart showing the operation of storing a plurality of Trim commands in a buffer memory.

In step S31, a trim command (TRIM_cmd) is received in the control unit 1230 (see Fig. 16). In step S32, the control unit 1230 stores the information of the received trim command TRIM_cmd in the TRIM collection area of the buffer memory 1220. [ On the other hand, if another Trim command is subsequently received, the control unit 1230 continues to store the information contained in the Trim command in the Trim Collection area.

18 is a flow chart showing the operation of processing the collected trim commands in idle time.

In step S41, a trim command processing signal (TCP) is generated. For example, when there is no command from the host 1100 (see FIG. 2) for a predetermined time, the central processing unit 1231 of the control unit 1230 generates the trim command processing signal TCP.

In step S42, the mapping table and the TRIM Manage Table are updated. For example, the flash translation layer 1232 (see FIG. 2) requests information collected in the TRIM Collection Area to the buffer controller 1234 (see FIG. 2) in response to the trim command processing signal TCP do.

The buffer controller 1234 passes information to the flash translation layer 1232 about the trim commands collected in the trim collection area of the buffer memory 1220. The flash conversion layer 1232 updates the mapping table and the TRIM Manage Table using the transferred information. The updating of the writing state information (WSI) of the mapping table and the trim management table is similar to the description of FIG. 11, and a detailed description thereof will be omitted.

As described above, the flash storage device 1200 according to the embodiment of the present invention collects information on the Trim commands in the buffer memory 1220, and can process the Trim commands in an idle time at a time. Thus, the flash storage device 1200 may save time for processing trim commands.

2 to 18, it is assumed that the flash storage device 1200 includes one flash memory. However, it should be noted that the technical idea of the present invention is not limited thereto. For example, the flash storage device 1200 may include a plurality of flash memories. In the following Figs. 19 to 23, a flash storage device including a plurality of flash memories will be described in more detail.

Ⅴ. A flash storage device comprising a plurality of flash memories

19 to 23 are block diagrams illustrating a method of processing a trim instruction of a flash storage device in a case where the flash storage device includes a plurality of flash memories. The flash storage device described below is similar to the flash storage device of FIGS. 2 and 16. FIG. Therefore, the differences between the flash storage device of FIGS. 2 and 16 will be mainly described below. Further, the same components are described using the same reference numerals.

Flash storage device 1200 may include a plurality of flash memories. 16, the flash storage device 1200 may collect information of the trim commands. The flash storage device 1200 according to an embodiment of the present invention can reset the order of the collected trim commands and process the trim commands according to the reset order. Thus, the flash storage device 1200 may process the trim commands in parallel for a plurality of flash memories.

19 is a block diagram illustrating an exemplary flash storage device 1200 including a plurality of flash memories. In FIG. 19, by way of example, it is assumed that the flash storage device 1200 has two flash memories 1210 and 1240.

19, a first flash memory 1210 is connected to a control unit 1230 via a first channel CH1 and a second flash memory 1240 is connected to a control unit 1230 via a second channel CH2 1230, respectively. For convenience of explanation, it is assumed that each flash memory has four pages.

Buffer memory 1220 includes a TRIM Collection Area, as described in FIG. The trim collection area stores information about a plurality of trim commands. That is, if a plurality of trim commands are provided, the control unit 1230 stores information about the trim commands in the trim collection area. Since this has been described in detail with reference to FIGS. 16 to 18, detailed description is omitted.

The control unit 1230 includes a trim order resetting module 1235. The trim order reset module 1235 resets the processing order of the trim commands stored in the trim collection area. That is, the trim order reordering module 1235 adjusts the processing order of the trim instructions stored in the trim gather area so that the trim instructions are executed in parallel with the first and second flash memories 1210 and 1240. [ By resetting the processing order of the Trim commands, the flash storage device 1200 can shorten the time to process Trim commands.

On the other hand, the control unit 1230 includes a central processing unit 1231, a flash conversion layer 1232, a flash controller 1233, and a buffer controller 1234. Since this is detailed in FIG. 2, detailed description is omitted.

20 to 22 are diagrams for explaining resetting of the processing order of the trim command for processing of the parallel trim command. For the sake of brevity, it is assumed that the first to fourth trim instructions (TRIM cmd_1 to TRIM cmd_4) are sequentially provided. It is also assumed that the sector address included in each trim instruction coincides with the page unit of the flash memory.

20, information included in the first through fourth trim commands TRIM cmd_1 through TRIM cmd_4 (e.g., a start number and a number of sectors # of Sectors) And is stored in the TRIM Collection Area of the memory 1220. In this case, the trim collection area also stores the processing order (POT, Processing Order of TRIM) of the trim command. As shown in Fig. 20, the processing order of the initial trim command is assumed to be the order in which the trim commands are provided.

20, the first and second trim commands TRIM cmd_1 and TRIM cmd_2 correspond to pages (Page7, Page5) of the second flash memory 1240, and the third and fourth trim The commands TRIM cmd_3 and TRIM cmd_4 correspond to the pages (Page 3, Page 1) of the first flash memory 1210. Thus, if the first through fourth trim commands TRIM cmd_1 through TRIM cmd_4 are processed sequentially, the first and second trim commands TRIM cmd_1 and TRIM cmd_2 for the second flash memory 1240 are processed, Thereafter, the third and fourth trim instructions TRIM cmd_3, TRIM cmd_4 for the first flash memory 1210 are processed.

This processing of the Trim command may result in degraded performance of flash storage 1200. That is, for example, while the second flash memory 1240 performs an erase operation on the fifth and seventh pages (Page5, Page7), the first flash memory 1210 may perform no operation . This means that the trim processing time is increased. In order to prevent the inefficiency of such a trim instruction process, the flash storage device 1200 according to the embodiment of the present invention resets the processing order (POT) of the Trim instruction so as to process the Trim instruction in parallel.

21, the trim resetting module 1235 refers to the mapping table to set the processing order (POT) of the trim command as the first trim command (TRIM cmd_1), the third trim command (TRIM cmd_3) 2 trim command (TRIM cmd_2), and the fourth trim command (TRIM cmd_4).

Thus, as shown in Fig. 22, while the processing for the first trim command (TRIM cmd_1) is performed for the second flash memory 1240, the processing for the third trim command (TRIM cmd_3) For example, during the erase operation on the seventh page (Page 7) of the second flash memory 1240, the third page of the first flash memory 1210 The erasing operation for the page (page 3) can be performed in parallel.

Similarly, while processing for the second trim command (TRIM cmd_2) is performed for the second flash memory 1240, processing for the fourth trim command (TRIM cmd_4) is performed for the first flash memory 1210 .

On the other hand, the above-described method of determining the processing order (POT) of the trim command is an exemplary one, and the technical idea of the present invention is not limited thereto. For example, the processing order of the TIM command (POT) can be determined in consideration of the operating state of each flash memory. For example, if a write operation (or a read operation) is being performed on the second flash memory 1240, the processing order of the tree command (POT) is set such that processing of the tree command is preferentially performed on the first memory 1210. [ ) Can be determined.

23 is a flowchart showing a method of processing a Trim command of the flash storage device 1200 including a plurality of flash memories.

In step S51, a trim command process signal (TCP) is generated. For example, when there is no request from the host 1100 (see FIG. 2) for a predetermined time, the central processing unit 1231 of the control unit 1230 generates the trim command processing signal TCP.

In step S52, the processing order (POT) of the trim commands stored in the TRIM collection area is reset. For example, the trim order reset module 1235 (see FIG. 19) resets the processing order (POT) of the trim instructions so that the trim instructions are executed in parallel for the plurality of flash memories. In this case, for example, the trim order reset module 1235 can refer to the mapping table to reset the processing order (POT) of the trim commands. As another example, the trim order reset module 1235 may reset the processing order (POT) of the Trim commands in view of the operating state of each flash memory. In this case, for example, the trim order resetting module 1235 may be configured to process the trim command corresponding to the first flash memory 1210 while a write operation (or a read operation) is performed in the second flash memory 1240, (POT) of the Trim commands.

In step S53, the mapping table and the TRIM Manage Table of the flash conversion layer 1232 (see FIG. 19) are updated. For example, the flash translation layer 1232 requests information collected in the TRIM Collection Area to the buffer controller 1234 (see FIG. 2) in response to the trim command processing signal TCP.

The buffer controller 1234 passes information to the flash translation layer 1232 about the trim commands collected in the trim collection area of the buffer memory 1220. The flash conversion layer 1232 updates the mapping table and the TRIM Manage Table using the transferred information. The updating of the writing state information (WSI) of the mapping table and the trim management table is similar to the description of FIG. 11, and a detailed description thereof will be omitted.

In step S54, an erase operation for the area marked invalid by the Trim command is requested in parallel to the plurality of flash memories. For example, the flash controller 1233 (see FIG. 19) requests an erase operation for a plurality of flash memories in accordance with the processing order (POT) of the reset trim commands and the updated mapping table. In this case, since the processing order (POT) of the Trim commands has been reset, the erase operation can be performed in parallel to the plurality of flash memories.

As described above, when the flash memory storage 1200 according to the embodiment of the present invention includes a plurality of flash memories, the processing order of the Trim commands can be reset. Thus, the processing of the Trim command can be performed in parallel for a plurality of flash memories. As a result, the processing time of the trim command can be shortened.

VI. Example of application of flash memory system that processes trim command

The flash memory system 1000 according to the embodiment of the present invention can be applied to or applied to various products. The host 1100 may be a computer, a digital camera, a mobile phone, an MP3 player, a PMP, a game machine, or the like. The flash storage device 1200 may be a solid state drive (SSD) based on a flash memory, a flash memory card, or a flash memory module. The host 1100 and the flash storage device 1200 may be connected through a standardized interface such as ATA, SATA, PATA, USB, SCSI, ESDI, PCI express or IDE interface.

FIG. 24 shows an example in which the flash memory system 1000 according to the embodiment of the present invention is applied to a memory card. The memory card system 2000 includes a host 2100 and a memory card 2200. The host 2100 includes a host controller 2110 and a host connection unit 2120. The memory card 2200 includes a card connection unit 2210, a card controller 2220, and a flash memory 2230.

The host connection unit 2120 and the card connection unit 2210 are composed of a plurality of pins. These pins include a command pin, a data pin, a clock pin, and a power pin. The number of pins varies depending on the type of the memory card 2200. As an example, the SD card has nine pins.

The host 2100 writes data to the memory card 2200 or reads data stored in the memory card 2200. The host controller 2110 receives a command (for example, a write command), a clock signal CLK generated in a clock generator (not shown) in the host 2100, and data DAT via the host connection unit 2120 To the memory card 2200.

The card controller 2220 responds to the write command received via the card connection unit 2210 to send data to the memory 2230 in synchronization with the clock signal generated in the clock generator (not shown) . The memory 2230 stores the data transmitted from the host 2100. For example, when the host 2100 is a digital camera, it stores image data.

24, the host controller 2110 may include an application program and a file system for supporting a trim operation. The card controller 2220 may then process the trim command within the memory card 2200 using the flash translation layer. The memory card system shown in Fig. 24 can support both the trim operation and the flush function described above.

FIG. 25 shows an example in which a trim command processing technique according to an embodiment of the present invention is applied to a solid state drive (SSD). Referring to FIG. 25, the SSD system 3000 includes a host 3100 and an SSD 3200. The SSD 3200 exchanges signals with the host 3100 through a signal connector 3231 and receives power via a power connector 3221. The SSD 3200 includes a plurality of nonvolatile memory devices 3201 to 320n, an SSD controller 3210, and an auxiliary power supply 3220.

A plurality of nonvolatile memory devices 3201 to 320n are used as a storage unit of the SSD 3200. The plurality of nonvolatile memory devices 3201 to 320n may be implemented as a flash memory device having a large storage capacity. The SSD 3200 mainly uses a flash memory.

The plurality of nonvolatile memory devices 3201 to 320n may be connected to the SSD controller 3210 through a plurality of channels CH1 to CHn. One channel may be connected to one or more memory devices. The memory devices connected to one channel can be connected to the same data bus. At this time, the flash defragmentation may be performed in the form of a super block connecting a plurality of memory blocks together, or may be performed in the form of a super page connecting a plurality of pages together.

The SSD controller 3210 exchanges the signal SGL with the host 3100 via the signal connector 3231. [ Here, the signal SGL may include a command, an address, data, and the like. The SSD controller 3210 writes data to the memory device or reads data from the memory device according to a command of the host 3100. [ The internal configuration of the SSD controller 3210 will be described in detail with reference to FIG.

The auxiliary power supply 3220 is connected to the host 3100 through a power supply connector 3221. [ The auxiliary power supply device 3220 receives power from the host 3100 and can charge the power supply PWR. Meanwhile, the auxiliary power supply 3220 may be located within the SSD 3200 or outside the SSD 3200. For example, the auxiliary power supply 3220 is located on the main board and may provide auxiliary power to the SSD 3200.

26 is a block diagram illustrating an exemplary configuration of the SSD controller 3210 shown in FIG. Referring to FIG. 26, the SSD controller 3210 includes an NVM interface 3211, a host interface 3212, an ECC 3213, a central processing unit (CPU) 3214, and a buffer memory 3215.

The NVM interface 3211 scatters the data transferred from the buffer memory 3215 to each of the channels CH1 to CHn. The NVM interface 3211 transfers the data read from the nonvolatile memory devices 3201 to 320n to the buffer memory 3215. Here, the NVM interface 3211 can use the interface method of the NAND flash memory. That is, the SSD controller 3210 can perform a program, read, or erase operation according to the NAND flash memory interface scheme.

Host interface 3212 provides interfacing with SSD 3200 in correspondence with the host 3100 protocol. The host interface 3212 is connected to the host (host) 3212 using a universal serial bus (USB), a small computer system interface (SCSI), a PCI express, ATA, PATA (Parallel ATA), SATA (Serial ATA) 3100). The host interface 3212 may perform a disk emulation function to allow the host 3100 to recognize the SSD 3200 as a hard disk (HDD).

The central processing unit 3214 analyzes and processes the signal SGL input from the host 3100 (see Fig. 19). The central processing unit 3214 controls the host 3100 or the nonvolatile memories 3201 to 320n through the host interface 3212 or the NVM interface 3211. [ The central processing unit 3214 controls the operation of the nonvolatile memory devices 3201 to 320n according to the firmware for driving the SSD 3200.

The buffer memory 3215 temporarily stores write data provided from the host 3100 or data read from the nonvolatile memory device. The buffer memory 3215 may store metadata or cache data to be stored in the nonvolatile memory devices 3201 to 320n. During the sudden power-off operation, the metadata and the cache data stored in the buffer memory 3215 are stored in the nonvolatile memory devices 3201 to 320n. The buffer memory 3215 may include DRAM, SRAM, and the like.

The solid state drive 3000 shown in Figs. 25 and 26 can support both the trim operation and the flush function described above.

FIG. 27 is a block diagram illustrating an example of implementing a trim instruction processing technique in a flash memory module according to an embodiment of the present invention. Referring to FIG. Here, the flash memory module 4100 can be used in connection with a personal computer (PC), a notebook computer, a mobile phone, a PDA (Personal Digital Assistant), and a camera.

Referring to Figure 27, the flash memory module 4000 includes a memory system 4100, a power supply 4200, an auxiliary power supply 4250, a central processing unit 4300, a RAM 4400, and a user interface 4500, . The flash memory module 4000 shown in Fig. 27 can support both the trim operation and the flush function as described above.

In the above description, the host 1100 (see FIG. 2) manages a file in units of sectors, and the flash storage 1200 (see FIG. 2) ≪ / RTI > 1210). However, it should be understood that this is an example.

For example, the host 1100 may manage a file on a cluster basis, and the flash storage device 1200 may be a block unit or a super page unit, which is a set of a plurality of pages, The data stored in the memory 1210 can be managed. The management unit of the host 1100 and the flash storage device 1200 may be variously defined by a designer or a data management protocol.

Further, in the above description, it is assumed that the trim management table is stored in the buffer memory 1220 (see FIG. 2). When the buffer memory 1220 is implemented as a volatile memory (e.g., a DRAM), information on the trim management table may be lost due to sudden power off or the like. In this case, since the information on the area managed in the trim management table has been deleted at a high level, the user can be provided with the information that the corresponding data has been deleted regardless of the loss of information related to the trim management table. On the other hand, it goes without saying that the trim management table can be stored in a nonvolatile memory (for example, a flash memory).

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be determined by the equivalents of the claims of the present invention as well as the claims of the following.

100: memory system 1000: flash memory system
1100: host 1200: flash storage device
2000; Memory card system 3000; SSD system
4000; Flash memory module
TRIM cmd: Trim command Sector ADDR: Sector address
Page ADDR: Page address Sub_Page ADDR: Subpage address
WSI: Write status information BSA: Sector address of buffer memory
POT: Processing order of Trim commands

Claims (30)

A data management method for a data storage device including a nonvolatile memory and a controller,
Receiving from the external apparatus a sector address range for a first file which is stored in the first data management unit of the nonvolatile memory and a part of the second data management unit and is no longer needed by the external apparatus;
Invalidating the first write status information corresponding to the first data management unit among the write status information of the mapping table;
Managing validity of second write status information corresponding to the second data management unit among write status information of the mapping table; And
Management of a sub-management unit in which the first file is stored among the plurality of sub-management units of the second data management unit in the trim management table,
Wherein the size of the first data management unit is equal to or an integer multiple of the size of the data management unit of the data storage device, and the plurality of sub management units Each size being smaller than a data management unit of the data storage device,
Wherein data of a sub management unit stored in the second data management unit is accessible by the external device when data of the sub management unit in which the first file is stored is requested from the external device. The method according to claim 1,
Wherein the size of the data management unit of the data storage device is larger than the size of the data management unit of the external device. 3. The method of claim 2,
Wherein the size of the data management unit of the external device is a sector size, the size of the data management unit of the data storage device is a page size including a plurality of sub pages, and the size of each of the sub pages corresponds to the sector size , Data management method. The method of claim 3,
Wherein the mapping table includes first write status information indicating whether or not a data management unit of the data storage device is valid. 5. The method of claim 4,
Wherein the trim management table includes second write status information for managing the second data management unit in the sub management unit,
Wherein the sub-management unit corresponds to at least one of a plurality of sub-pages included in the second data management unit, and does not correspond to all sub-pages. 6. The method of claim 5,
Wherein the sub management units other than the sub management in which the first file is stored among the plurality of sub management units included in the second data management unit are managed as valid in the trim management table. The method according to claim 6,
Wherein the nonvolatile memory includes a plurality of memory blocks in which an erase operation is performed independently of each other, wherein a first memory block of the plurality of memory blocks includes the first data management unit and the second data management unit, Unit,
The data management method includes:
Copying the data stored in the second data management unit from the first memory block to the second memory block; And
And erasing data of the first data management unit stored in the first memory block. 6. The method of claim 5,
Until the second write status information corresponding to all the sub management units of the second data management unit among the second write status information of the trim management table is marked as invalid, A data management method that remains valid in the table. The method according to claim 6,
Wherein the nonvolatile memory stores data for a second file in at least one of a plurality of sub-management units of the second data management unit,
The data management method includes:
Receiving from the external apparatus a sector address range of the second file which is no longer needed by the external apparatus;
Marking all of the plurality of sub-management units included in the second data management unit in the trim management table as invalid; And
And invalidating the first write status information corresponding to the second data management unit in the mapping table. delete A data management method for a data storage device,
The data storage device includes a nonvolatile memory, a buffer for temporarily storing data for a first file to be stored in the first data management unit of the nonvolatile memory and a part of the second data management unit, And a controller for controlling the buffer,
Receiving from the external device a sector address range for the first file that is no longer needed by the external device;
Invalidating the write status information corresponding to the first data management unit among the write status information of the mapping table;
Managing validity of write status information corresponding to the second data management unit among write status information of the mapping table; And
Managing a sub-management unit in which the first file is stored among the plurality of sub-management units of the second data management unit, in the trim management table; And
Writing the data corresponding to the second data management unit effectively managed in the mapping table to the nonvolatile memory in response to the flush request,
Wherein the size of the first data management unit is equal to or an integer multiple of the size of the data management unit of the data storage device, and the plurality of sub management units Each size being smaller than a data management unit of the data storage device. Claim 12 is abandoned in setting registration fee. 12. The method of claim 11,
Wherein the size of the data management unit of the data storage device is larger than the size of the data management unit of the external device, the size of the data management unit of the external device is the sector size, The size of each of the sub-pages corresponds to the size of the sector. Claim 13 has been abandoned due to the set registration fee. 13. The method of claim 12,
Wherein the mapping table includes first write status information indicating whether a data management unit of the data storage device is valid,
Wherein the trim management table includes second write status information for managing the second data management unit in the sub management unit,
Wherein the sub-management unit corresponds to at least one of a plurality of sub-pages included in the second data management unit, and does not correspond to all sub-pages. Claim 14 has been abandoned due to the setting registration fee. 14. The method of claim 13,
Wherein the sub management units other than the sub management unit in which the first file is stored among the plurality of sub management units included in the second data management unit are managed as valid in the trim management table. Claim 15 is abandoned in the setting registration fee payment. 15. The method of claim 14,
Until the second write status information corresponding to all the sub management units of the second data management unit among the second write status information of the trim management table is marked as invalid, A data management method that remains valid in the table. Claim 16 has been abandoned due to the setting registration fee. 12. The method of claim 11,
Wherein the buffer temporarily stores data for a second file in at least one of a plurality of sub-management units of the second data management unit,
The data management method includes:
Receiving from the external apparatus a sector address range of the second file which is no longer needed by the external apparatus;
Marking all of the plurality of sub-management units included in the second data management unit in the trim management table as invalid; And
And invalidating the first write status information corresponding to the second data management unit in the mapping table. Claim 17 has been abandoned due to the setting registration fee. 17. The method of claim 16,
Writing the data corresponding to the second data management unit effectively managed in the mapping table to the nonvolatile memory when the sector address range of the second file is received before the flush request is skipped, How to manage your data. Claim 18 has been abandoned due to the setting registration fee. Storing data for a first file in a first data management unit as a whole and a second data management unit in a nonvolatile memory; And
And a controller for controlling the nonvolatile memory,
When receiving information indicating that the first file is no longer needed from an external device and sector address information for the first file, the controller writes the write status information of the mapping table to the first data management unit 1 write state information of the second data management unit and invalidates the second write status information corresponding to the second data management unit among the write status information of the mapping table, Managing a sub-management unit in which the first file is stored among a plurality of sub-management units,
The trim management table and the mapping table are individually managed and the size of the first data management unit is equal to or an integer multiple of the size of the data management unit of the data storage device, Is smaller than the data management unit of the data storage device. Claim 19 is abandoned in setting registration fee. 19. The method of claim 18,
Wherein the size of the data management unit of the data storage device is larger than the size of the data management unit of the external device, the size of the data management unit of the external device is the sector size, A size of a page including subpages, and a size of each of the subpages corresponding to the sector size. Claim 20 has been abandoned due to the setting registration fee. 19. The method of claim 18,
Wherein the nonvolatile memory includes a plurality of memory blocks in which an erase operation is performed independently of each other, wherein a first memory block of the plurality of memory blocks includes the first data management unit and the second data management unit, Unit,
Wherein the controller copies data stored in the second data management unit from the first memory block to a second memory block and erases data in the first data management unit stored in the first memory block, .
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