KR101705368B1 - Stereoscopic image display device and driving method thereof - Google Patents

Abstract

The present invention relates to a stereoscopic image display apparatus using a shutter glasses system and a driving method thereof. A display panel for displaying 2D image data in a 2D mode and displaying 3D image data in a 3D mode; A backlight unit for emitting light to the display panel; A timing controller for supplying left eye image data in a data addressing period of a second N-1 (N is a natural number) frame period in the 3D mode and supplying right eye image data to a data addressing period of the second N frame period; A backlight control unit for generating a backlight control signal for controlling the light sources of the backlight unit in the 3D mode to light only in a vertical blank interval of the second N-1 and second N frame periods; A backlight driver for supplying a backlight driving current to the light sources of the backlight unit according to the backlight control signal; And an electrically controlled left and right eye shutters alternately opened and closed, the left eye shutter is already opened at a start time of a vertical blank interval in a second N-1 frame period, and the right eye shutter is closed in a vertical Wherein the backlight driving unit outputs the backlight driving current in a higher level than the 2D mode in the 3D mode.

Description

TECHNICAL FIELD [0001] The present invention relates to a stereoscopic image display device and a method of driving the stereoscopic image display device.

The present invention relates to a stereoscopic image display apparatus using a shutter glasses system and a driving method thereof.

The stereoscopic display is divided into a stereoscopic technique and an autostereoscopic technique. The binocular parallax method uses parallax images of right and left eyes with large stereoscopic effect, and both glasses and non-glasses are used, and both methods are practically used. The glasses system displays polarized light of right and left parallax images on a direct-view type display device or a projector in a time-division manner. The glasses system implements a stereoscopic image using polarized glasses or liquid crystal shutter glasses. In the non-eyeglass system, an optical plate such as a parallax barrier or a lenticular lens is generally used to separate the optical axes of the left and right parallax images to realize a stereoscopic image.

Fig. 1 schematically shows a stereoscopic image display apparatus according to the eyeglass system. The portion indicated by black in the shutter glasses SG is a shutter that blocks light traveling toward the observer, and the portion indicated by white represents a shutter that transmits light toward the observer. In Fig. 1, when a display element DIS is selected as a liquid crystal display element, a backlight unit (BLU) for irradiating light to the display element DIS is required.

1, the left-eye image data (RGB _L) for the rider on the display device frame period (DIS) is written, the left-eye shutter _(L ST) of the shutter glasses (SG) is opened. The right eye image data RGB _R is written on the display element DIS and the right eye shutter ST _R of the shutter glasses SG is opened during the excellent frame period. Therefore, the observer sees only the left eye image during the odd frame, and only the right eye image is seen during the odd frame period, so that the stereoscopic effect can be felt by the binocular parallax.

As a method of driving a stereoscopic image display apparatus of the shutter glasses system, a method of US7724211 which is driven in accordance with the method shown in Fig. 2 is known. Referring to FIG. 2, the method includes a data addressing period for addressing monocular image data during a 2N-1 (N is a natural number) frame period, a vertical blanking interval (VBI) Addressing another monocular image data during a frame period, and includes a vertical blank period. Also, if the left eye image data is addressed in the second N-1 frame period, the left eye shutter is opened in the vertical blank period and the right eye image data is addressed in the second N frame period, then the right eye shutter is opened in the vertical blank period .

However, in this method, not only the shutter glasses SG are driven only during the vertical blank period in which the stereoscopic image is relatively short, but also because of the rising response delay (T _R ) of the liquid crystal of the shutter glasses SG, There is a problem that the luminance is lowered to about 1/10 of the luminance of the 2D mode. Also, this method may cause 3D crosstalk in which the left eye image and the right eye image are overlapped due to the polling response delay (T _F ) of the liquid crystal of the shutter glasses SG.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a stereoscopic image display apparatus and a method of driving the same that can improve the brightness of a 3D mode.

According to an aspect of the present invention, there is provided a stereoscopic image display apparatus including: a display panel for displaying 2D image data in a 2D mode and displaying 3D image data in a 3D mode; A backlight unit for emitting light to the display panel; A timing controller for supplying left eye image data to a data addressing period of a second N-1 (N is a natural number) frame period in the 3D mode and supplying right eye image data to a data addressing period of the second N frame period; A backlight control unit for generating a backlight control signal for controlling the light sources of the backlight unit in the 3D mode to light only in a vertical blank interval of the second N-1 and the second N frame periods; A backlight driver for supplying a backlight driving current to the light sources of the backlight unit according to the backlight control signal; And an electrically controlled left and right eye shutters alternately opened and closed, the left eye shutter is already opened at a start time of a vertical blank interval in a second N-1 frame period, and the right eye shutter is closed in a vertical Wherein the backlight driving unit outputs the backlight driving current in a higher level than the 2D mode in the 3D mode.

According to an aspect of the present invention, there is provided a method of driving a stereoscopic image display device including a display panel displaying 2D image data in a 2D mode and displaying 3D image data in a 3D mode; A backlight unit for emitting light to the display panel; A backlight driver for supplying a backlight driving current to the light sources of the backlight unit; A method of driving a stereoscopic image display device including a liquid crystal shutter eyeglass that alternately opens and closes an electronically controlled left and right eye shutters, the method comprising the steps of: Supplying left eye image data and supplying right eye image data to a data addressing period of the second N frame period; Generating a backlight control signal for controlling the light sources of the backlight unit in the 3D mode to light only in a vertical blank interval of the second N-1 and the second N frame periods; Supplying a backlight driving current to the light sources of the backlight unit according to the backlight control signal; And the left eye shutter has already been opened at the start time of the vertical blank interval of the second N-1 frame period and the right eye shutter has already been opened at the start time of the vertical blank interval of the second N frame period And the backlight driving current is higher than the 2D mode in the 3D mode.

The present invention illuminates the backlight unit brighter than the 2D mode in accordance with the vertical blank interval in the 3D mode. As a result, the present invention can improve the 3D luminance. In addition, the present invention opens the shutter before the vertical blank interval and controls the backlight unit having a fast response speed in consideration of the delay in the rising response of the liquid crystal of the shutter glasses, thereby supplying the images to the left and right eye shutters. As a result, the present invention can improve 3D crosstalk.

1 is a view showing time-divisional operation of left and right images in a stereoscopic image display apparatus using a shutter glasses system.
2 is a waveform diagram showing driving waveforms of a stereoscopic image display apparatus according to the prior art.
3 is a block diagram illustrating a stereoscopic image display apparatus according to an exemplary embodiment of the present invention.
4 is a flowchart illustrating a method of driving a stereoscopic image display apparatus according to an exemplary embodiment of the present invention.
5 is a waveform diagram showing driving waveforms of a stereoscopic image display apparatus according to an embodiment of the present invention.
6 is a detailed view showing the operation of the left eye shutter and the right eye shutter of the shutter glasses.
FIG. 7 is a waveform diagram showing details of driving waveforms of the backlight driving current and the liquid crystal shutter glasses control signal during the time T ₁ to T ₂ shown in FIG. 5.
8 is a waveform diagram showing a drive waveform of a gate voltage and a data voltage of a 240 Hz panel.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

The component name used in the following description may be selected in consideration of easiness of specification, and may be different from the actual product name.

The display device of the present invention may be applied to a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), an organic light emitting diode (OLED) OLED) or the like. Although the present invention has been described with reference to liquid crystal display elements in the following embodiments, it should be noted that the present invention is not limited to liquid crystal display elements.

3 is a block diagram illustrating a stereoscopic image display apparatus according to an exemplary embodiment of the present invention. 3, the stereoscopic image display apparatus of the present invention includes a display panel 10, a backlight unit 30, a shutter glasses 50, a gate driving circuit 110, a data driving circuit 120, a backlight driving unit 130 A backlight control unit 140, a shutter control signal receiving unit 150, a shutter control signal transmitting unit 160, a timing controller 170, a system board 180, and the like.

In the display panel 10, a liquid crystal layer is formed between two glass substrates. The display panel 10 includes liquid crystal cells _Clc arranged in a matrix form by an intersection structure of the data lines D and the gate lines G. [

Data lines D, gate lines G, thin film transistors (TFTs), and storage capacitors (Cst) are formed on a lower glass substrate of the display panel 10. The liquid crystal cells C _lc of the display panel 10 are driven by the electric field between the pixel electrode connected to the TFT and the common electrode V _{com to} which the common voltage is supplied. On the upper glass substrate of the display panel 10, a black matrix, a color filter, and a common electrode V _com are formed. On the upper glass substrate and the lower glass substrate of the display panel 10, an alignment film for attaching a polarizing plate and setting a pre-tilt angle of liquid crystal is formed. The common electrode is formed on the upper glass substrate in a vertical electric field driving method such as a TN (Twisted Nematic) mode and a VA (Vertical Alignment) mode, and a horizontal electric field such as IPS (In Plane Switching) mode and FFS (Fringe Field Switching) Is formed on the lower glass substrate together with the pixel electrode in the driving method. The display panel 10 applicable to the present invention can be implemented not only in the TN mode, the VA mode, the IPS mode, the FFS mode, but also any liquid crystal mode liquid crystal display panel.

The backlight unit 30 may be implemented as a direct type backlight unit or an edge type backlight unit. The edge type backlight unit has a structure in which light sources are disposed so as to face the side surface of a light guide plate (not shown), and a plurality of optical sheets are disposed between the display panel 10 and the light guide plate. The direct-type backlight unit has a structure in which a plurality of optical sheets and a diffusion plate are stacked under the display panel 10 and a plurality of light sources are disposed under the diffusion plate. The light sources may be implemented by at least one of a cold cathode fluorescent lamp (CCFL), an external electrode fluorescent lamp (EEFL), and a light emitting diode (LED). As the light source, an LED that can easily adjust the luminance by adjusting the forward current (IF) as described later is preferable.

The shutter glasses 50 include an electronically controlled left eye shutter ST _L and a right eye shutter ST _R. Each of the left eye shutter ST _L and the right eye shutter ST _R includes a first transparent substrate, a first transparent electrode formed on the first transparent substrate, a second transparent substrate, a second transparent electrode formed on the second transparent substrate, And a liquid crystal layer sandwiched between the first transparent substrate and the second transparent substrate. A reference voltage is supplied to the first transparent electrode and an ON / OFF voltage is supplied to the second transparent electrode. Each of the left eye shutter ST _L and the right eye shutter ST _R transmits the light from the display panel 10 when the ON voltage is supplied to the second transparent electrode while when the OFF voltage is supplied to the second transparent electrode And blocks light from the display panel 10.

Shutter control signal reception section 150 is organic / receiving a shutter control signal (C _ST) over the air interface, and the left eye shutter of the shutter glasses 50 according to the shutter control signal (C _ST) (ST _L) and the right eye shutter ( ST _R ) are alternately opened and closed. When the shutter control signal (C _ST) is input to the first logic value to a shutter control signal receiving section 121, whereas the ON voltage is applied to the second transparent electrode of the left-eye shutter (ST _L), the right eye shutter (ST _R Is supplied with the OFF voltage. The OFF voltage is supplied to the second transparent electrode of the left eye shutter ST _L when the shutter control signal C _ST is input to the shutter control signal receiving unit 121 as the second logical value while the right eye shutter ST _R Is supplied with the ON voltage. Therefore, the left eye shutter ST _L of the shutter eyeglasses 50 is opened when the shutter control signal C _ST is generated as the first logical value, and the right eye shutter ST _R of the shutter glasses 50 is opened, (C _ST ) is generated as the second logical value. The first logic value may be set to a High logic voltage, and the second logic value may be set to a High logic voltage.

The timing controller 170 supplies the digital video data RGB input from the system board 180 to the data driving circuit 120. The timing controller 170 inputs timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE and a dot clock CLK from the system board 180 And generates control signals for controlling the operation timings of the data driving circuit 120 and the gate driving circuit 110. The control signals include a gate timing control signal for controlling the operation time of the gate driving circuit 110, a data timing control signal for controlling the operation timing of the data driving circuit 120 and the polarity of the data voltage.

A timing controller 170, a shutter control signal transmission unit 160, a shutter control signal (C _ST) in order to open and close the left eye shutter (ST _L) and the right eye shutter (ST _R) of the shutter glasses 50 in the 3D mode shift . The shutter control signal transmitting unit 160 transmits the shutter control signal C _ST to the shutter control signal receiving unit 150 via the wired / wireless interface. The shutter control signal receiving unit 150 may be built in the shutter glasses 50 or may be manufactured as a separate module and attached to the shutter glasses 50.

The timing controller 170 may switch the operation of the 2D mode and the 3D mode based on a mode signal MODE input from the system board 180 or a mode identification code coded into an input video signal. The timing controller 170 or the system board 180 can drive the display panel 10 at a frame frequency of 60 x i (i is an integer of 2 or more) Hz by multiplying the input frame frequency of 60 Hz. The input frame frequency is 50 Hz in the PAL (Phase Alternate Line) method and 60 Hz in the NTSC (National Television Standards Committee) method. In the PAL system, one frame period is 5 msec when the frame frequency is multiplied by four times to 200 Hz, and one frame period is approximately 4.16 msec when the frame frequency is multiplied by four times to 240 Hz in the NTSC system.

The gate timing control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (GOE), and the like. The gate start pulse GSP is applied to a gate drive IC (Integrated Circuit) generating a first gate pulse to control the gate drive IC so that a first gate pulse is generated. The gate shift clock GSC is a clock signal commonly input to the gate drive ICs, and is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output of the gate drive ICs. The gate driving circuit 110 sequentially supplies gate pulses to the gate lines G in response to the gate timing control signals.

The data timing control signal includes a source start pulse (SSP), a source sampling clock (SSC), a polarity control signal (POL), and a source output enable signal (SOE) . The source start pulse SSP controls the data sampling start timing of the data driving circuit. The source sampling clock SSC is a clock signal for controlling the sampling timing of data in the data driving circuit 120 on the basis of the rising or falling edge. The polarity control signal POL controls the polarity of the data voltage output from the data driving circuit 120. The source output enable signal SOE controls the output timing of the data driving circuit 120. The source start pulse SSP and the source sampling clock SSC may be omitted if the digital video data to be input to the data driving circuit 120 is transmitted in the mini LVDS interface standard.

Each of the source driver ICs of the data driving circuit 120 includes a shift register, a latch, a digital-analog converter, an output buffer, and the like. The data driving circuit 120 latches the digital video data RGB under the control of the timing controller 170. The data driving circuit 120 inverts the polarity of the data voltage by converting the digital video data RGB into an analog positive gamma compensation voltage and a negative gamma compensation voltage in response to the polarity control signal POL. The data driving circuit 120 inverts the polarities of the data voltages output to the data lines D in response to the polarity control signal POL.

The backlight control unit 140 may determine the 2D mode and the 3D mode according to a mode signal MODE input from the system board 180 or the timing controller 170. [ The backlight control unit 140 adjusts the duty ratio adjustment value of the PWM signal according to the dimming signal DIM so that the backlight luminance is adjusted in accordance with the global / local dimming signal DIM input from the system board 180 or the timing controller 170. [ To the backlight driver 130 in the SPI (Serial Peripheral Interface) data format. In addition, the backlight control unit 140 lowers the lighting ratio of the light sources by lowering the PWM duty ratio in the 3D mode compared with the 2D mode, and raises the PWM signal to determine the lighting and lighting timings of the light sources based on the vertical synchronizing signal in the 3D mode. Backlight control data for controlling the timing and polling timing is generated in the SPI data format. The backlight control unit 140 may be embedded in the timing controller 170. [

The backlight driving unit 130 lowers the lighting ratio of the light sources in comparison with the 2D mode by lowering the PWM duty ratio of the light sources in the 3D mode in response to the backlight control data from the backlight control unit 140. [ In addition, the backlight driver 130 further increases the backlight driving current I _BLU applied to the light sources in the 3D mode rather than the 2D mode. Accordingly, it is possible to prevent the 3D crosstalk by controlling the lighting ratio of the light sources to be lower than the 2D mode in the 3D mode, and to increase the light emission luminance of the light sources in the 3D mode.

The backlight driving current I _BLU can be adjusted by selecting a resistance different from the 2D mode and the 3D mode by the switch to which the mode signal MODE is input. For example, a switch to which a mode signal MODE is input may be connected in series in a 2D mode and connected in parallel in a 3D mode. Also, the control of the backlight driving current I _BLU may be implemented as in Korean Patent Application No. 10-2010-0042518.

The system board 180 outputs data and timing signals (Vsync, Hsync, DE, CLK) of a 2D image or a 3D image through an interface such as a Low Voltage Differential Signaling (LVDS) interface and a Transition Minimized Differential Signaling And supplies it to the controller 170. The system board 180 supplies a 2D image to the timing controller 170 in the 2D mode while supplying a 3D image including the left eye image and the right eye image in the 3D mode to the timing controller 170. The system board 180 can transmit data of 2D and 3D images at a frame frequency of 60 x iHz. The system board 180 or the timing controller 170 may analyze the image data and generate a dimming signal DIM by calculating a global / local dimming value to enhance the contrast characteristic of the display image according to the analysis result.

The user can select the 2D mode and the 3D mode through the user input device 190. [ The user input device 190 includes a touch screen, an on screen display (OSD), a keyboard, a mouse, a remote controller, or the like, which is attached or built on the display panel 10. The system board 180 switches the 2D mode operation and the 3D mode operation in response to the user data input through the user input device 190. The system board 180 may switch the operation of the 2D mode and the operation of the 3D mode through the 2D / 3D identification code encoded in the data of the input image.

4 is a flowchart illustrating a method of driving a stereoscopic image display apparatus according to an exemplary embodiment of the present invention. 5 is a waveform diagram showing driving waveforms of a stereoscopic image display apparatus according to an embodiment of the present invention. A method of driving a stereoscopic image display apparatus according to an embodiment of the present invention will be described in detail with reference to a stereoscopic image display apparatus shown in FIG.

Referring to FIGS. 4 and 5, the timing controller 170 may determine the 2D / 3D mode through the mode signal MODE supplied from the system board 180. When the mode signal MODE of the 2D mode is inputted, the timing controller 170 supplies the gate control signals of the 2D mode to the gate driving circuit 110 and supplies the data control signals to the data driving circuit 120. The timing controller 170 supplies 2D image data RGB to the data driving circuit 120 to charge the liquid crystal cells C _lc of the display panel 10 with the data voltage. The timing controller 170 when the mode signal (MODE) of the 2D input mode, the shutter does not output the control signal (C _ST).

The backlight control unit 140 may also determine the 2D / 3D mode through the mode signal MODE supplied from the system board 180. [ When the mode signal MODE of the 2D mode is input, the backlight control unit 140 transmits the backlight control data having the duty ratio of the PWM signal of 100% to the backlight driver 130 in the SPI data format.

The data driving circuit 120 converts the 2D image data RGB into a data voltage and supplies the converted data voltage to the data lines D of the display panel 10. [ The backlight driver 130 turns on the light sources of the backlight unit 30 in response to the backlight control data of the backlight controller 140. (S101, S102)

When the mode signal MODE in the 3D mode is input, the timing controller 170 outputs the left eye image data RGB _L and the data control signal YL until a predetermined time T ₁ elapses from the start of the second N- To the data driving circuit 120, and supplies the gate control signals to the gate driving circuit 110. The timing controller 170 supplies the shutter control signal C _ST of the low logic to the shutter control signal transmitter 160 at the start of the second N-1 frame period. The backlight control unit 140 transmits backlight control data for turning off the light sources of the backlight unit 30 to the backlight driving unit 130 in the SPI data format with the start of the second N-1 frame period.

The gate driving circuit 110 sequentially supplies gate pulses to the gate lines G and the data driving circuit 120 converts the left eye image data RGB _L into a data voltage, (D). The shutter control signal transmitter 130 transmits a low logic shutter control signal C _ST to the shutter control signal receiver 150. The shutter control signal receiver 150 receives a low logic shutter control signal C _ST So that only the right eye shutter ST _R is opened. (S103, S104)

The timing controller 170 inverts the shutter control signal C _ST to a high logic level and supplies it to the shutter control signal transmitter 160 when a predetermined time T ₁ elapses from the start of the (2N-1) -th frame period. The shutter control signal transmitting unit 130 transmits the shutter control signal C _ST of the high logic to the shutter control signal receiving unit 150 and the shutter control signal receiving unit 150 receives the shutter control signal C _ST of high logic Only the left-eye shutter ST _R is opened. (S105, S106)

When a predetermined time T ₂ has elapsed from the start of the (2N-1) -th frame period, the backlight controller 140 transmits the backlight control data for lighting the backlight unit 30 to the backlight driver 130 in the SPI data format do. The backlight driver 130 turns on the light sources of the backlight unit 30 in response to the backlight control data of the backlight controller 140. (S107, S108)

The timing controller 170 supplies the right eye image data RGB _R and the data control signals to the data driving circuit 120 from the start time point of the second N frame period to the time point elapsed by a predetermined time T ₁ , To the gate drive circuit (110). The timing controller 170 supplies the shutter control signal C _ST of the high logic to the shutter control signal transmitter 160 at the start of the second N frame period. The backlight control unit 140 transmits the backlight control data for turning off the light sources of the backlight unit 30 to the backlight driving unit 130 in the SPI data format with the start of the second N frame period.

The gate driving circuit 110 sequentially supplies gate pulses to the gate lines G and the data driving circuit 120 converts the right eye image data RGB _R into a data voltage, (D). The shutter control signal transmission unit 130 transmits the low logic shutter control signal C _ST to the shutter control signal receiving unit 150 and the shutter control signal receiving unit 150 receives the shutter control signal C _ST Only the left-eye shutter ST _L is opened. (S109, S110)

The 2N T ₁ when a predetermined time since the start of the frame period has elapsed, the timing controller 170 to turn the shutter control signal (C _ST) at a low logic supplies a shutter control signal transmitter 160. The shutter control signal transmitter 130 transmits a low logic shutter control signal C _ST to the shutter control signal receiver 150. The shutter control signal receiver 150 receives a low logic shutter control signal C _ST So that only the right eye shutter ST _R is opened. (S111, S112)

The backlight control unit 140 transmits the backlight control data for turning on the light sources of the backlight unit 30 to the backlight driving unit 130 in the SPI data format when a predetermined time T ₂ has elapsed from the start of the second N frame period. The backlight driver 130 turns on the light sources of the backlight unit 30 in response to the backlight control data of the backlight controller 140. (S113, S114)

As shown in FIGS. 4 and 5, the left-eye shutter ST _L is opened and the right-eye shutter ST _R is interrupted at a point of time T _{1 after} the start of the second N-1 frame period. The right-eye shutter ST _R is opened and the left-eye shutter ST _L is interrupted at a point of time that has elapsed by a predetermined time T ₁ from the start time of the second N-frame period. The predetermined T ₁ time is set in consideration of the liquid crystal rising time (T _R ) and the polling time (T _F ) of the shutter glasses (50). The predetermined T ₁ time is longer than 0 msec, and can be set to a time shorter than T ₂ time.

The light sources of the backlight unit 30 are turned on at a time point that has elapsed by a predetermined time T ₂ from the start of the _second N-1 frame period and turned off at the end of the second N-1 frame period. The light sources of the backlight unit 30 are turned on at a point of time that has elapsed by a predetermined time T ₂ from the start time of the _second N frame period and turned off at the end of the second N frame period. That is, the light sources of the backlight unit 30 are turned on in synchronization with the VBI section in which data is not addressed to the display panel 10. Therefore, the predetermined T ₂ time is set in consideration of the VBI section.

Also, the backlight unit driving unit 130 supplies a higher driving current I _BLU to the light sources of the backlight unit 30 in the 3D mode than the 2D mode as shown in FIG. In the 2D mode, the duty ratio of the PWM signal is 100%, so that the light sources of the backlight unit 30 are lit during the second N-1 and the second N frame periods. However, the light sources of the backlight unit 30 are turned on in synchronization with the VBI section. Therefore, the backlight driving unit 130 raises the backlight driving current I _BLU to supply the light sources of the backlight unit 30, in order to compensate for the brightness of the 3D mode being remarkably lower than the luminance of the 2D mode.

6 is a detailed view showing the operation of the left eye shutter and the right eye shutter of the shutter glasses. Referring to FIG. 6, the OPEN of the left eye shutter ST _L and the right eye shutter ST _R is completely reversed. When the left-eye shutter (ST _L) is opened (OPEN), the right eye shutter (ST _R) is cut off (CLOSE) and, when the right-eye shutter (ST _R) open (OPEN), the left eye shutter (ST _L) is cut off (CLOSE) do. That is, the left-eye shutter _(L ST) and the right eye shutter (ST _R) is either at the same time, opened (OPEN), it is not blocked (CLOSE).

7 is a waveform diagram showing details of driving waveforms of the backlight driving current I _BLU and the shutter control signal C _ST during the time T ₁ to T ₂ shown in FIG. 7, L _ON denotes a light source lighting delay time of the backlight unit 30, T _R denotes a liquid crystal rising delay time of the shutter glasses 50, and T _F denotes a liquid crystal polling delay time of the shutter glasses 50. The light sources of the backlight unit 30 of the present invention are preferably LEDs having a high response speed.

Referring to FIG. 7, the liquid crystal rising delay time T _R of the shutter glasses 50 is larger than the light source turn on delay time of the backlight unit 30. When the light sources of the backlight unit 30 are turned on before the liquid crystal of the shutter glasses 50 is fully illuminated, the user can feel the amount of light change during the liquid crystal rising delay time T _R. The image quality of the three-dimensional image deteriorates.

The shutter glasses 50 must be opened at least before the light sources of the backlight unit 30 are turned on. In other words, the left eye or right eye shutters ST _L and ST _{R to} be opened in the shutter glasses 50 must complete the rising of the liquid crystal before the light sources of the backlight unit 30 are turned on. The time when the opening, the shutter glasses 50 to be opened before the shutter glasses 50 will light to the light source of the backlight unit 30 (a predetermined T ₁ time) is at least higher than a predetermined sigan T ₂ (T _R - L _ON ) time.

A monitor connected to the computer receives an image having a frame frequency of 60 Hz to 75 Hz from the video card of the computer. The present invention provides a stereoscopic image display optimized for a monitor connected to a computer. Since a monitor connected to a computer often implements a still image unlike a TV, there is no need to perform high-speed driving at a frame frequency of 120 Hz or more. Therefore, when high-speed driving is performed at a frame frequency of 120 Hz or more, the cost is higher than the utilization rate.

8 is a waveform diagram showing a drive waveform of a gate voltage and a data voltage of a 240 Hz panel. A panel driven at a frame frequency of 60 Hz to 75 Hz has a length of one frame period of 60 Hz to 16.67 msec, so that the value of the storage capacitor C _ST is designed to be large. However, since the length of one frame period is as short as 4.17 msec in a panel that is driven at a high frame frequency of 240 Hz, the value of the storage capacitor C _ST is designed to be small.

A monitor designed to be suitable for a frame frequency of 240 Hz has a small storage capacitor C _ST but has almost no voltage V _g lost when the length of one frame period is short as shown in FIG. Therefore, the data voltage V _data is maintained without a large difference during one frame period.

However, when a monitor designed to have a frame frequency of 240 Hz is driven at 60 Hz, the value of the storage capacitor C _ST is designed to be smaller than the length of one frame period. Thus, the greater this case, the monitor is designed to be suitable for a frame frequency of 240Hz which is driven by 60Hz, the voltage (V _g) is lost as shown in (b) of Fig. Therefore, the data voltage (V _data ) can not be maintained for one frame period and is lowered, thereby causing a problem that the corresponding gray scale can not be expressed well.

As a result, when a monitor designed to have a frame frequency of 240 Hz displays a still image and a 2D image at a frame frequency of 60 Hz, it is difficult to properly display the corresponding gray scale, resulting in a residual image, and the cost increases. Accordingly, in order to make the stereoscopic image, the 2D image, and the 3D image suitable for implementation, the stereoscopic image display apparatus of the present invention is driven at a frame frequency of 60 Hz to 75 Hz when a still image and a 2D image are implemented, When implemented, it is driven at a frame frequency of 120 Hz.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the present invention should not be limited to the details described in the detailed description, but should be defined by the claims.

10: Display panel 30: Backlight unit
50: shutter glasses 110: gate drive circuit
120: Data driving circuit 130: Backlight driving part
140: backlight control unit 150: shutter control signal receiving unit
160: Shutter control signal transmitter 170: Timing controller
180: system board 190: user input device
G: gate line D: data line

Claims (7)

A display panel for displaying the 2D image data in the 2D mode and displaying the 3D image data in the 3D mode;
A backlight unit for emitting light to the display panel;
And supplies the left eye image data to the data addressing section of the second N-1 (N is a natural number) frame period in the 3D mode, and supplies the left eye image data to the data addressing A timing controller for supplying right eye image data to a section;
A backlight control unit for generating a backlight control signal for controlling the light sources of the backlight unit in the 3D mode to light only in a vertical blank interval of the second N-1 and second N frame periods;
A backlight driver for supplying a backlight driving current to the light sources of the backlight unit according to the backlight control signal; And
The left eye shutter is opened and closed at the start time of the vertical blank period in the second N-1 frame period, and the right eye shutter is opened and closed in the vertical blank of the second N frame period, The liquid crystal shutter glasses having already been opened at the start time of the section,
The open time of the liquid crystal shutter glasses is faster than the start time of the vertical blank section by the difference between the liquid crystal rising delay time of the liquid crystal shutter glasses and the turn on delay time of the light source of the backlight unit,
Wherein the backlight driver outputs the backlight driving current higher than the 2D mode in the 3D mode,
The backlight driving current is adjusted by selecting a resistance in the 2D mode and the 3D mode by connecting a resistor in series with the switch in the 2D mode and connecting the resistors in parallel in the 3D mode, And the three-dimensional image display device. The method according to claim 1,
Wherein the frame frequency for driving the display panel in the 3D mode is 120 Hz. The method according to claim 1,
The right eye shutter is already shut off at the start time of the vertical blank interval of the second N-1 frame period and the left eye shutter is already shut off at the start time of the vertical blank interval of the second N frame period Dimensional image display device. The method according to claim 1,
Wherein the backlight driver includes a switch for selecting a resistance differently in the 2D and 3D modes to adjust the backlight driving current. A display panel for displaying the 2D image data in the 2D mode and displaying the 3D image data in the 3D mode; A backlight unit for emitting light to the display panel; A backlight driver for supplying a backlight driving current to the light sources of the backlight unit; A method of driving a stereoscopic image display apparatus including a liquid crystal shutter eyeglass that alternately opens and closes an electronically controlled left and right eye shutters,
And supplies the left eye image data to the data addressing section of the second N-1 (N is a natural number) frame period in the 3D mode, and supplies the left eye image data to the data addressing Supplying right eye image data to a section;
Generating a backlight control signal for controlling the light sources of the backlight unit in the 3D mode to light only in a vertical blank interval of the second N-1 and the second N frame periods;
Supplying a backlight driving current to the light sources of the backlight unit according to the backlight control signal; And
The left eye shutter has already been opened at the start time of the vertical blank interval of the second N-1 frame period and the right eye shutter has already been opened at the start time of the vertical blank interval of the second N frame period,
The open time of the liquid crystal shutter glasses is faster than the start time of the vertical blank section by the difference between the liquid crystal rising delay time of the liquid crystal shutter glasses and the turn on delay time of the light source of the backlight unit,
Wherein the backlight driving current is higher than the 2D mode in the 3D mode and the backlight driving current is generated by connecting a resistor in series with the switch in the 2D mode and a resistor in parallel in the 3D mode, , And adjusting the resistance by selecting a different resistance in the 2D mode and the 3D mode. 6. The method of claim 5,
Supplying the left eye image data to the data addressing period of the second N-1 (N is a natural number) frame period in the 3D mode, and supplying the right eye image data to the data addressing period of the second N frame period,
And supplying the left eye and right eye image data at a frame frequency of 120 Hz. 6. The method of claim 5,
The left shutter is already opened at the start time of the vertical blank interval of the second N-1 frame period and the right shutter is already opened at the start time of the vertical blank interval of the second N frame period,
The right eye shutter has already been blocked at the start time of the vertical blank interval in the second N-1 frame period and the left eye shutter has already been blocked at the start time of the vertical blank interval in the second N frame period And a driving method of the stereoscopic image display device.

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