KR101654194B1 - AVR software system and the method of control - Google Patents

Abstract

The present invention relates to an AV software system and a control method thereof. More particularly, the present invention relates to an AV software system and its control method that can be practiced and learned in advance by using virtualization simulation and can be directly applied to an actual site.
Transmitting an execution program to a flash memory via an ISP loading unit; Transferring the execution program from the flash memory to the main memory and the CPU core, and outputting the execution result of the execution program to a UI (user interface) module through an interprocessor communication (IPC); And loading the execution program into a training kit for final execution.

Description

[0001] The present invention relates to an AVR software system,

[0001] The present invention relates to a software system and a control method thereof for AVR (Microprocessor Architecture of RISC structure manufactured by Atmel), and more particularly to a software system for resolving regional and spatial constraints of existing hardware systems , And a method and a control method thereof that can be practiced and learned in advance by using virtualization simulation through software and can be directly applied to a real site.

Generally, it is difficult to prepare the experiment because the expensive training kit is used for microprocessor training, and the work process is complicated.

Especially, it is very difficult to use it in the field of practice where various practice coding and debugging are indispensable because it is necessary to go to a laboratory where an expensive training kit is located, and finish the training within a limited time.

For example, as shown in FIG. 1, conventionally, the training program 100 is coded and then compiled. Then, the program is transmitted to the training kit 120 using an ISP and then debugged by the same training kit or another kit 110 If there is a problem, repeat the coding again.

More specifically, as shown in FIG. 2, when the program modification and the debugging continue, the program compilation and the execution image generation process are repeated.

In other words, for the experiment using the training kit, the development environment program is run on the PC, the program to be practiced is written, the program is compiled to fit the purpose training kit, the program is executed in the objective training kit using the ISP transmission program and hardware There was a complication in solving the results of the final training program.

In addition, there are various limitations in studying in a separate space because equipment is required to practice.

In addition, the conventional training kit emulator is difficult to use, and there is a problem in that it can be inquired through the I / O port or only a simple numerical inquiry of the memory according to the execution.

On the other hand, the main modules for the practice of microcomputer usually follow about seven courses in the curriculum.

This includes practice of turning on LED module, practice of 7 segment driving, practice of Key PAD module, analog digital converter practice using ADC, text marking practice using LCD module, and LCD or 7 segment interlocking practice using timer.

However, the conventional emulator of the above-mentioned seven exercises is a simple product without the UI provided by the development tool, and has many regional and spatial constraints.

Korean Patent No. 1059347 discloses a microcontroller; A plurality of general-purpose input / output blocks electrically connected to the microcontroller; And a special function connection block for establishing an electrical connection with pins that perform special functions of the MCU, and a training kit including the microcontroller module.

In other words, while it is possible to use the special functions of each pin of the existing MCU, it can be used as a universal input / output port through the bus connector, and it is possible to easily design various new circuits according to the designer's will. However, Therefore, it is difficult to prepare for the experiment, the work process is complicated, and it is difficult to use it conveniently in the practice field where a variety of practice coding and debugging are necessary.

Korean Patent No. 0269024 discloses an EPROM writer for writing program data on a ROM via a one-chip microprocessor, a 64K byte program area and a 64K byte data memory area can be set to the same address, or a 32K byte An independent program memory area and a data memory area are reserved at the same address, and the remaining usable area is provided between a pair of ROM and RAM having an area where a program memory and a data memory can be accessed simultaneously, a clock and a one-chip microprocessor A display having a liquid crystal panel controller controlled by an output signal of a baud rate controller and an iodo decoder for outputting a baud rate control signal to a control bus and for displaying and changing a menu required for baud rate and serial port change, Configuration Made and, at the same time can improve the learning efficiency of the microcomputer it is to be performed in a menu selection through the display changes to the serial port and baud rate.

However, even if an instruction change or debugging often performed during learning is performed through an external display, the experiment using the training kit again becomes inevitable, and the practice time is prolonged.

That is, a new concept of practice device is required to solve the root cause rather than merely practicing with menu selection through display.

Therefore, there is a need for an emulator that uses a responsive, intuitive, and readable Windows UI that can solve complicated execution processes without local or spatial limitations.

In order to solve the above-mentioned problems, the present invention is directed to an Ave Al software system capable of practicing and learning in advance by virtualization simulation through software that can utilize all the functions of existing hardware systems in order to solve regional and spatial constraints of existing hardware systems, and And to provide a control method.

It is another object of the present invention to provide a system capable of simulating virtualization by linking an execution unit of a training kit and a UI on a Windows, and a method of practicing and learning in actual field using the system.

Transmitting an execution program to a flash memory via an ISP loading unit; Transferring the execution program from the flash memory to the main memory and the CPU core, and outputting the execution result of the execution program to a UI (user interface) module through an interprocessor communication (IPC); And loading the execution program into a training kit for final execution.

In one embodiment, the step of outputting the execution result of the execution program to the UI (user interface) module through the IPC may include verifying the CPU core using each output module sample program, And a clock sample program, or the Windows UI and each output module are used to create and verify a test sample program.

In one embodiment, the step of outputting to the user interface (UI) includes double buffering a graphics device interface (GDI) area and invalidating a region of the display area to prevent duplication of display And collecting and displaying an idle time at which there is no event.

In one embodiment, the step of outputting the execution result of the execution program to a UI (user interface) module via an interprocessor communication (IPC) may include a CPU internal interrupt process according to an external input and a self interrupt Triggering the memories to check for polling is performed.

In one embodiment, the CPU core configures the main memory as a runtime memory.

In one embodiment, the main memory and the IO port are mapped through the IPC, and the mapping is performed to the UI module.

The present invention relates to an AV software system, comprising: an ISP loading unit for receiving an execution program and transferring the execution program to a flash memory; A CPU Core receiving and executing an execution program from the Flash memory through the main memory; And a UI (user interface) module for outputting an execution result of the execution program through an IPC (interprocessor communication), wherein the execution program is debugged and loaded into a program training kit and executed.

According to the present invention, the economic burden due to the practice of the training kit, which is a conventional hardware type, and the inconvenience of the execution process are compensated. Since the software is portable, it is convenient to apply to other media such as mobile devices, It can be easily carried out in a home or a remote educational institution rather than in a laboratory where a training kit is located.

According to the present invention, it is possible to shorten the practice time and the learning time by applying the training kit firstly using the emulator, and secondarily applying the training kit to the direct training kit, or to correct the correction after the first training, Can be shortened.

FIG. 1 is a diagram showing a program flow of an AVR system according to the prior art.
2 is a flowchart showing an operation sequence of the AVR system according to the prior art.
FIG. 3 is a diagram showing an overall program flow and configuration of an AV software system according to the present invention.
FIG. 4 is a diagram showing an operation sequence of an AV software system according to the present invention in order.

For a better understanding of the present invention, a preferred embodiment of the present invention will be described with reference to the accompanying drawings. The embodiments of the present invention may be modified into various forms, and the scope of the present invention should not be construed as being limited to the embodiments described in detail below.

For example, it can run on Windows OS or other OS, or it can be written in various programs such as Visual Studio C ++.

The present embodiments are provided to enable those skilled in the art to more fully understand the present invention. Therefore, the shapes and the like of the elements in the drawings can be exaggeratedly expressed to emphasize a clearer description. It should be noted that in the drawings, the same members are denoted by the same reference numerals. Further, detailed descriptions of well-known functions and configurations that may be unnecessarily obscured by the gist of the present invention are omitted.

As shown in FIG. 3 and FIG. 4, the present invention includes an ISP loading unit 11 for receiving an execution program and transferring the execution program to the Flash memory, and an execution program in the Flash memory 12 via the main memory 13 And a UI (user interface) module 18 for outputting the execution result of the execution program through an interprocessor communication (IPC)

Here, a timer 15 is further added for connecting the occurrence of an interrupt in the interrupt module 17 to the main memory 13.

That is, the results (1 ') that have been debugged through the UI (user interface) screen 2 showing the execution state of the execution program 1 through the step A in FIG. And finally executed.

Specifically, the ISP loading unit 11 triggers memories for internal interrupt processing of the CPU Core 14 according to external inputs and its own interrupt processing through the IPC 16 at the CPU Core 14, do.

The CPU Core 14 can verify each output module sample program.

For example, the timer 15 and the interrupt module 17 may be verified using an ADC converter and a clock sample program, or a Windows UI and each output module may be verified by writing a test sample program.

Also, the CPU core 14 configures the main memory 13 as a runtime memory.

In other words, CPU Core (14) verifies by using sample program through runtime memory, and Timer and Interrupt are verified by ADC converter and clock sample program. Windows UI and each output module write test sample program and verify do.

For example, the main memory 13 and the IO port are mapped through the IPC 16 according to the present invention, shadowed and transferred to the UI module 18.

In addition, the message transmitted to the IPC 16 is analyzed through the UI module 18, and then transmitted to the input / output module of the rear end.

Also, it may be initialized (Reset Start) after the transfer to the flash memory 12 is completed.

In order to accurately express the final simulation result, the UI module 18 doubles buffering the graphics device interface (GDI) area and invalidates the region for the display area in order to prevent duplicate display at the time of display (Idle) at which there is no post-event (Event), and outputs it to the UI module 18.

Hereinafter, a method of controlling the AV software system according to the present invention will be described in detail.

First, the execution program is transferred to the flash memory via the ISP loading unit.

Then, the execution program is transferred from the flash memory to the main memory and the CPU core, and the execution result of the execution program is output to the UI module through the IPC.

Subsequently, the execution program is loaded into the training kit and finally executed.

In addition, the CPU core triggers the memories in order to process internal interrupts of the CPU core according to the external input and its own interrupt processing through the IPC, and then polls the memories.

Also, the CPU core drives the main memory as a runtime memory.

Alternatively, the main memory and the IO port are mapped through the IPC, and the mapping is carried out to the UI module.

The message delivered to the IPC is analyzed through the UI and then transferred to the I / O module on the rear end and controlled.

And may be initialized after completion of transmission to the flash memory according to each case.

≪ Example 1 >

According to the embodiment of the present invention, each program of the sample for the corresponding item of the simulation can be created and verified step by step.

For example, the ISP loading unit verifies all the steps necessary to execute the program (program loading and initialization).

CPU core is verified by using each output module sample program.

Timers and interrupts can also be verified using ADC converters and clock sample programs.

Then, the Windows UI and each output module create and test a test sample program.

Finally, each module is created and transferred to the actual training kit to verify whether it is normal.

≪ Example 2 >

In accordance with one embodiment of the present invention, the Atmega128 AVR training kits of Amtel are used.

The emulator implementation using the executable program according to the present invention is written in Win32 module using Visual Studio C ++ so that it operates in the Windows OS of Microsoft Corporation.

The internal module is related to the AVR Execution Image Loading Unit (ISP), GUI part analysis design, AVR Core execution unit, memory, I / O unit simulation module analysis design, AVR Core simulation module and GUI related part design to display real time results. Analysis and design.

≪ Example 3 >

The simulator can be implemented based on various virtualization modules according to an embodiment of the present invention.

For example, the present invention makes full use of open source in order to minimize the time to implementation of simulation through AV software system.

The AVR Execution Image Loading Unit analyzes the binary image format of WinAvr, the development environment program, and implements the ISP simulation module based on this analysis.

In other words, the CPU Core Simulation Module makes full use of GNU open source.

The AVR internal instruction or timer interrupt interlocks are implemented according to the standard specification of Amtel, and the association between the CPU modules is set accordingly.

In addition, according to the present invention, the Windows UI part responsible for the real-time output of the execution process sets the simulation method according to the characteristics of each module, and designs for the implementation are performed accordingly.

These Windows UI target modules can use LED display module, 7 segment, ADC module, KeyPad, or LCD, respectively.

It should be noted that the embodiments of the Able al software system of the present invention described above are merely illustrative and that those skilled in the art will appreciate that various modifications and equivalent embodiments can be made without departing from the scope of the present invention. You will know.

Therefore, it is to be understood that the present invention is not limited to the above-described embodiments. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims. It is also to be understood that the invention includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

11: ISP loading section
12: Flash memory
13: Main memory
14: CPU Core
15: Timer
16: IPC
17: Interrupt module
18: UI module

Claims (7)

Transmitting an execution program to the flash memory by the ISP loading unit;
The CPU core receiving and executing the execution program from the flash memory through the main memory;
A UI (user interface) module receives the execution result of the execution program from the CPU Core through an interprocessor communication (IPC), double buffering a graphics device interface (GDI) area of the UI module, Collecting and displaying an idle region in which there is no event after displaying an invalid region of the region; And
Loading the execution completion result of the execution program;
And a control unit configured to control the operation of the AV software system.
The method according to claim 1,
Wherein the CPU core receives the execution program from the flash memory via the main memory and executes the execution program,
Wherein the CPU core verifies the timer and the interrupt with an ADC converter or a clock sample program, and verifies the Windows UI and each output module with a test sample program.
delete The method according to claim 1,
Wherein the UI (user interface) module receives and outputs the execution result of the execution program from the CPU core through an IPC (interprocessor communication)
And checking the polling by triggering the flash memory and the main memory for the CPU internal interrupt processing and the self interrupt processing through the IPC in the CPU core. System control method.

The method according to claim 1,
And the CPU core configures the main memory as a runtime memory.
The method according to claim 1,
Mapping the main memory and the IO port through the IPC, and shadowing the main memory and the IO port, and transferring the shadowed data to the UI module.
An ISP loading unit for receiving an execution program and transmitting the same to a flash memory;
A CPU Core receiving and executing an execution program from the Flash memory through the main memory;
Receives the execution result of the execution program from the CPU Core through an interprocessor communication (IPC), double buffering a graphics device interface (GDI) area, and invalidates a region for the display area to prevent duplicate display A UI (user interface) module for collecting and displaying the event at the time of idle without an event after invalidating the event; And
A training kit for loading and executing the execution program executed by the CPU Core;
≪ / RTI >

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