KR101629179B1 - Flash memory storage device and computing system including the same - Google Patents

Flash memory storage device and computing system including the same Download PDF

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KR101629179B1
KR101629179B1 KR1020090030506A KR20090030506A KR101629179B1 KR 101629179 B1 KR101629179 B1 KR 101629179B1 KR 1020090030506 A KR1020090030506 A KR 1020090030506A KR 20090030506 A KR20090030506 A KR 20090030506A KR 101629179 B1 KR101629179 B1 KR 101629179B1
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flash memory
space
storage device
physical space
memory storage
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KR1020090030506A
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Korean (ko)
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KR20100111992A (en
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천원문
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삼성전자주식회사
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Priority to US12/755,644 priority patent/US8412909B2/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7204—Capacity control, e.g. partitioning, end-of-life degradation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7206—Reconfiguration of flash memory system

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)

Abstract

The flash memory storage device provided therein has a physical space and includes a storage medium for storing data information; And a controller configured to adjust a physical space of the storage medium in response to a request from the outside, wherein the adjusted physical space is used as a user address space, and a storage space other than the adjusted physical space is stored in the flash memory And is used as a space for improving the writing performance of the memory storage device.

Figure R1020090030506

Description

TECHNICAL FIELD [0001] The present invention relates to a flash memory storage device and a computing system including the flash memory storage device.

The present invention relates to electronic devices, and more particularly to flash memory storage devices and computing systems including the same.

According to recent technological developments, various types of personal computers such as office desktop computers and mobile environment notebook computers are being developed and put on the market. In general, such computer systems include main memory and external storage devices. It is preferable that the external storage device has a large memory capacity at a low unit cost of the storage capacity.

The external storage devices may be a conventional hard disk drive (HDD) or a floppy disk drive (FDD) using a disk storage medium. While these disk storage devices generally provide large memory capacity at low cost, they require fairly delicate mechanical techniques to perform various operations (e.g., disk seek operations) with the mark net head. Thus, disk storage devices can be easily damaged by physical impact and therefore can be considered less reliable than other types of memory devices.

In the past, external memory devices using semiconductor memory as storage media such as DRAM or SRAM have failed to provide a viable alternative to disk storage devices. Although semiconductor-type external memory devices have faster processing speeds than disk access times and are more susceptible to physical shocks, a fundamental disadvantage associated with DRAM and SRAM technology has been to prevent the use of SRAM and DRAM technology for high-capacity storage will be.

In general, the price per SRAM's memory capacity is too high to cost-effectively use SRAM for high-capacity storage. In addition, the additional power required to preserve the data in the DRAM increases the operating cost of the external storage device, and the power consumption associated with the DRAM refresh operation makes it difficult to implement the DRAM in mobile environments where reduced power consumption is desirable.

On the other hand, external semiconductor memory devices implemented in flash memory, such as flash EEPROM, provide a viable alternative to disk storage devices in any environment. Flash memory devices are nonvolatile memory devices that are programmed more than once. In addition, flash memory devices have a simple structure that can be easily implemented. Because flash memory devices typically consume less power, are compact, lightweight, and less susceptible to physical impact, flash memory devices often suffer from trade-offs associated with flash memory devices, Lt; / RTI >

It is an object of the present invention to provide a flash memory storage device capable of adjusting a physical space (or a storage capacity) in order to improve performance and a computing system including the same.

One aspect of an exemplary embodiment includes a storage medium having physical space and storing data information; And a controller configured to adjust a physical space of the storage medium in response to a request from the outside, wherein the adjusted physical space is used as a user address space.

In an exemplary embodiment, the controller modifies the physical space by changing capacity information indicating the physical space upon request from the outside.

In an exemplary embodiment, the capacity information includes a maximum LBA address.

In an exemplary embodiment, the storage space other than the adjusted physical space is used as a space for improving the write performance of the flash memory storage device.

In an exemplary embodiment, the controller is configured to perform a disk formatting procedure for the adjusted physical space according to an external request after the physical space is adjusted.

Another aspect of the exemplary embodiment includes a flash memory storage device including a storage medium having a physical space; And a host system configured to control the flash memory storage device, wherein the host system generates an instruction to adjust physical space of the flash memory storage device, and the flash memory storage device stores, in response to the instruction, To provide a computing system that adjusts the physical space of the storage medium and the adjusted physical space represents user capacity.

In an exemplary embodiment, the flash memory storage device changes capacity information indicating the physical space upon entry of the command.

In an exemplary embodiment, the capacity information includes a maximum LBA address.

In an exemplary embodiment, the storage space other than the adjusted physical space is used as a space for improving the write performance of the flash memory storage device.

In an exemplary embodiment, after the physical space is adjusted, a disk formatting procedure for the adjusted physical space is performed.

In an exemplary embodiment, the flash memory storage device is an ESD or memory card.

According to an exemplary embodiment, it is possible to improve the writing performance of the flash memory storage device through adjustment of the physical space.

Hereinafter, exemplary embodiments will be described in detail with reference to the drawings.

FIG. 1 is a block diagram schematically illustrating a computing system including a flash memory storage device according to an exemplary embodiment. FIG. 2 is a view showing that the physical space of the flash memory storage device shown in FIG. 1 is variable. Is a diagram for explaining a mapping technique of a flash memory storage device according to an exemplary embodiment.

Referring to FIG. 1, a computing system according to an exemplary embodiment includes a host system 1000 and a flash memory storage device 2000. The flash memory storage device 2000 is a storage device using a flash memory and may include a solid-state disk / drive (SSD), a memory card, and the like. The flash memory storage device 2000 has a physical space for storing data information. In particular, the physical space of the flash memory storage device 2000 will vary according to the request of the host system 1000. The variable physical space of the flash memory storage device 2000 represents the storage space (or user address space) shown to the user. In other words, the storage space shown to the user is variable.

For example, assume that the actual physical space of the flash memory storage device 2000 is 100 GB, as shown in FIG. 100 GB of physical space can be changed to 90 GB of physical space or 70 GB of physical space depending on the request / control of the host system 1000. In this case, although the actual physical space of the flash memory storage device 2000 is 100 GB, the physical space that can be used by the user (i.e., the user address space) is 70 GB or 90 GB. In particular, it should be noted that the variable physical space of the flash memory storage device 2000 according to the exemplary embodiment is different from the concept of partitioning the physical space of the storage device (e.g., partition). The variation of physical space in accordance with the exemplary embodiment results in a reduction in the physical space used by the user, while the division of the physical space does not result in a reduction in the physical space used by the user. Hereinafter, the remaining space through the variable of the physical space is referred to as a 'spare space' (or 'extra space'). The user capacity of the flash memory storage device 2000 corresponds to the physical space (or the user address space), and the spare space is not included in the user capacity. The write performance of the flash memory storage device 2000 will depend on the spare space of the flash memory storage device 2000. In other words, the write performance is changed according to the size of the spare space, which will be described in detail later.

The host system 1000 accesses the flash memory storage device 2000 by indicating a logical address. The logical address refers to any location in the logical memory space recognized by the host software (i.e., the operating system or application) as compared to the physical storage location. Thus, the logical address is converted to a physical address corresponding to the physical memory space of the flash memory storage device 2000 to access the specified physical memory space.

Storage devices using flash memory require additional software called disk emulation software to ensure compatibility with the host system during access operations. The compatibility between the host system 1000 and the flash memory storage device 2000 during the access operation is achieved by operating a file system such as a Flash Translation Layer (FTL) . In other words, the host system 1000 recognizes the flash memory storage device 2000 as an HDD and accesses the flash memory storage device 2000 in the same manner as the HDD. The FTL connects the flash memory storage device to the file system used by the operating system of a particular computer system and does not grant more than one write without erasing the same address.

The functions of the FTL include logical address-to-physical address mapping information management, bad block management, data persistence management due to unexpected power shutdown, and wear management.

When the flash memory is accessed on a block basis, the flash memory is divided into a plurality of blocks. The numbers sequentially assigned to the divided blocks are called physical block numbers, and the virtual numbers of the divided blocks considered by the user are called logical block numbers. Methods for providing mapping between a logical block number and a physical block number include a block mapping scheme, a sector mapping scheme, and a log mapping scheme. Exemplary mapping techniques are described in U.S. Pat. Patent No. 5,404,485 entitled "FLASH FILE SYSTEM ", U.S. Pat. Patent No. 5,937,425 entitled " FLASH FILE SYSTEM OPTIMIZED FOR PAGE-MODE FLASH TECHNOLOGIES ", U.S. Pat. Patent No. No. 6,381,176 entitled " METHOD OF DRIVING REMAPPING IN FLASH MEMORY AND FLASH MEMORY ARCHITECTURE SUITABLE THEREFOR ", and U.S. Patent Publication No. 2006-0004971 entitled " INCREMENTAL MERGE METHODS AND MEMORY SYSTEM INCLUDING THE SAME " , Incorporated herein by reference.

In the FTL using the mapping technique, data having logically continuous addresses may be physically recorded at different positions. Since the erase unit is larger than the write (or program) unit, the flash memory requires an operation of collecting consecutive data, which are physically dispersed at different positions using an arbitrary empty block, in the same address space This process is called merge operation. The occurrence of this merge operation involves a plurality of program operations and a block erase operation, which causes the write performance of the flash memory storage device 2000 to be degraded.

Referring to FIG. 3, which illustrates an exemplary log mapping scheme, the memory blocks of the flash memory storage device 2000 may be divided into data blocks, log blocks, and free blocks. Data blocks are used to store user data on a block-by-block basis, and empty blocks are memory blocks that do not contain user data or are no longer mapped in the user address space. A log block is a kind of page mapping block, which means a memory block mapped on page basis, unlike data blocks. Log blocks can be thought of as write buffer blocks. Assume that existing user data already exists in the data block. If an update write request for such a data block comes in, an empty block will be mapped to be allocated to the log block. One log block is used to process only the update write operation to the address space of the mapped data block.

The user capacity of the flash memory storage device 2000 is equal to the total size of the data blocks (corresponding to the physical space of the flash memory storage device), and the log blocks and empty blocks are included in the user capacity It does not. That is, log blocks and empty blocks will be included in a spare space (or an extra space).

Because the flash memory does not support the overwrite function, a memory block for updating is basically required, such as one or more empty blocks. In the case of the log mapping technique, the performance of the flash memory storage device 2000 may vary depending on the number of log blocks. For example, assume that the flash memory storage device 2000 is composed of 8192 memory blocks, 8000 of the memory blocks are allocated as data blocks, and the remainder is allocated as a log block or an empty block. At this time, the number of log blocks can not exceed a maximum of 191, and due to the limitation of the number of log blocks, the FTL must perform the merge operation. As mentioned above, the merge operation collects the latest pages existing in the data block and the log block, makes the collected pages into one data block, and creates the existing log block and data block into two empty blocks . Since the merge operation involves a plurality of program operations and a block erase operation, if the merge operation occurs, the write performance of the flash memory storage device 2000 is lowered. The overall performance of the flash memory storage device 2000 may depend on the occurrence frequency of the merge operation. In addition, since the merge operation includes additional program and erase operations occurring in the FTL in addition to the writing of the user data, the lifetime of the flash memory storage device 2000 decreases as the number of merge occurrences increases. Thus, the maximum number of log blocks that can be allocated will affect the performance and lifetime of flash memory storage device 2000. This means that performance and lifetime are improved as the number of log blocks that are memory blocks included in the spare space is increased.

The performance of the flash memory storage apparatus 2000 may vary depending on the ratio of the additional storage space (i.e., spare space) to the user capacity, in the case of the block mapping scheme or the page mapping scheme as well as the mapping scheme described above. In the case of the page mapping technique, when an overwrite request for an already written page is received, the page is written to a new page, and the previously written physical page is invalidated. Since the invalidated pages may be scattered over the entire data blocks, it is necessary to remove them and collect only the latest valid pages. These operations are called compaction or garbage collection. When the compaction occurs, additional program and erase operations occur in addition to the user write request, which causes degradation of the performance of the flash memory storage device 2000. Therefore, the performance of the flash memory storage device 2000 can be improved if the frequency of occurrence of compaction is reduced or the number of page copies generated during compaction is reduced. Therefore, the performance of the flash memory storage device 2000 will be further improved as the ratio of the spare space (or the extra storage space) to the user space is larger.

As a result, as described above, the write performance of the flash memory storage device 2000 depends on the ratio of the physical space and the spare space of the flash memory storage device 2000, that is, the capacity of the spare space. It is possible to secure a sufficient amount of spare storage space (i.e., spare space) by adjusting the physical space (or the user address space) of the flash memory storage device 2000 according to the exemplary embodiment. This means that the writing performance of the flash memory storage device 2000 is improved.

4 is a diagram showing the correlation between the capacity of the flash memory storage device and the write performance. The correlation curve shown in FIG. 4 may differ depending on the algorithm and implementation method of the FTL, but the relationship between the capacity and the performance in general will always be maintained. That is, the random write performance and the capacity allocated to the user storage space are in inverse proportion. This means that it is possible to improve the random write performance by partially reducing the user storage space. In other words, even a storage device having the same flash memory chip can improve the performance by reducing the storage capacity that can be used by the user.

5 is a block diagram that schematically illustrates a flash memory storage device according to an exemplary embodiment.

5, a flash memory storage device 2000 includes a CPU 2100, a RAM 2200, a flash memory control block 2300, a host interface control block 2400, and a storage medium (2500). The CPU 2100, the RAM 2200, the flash memory control block 2300, and the host interface control block 2400 will constitute a memory controller for controlling the storage medium 2500.

The CPU 2100 controls overall operation of the flash memory storage device 2000, and the RAM 2200 is used as a data memory and a work memory. The RAM 2200 may be, for example, an SRAM, a DRAM, or the like. The flash memory control block 2300 controls the access of the storage medium 2500 under the control of the CPU 2100 and will basically include an ECC engine (not shown) for error correction. Alternatively, when the CPU 2100 is configured as a high-performance processing unit, error correction can be performed through an error correction program executed by the CPU 2100. [ If the flash memory storage device 2000 is a memory card, the host interface control block 2400 will interface with the host system 1000 via an SD card interface or an MMC card interface. If the flash memory storage device 2000 is an SSD, the host interface control block 2400 will interface with the host system 1000 via a PATA interface, a SATA interface, a SAS interface, a PCI-express interface, or the like.

Basically, the storage medium 2500 stores device data (also referred to as metadata) of the flash memory storage device 2000 (e.g., maker information, capacity information indicating a physical storage space ), Etc.), firmware such as FTL, and the like are stored. The FTL generates the mapping tables necessary for the mapping using the capacity information indicating the physical storage space. Such capacity information (i.e., the maximum LBA address) may also be stored in the host system 1000 as information indicating the actual size (i.e., actual capacity) of the flash memory storage device 2000, / RTI > As is well known, when the host system 1000 provides an 'IDENTIFY DEVICE' command to the flash memory device 2000, the flash memory storage device 2000 stores information indicating the actual size (i.e., the maximum LBA address / value) To the host system 1000. In order to substantially use the flash memory storage device 2000, the host system 1000 performs a disk formatting process (a logical operation) on the basis of information (maximum LBA address / value) indicating the actual size provided in the flash memory storage device 2000 - level formatting, pa- titioning, high-level formatting procedures) or prepare the HPA (Host Protected Area).

In the exemplary embodiment, the capacity information indicating the maximum LBA address / value, i.e., the physical space, described above may be stored in the flash memory storage device 2000 by a specific command (e.g., a SET_NATIVE_MAX_ADDRESS command) It will change when entered.

6 is a diagram showing a general software module configuration of a flash memory storage device.

Referring to FIG. 6, a host command handler analyzes a host command. The read / write location requested by the host does not match 1: 1 with the physical address of the flash memory storage device 2000, and a software module FTL is required to convert the logical address to the physical address. The FTL includes an address translator for converting a logical address into a flash address, and a bad block management module for registering a bad block when a program erase fails and replacing a bad block. The FTL also includes a flash memory controller interface that controls access (e.g., read, program, erase, etc.) to individual flash memory chips.

7 is a flowchart for explaining an operation of varying the physical space of the flash memory storage device 2000 according to the exemplary embodiment. Hereinafter, the operation of varying the physical space of the flash memory storage device 2000 according to the exemplary embodiment will be described in detail with reference to the drawings.

First, in step S100, the flash memory storage device 2000 receives a specific command (for example, a SET_NATIVE_MAX_ADDRESS command) from the host system 1000. The specific command input may be a command to inform the change of the capacity information (e.g., the maximum LBA address) indicating the physical space of the flash memory storage device 2000. In step S200, the flash memory storage device 2000 changes the existing capacity information (indicating the actual physical space of the flash memory storage device) based on the update capacity data input together with the specific command. For example, by changing the maximum LBA address value as the capacity information to the input capacity data, the physical space (or the user address space) of the flash memory storage device 2000 will be variable.

As mentioned above, the adjustment of the physical space is intended to secure a sufficient spare space to improve the write performance of the flash memory storage device 2000. Such a spare space is an extra storage space of the flash memory storage device 2000 not included in the user capacity, and the memory blocks included in the spare space will be used as log blocks and empty blocks in the case of the log mapping technique. The memory blocks included in the spare space can also be used for bad block management. It will be appreciated that the use of memory blocks included in the spare space is not limited to that disclosed herein.

Once the physical space is corrected, the user capacity will be determined by the corrected physical space, as described in FIG. Once the physical space is corrected, at step S300, a disk formatting procedure for use of the flash memory storage device 2000 is performed at the request of the host system 1000, or an HPA is generated according to the ATA standard. Generation of HPA is well known in the art, and its description will therefore be omitted. Thereafter, in step S400, the flash memory storage device 2000 will perform a read / write operation at the request of the host system 1000. [

In an exemplary embodiment, steps S300 and S400 have been described as exemplary embodiments for distinguishing partition concepts from HPA generation. The steps S100 and S200 (or S100, S200, S300 (in the case of HPA generation)) described above will be performed before the flash memory storage 2000 is shipped to the market. However, if the specific instructions are provided to the user, the steps (S100, S200) described above may be performed after the flash memory storage device 2000 is shipped to the market so that the user can freely select the write performance and user capacity Can be well understood.

As can be seen from the above description, the storage space of the flash memory storage device 2000 includes a user address space and a spare space, and the user address space includes memory blocks (i.e., data blocks) . That is, the user capacity is determined by the user address space. The spare space will consist of memory blocks used to improve the write performance of flash memory storage device 2000. Once the physical space has been adjusted, generation of HPA and / or disk formatting procedures will be performed in a manner well known in the art.

8 is a block diagram that schematically illustrates a computing system including a flash memory storage device according to an exemplary embodiment.

A computing system in accordance with the present invention includes a microprocessor 3410 electrically coupled to a bus 401, a user interface 3420, a modem 3430 such as a baseband chipset, a controller 3440, 3450). The controller 3440 and the storage medium 3450 will be configured substantially the same as those shown in Fig. The storage medium 3450 may store N-bit data to be processed / processed by the microprocessor 3410 (N is an integer equal to one or greater) through the controller 3440. When the computing system according to the present invention is a mobile device, a battery 3460 for supplying the operating voltage of the computing system will additionally be provided. Although it is not shown in the drawing, the computing system according to the present invention can be provided with application chipset, camera image processor (CIS), mobile DRAM, etc., It is clear to those who have learned.

It will be apparent to those skilled in the art that the structure of the present invention can be variously modified or changed without departing from the scope or spirit of the present invention. In view of the foregoing, it is intended that the present invention cover the modifications and variations of this invention provided they fall within the scope of the following claims and equivalents.

1 is a block diagram that schematically illustrates a computing system including a flash memory storage device according to an exemplary embodiment.

FIG. 2 is a view showing that the physical space of the flash memory storage device shown in FIG. 1 is variable.

3 is a diagram for explaining a mapping technique of a flash memory storage device according to an exemplary embodiment.

4 is a diagram showing the correlation between the capacity of the flash memory storage device and the write performance.

5 is a block diagram that schematically illustrates a flash memory storage device according to an exemplary embodiment.

6 is a diagram showing a general software module configuration of a flash memory storage device.

7 is a flowchart for explaining an operation of varying the physical space of the flash memory storage device 2000 according to the exemplary embodiment.

8 is a block diagram that schematically illustrates a computing system including a flash memory storage device according to an exemplary embodiment.

Claims (11)

A storage medium having a physical space for storing data information; And And a controller configured to adjust a physical space of the storage medium in response to a request from the outside, The adjusted physical space is used as a user address space, and a storage space other than the adjusted physical space is used as a space for updating data stored in the user address space or a copy of data stored in the user address space A flash memory storage device used as a space for data storage. The method according to claim 1, Wherein the controller adjusts the physical space by changing capacity information indicating the physical space upon request from the outside. 3. The method of claim 2, Wherein the capacity information comprises a maximum LBA address. delete The method according to claim 1, Wherein the controller is configured to perform a disk formatting procedure on the adjusted physical space according to an external request after the physical space is adjusted. A flash memory storage device including a storage medium having a physical space; And And a host system configured to control the flash memory storage device, The host system generates an instruction to adjust the physical space of the flash memory storage device and the flash memory storage device adjusts the physical space of the storage medium in response to the instruction, A storage space other than the adjusted physical space is used as a space for updating data stored in the adjusted physical space or as a space for copying data stored in the adjusted physical space Computing system. The method according to claim 6, Wherein the flash memory storage device changes capacity information indicating the physical space upon input of the command. 8. The method of claim 7, Wherein the capacity information comprises a maximum LBA address. delete The method according to claim 6, Wherein the disk formatting procedure for the adjusted physical space is performed after the physical space is adjusted. delete
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KR102576373B1 (en) * 2018-09-28 2023-09-07 에스케이하이닉스 주식회사 Control device for dynamically allocating storage space and data storage device including the control device

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US20080320214A1 (en) * 2003-12-02 2008-12-25 Super Talent Electronics Inc. Multi-Level Controller with Smart Storage Transfer Manager for Interleaving Multiple Single-Chip Flash Memory Devices
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