KR101287285B1 - Method and apparatus for processing of interrupt routine, terminal apparatus thereof - Google Patents

Abstract

The present invention relates to a method and apparatus for independently processing interrupts generated for a plurality of DMA channels, and a terminal apparatus thereof. In the present invention, when an interrupt occurs for any DMA channel, the interrupt is controlled so that no further interrupt occurs for the same channel before the interrupt is completed. At this time, other DMA channels that do not generate an interrupt remain in a state where an interrupt can be generated. That is, interrupt generation and processing are performed independently for each DMA channel. The operation state of the DMA channel is performed by setting a specific bit of the DMA command register for controlling the DMA channel to a predetermined value. When the generated interrupt is completed, the corresponding DMA channel is controlled to enable the interrupt again. Accordingly, the present invention has the advantage that the DMB broadcast program and the MP3 file can be normally played without losing data even if the MP3 file playback request occurs while watching the DMB program in a terminal device such as a PDA for DMB.

DMA, interrupt generation, channel, register, DMB, MP3 file

Description

METHOD AND APPARATUS FOR PROCESSING OF INTERRUPT ROUTINE, TERMINAL APPARATUS THEREOF}

1 is a general system configuration diagram provided with a DMA controller.

FIG. 2 is a configuration diagram for explaining an interrupt routine process by the DMA controller shown in FIG. 1; FIG.

3 is a flowchart of an interrupt routine processing method according to a preferred embodiment of the present invention.

4 is a structure diagram of a DCMDx register applied to the present invention.

Description of the Related Art [0002]

30: interrupt management routine section 40: interrupt service routine section

50: interrupt service execution unit 60: interrupt completion routine unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to interrupt routine processing. In particular, a direct memory access for optimizing and playing back a digital multimedia broadcasting (DMB) file and an audio file in a personal portable terminal device is performed. The present invention relates to a method for processing an interrupt routine in a DMA) method, a device thereof, and a terminal device thereof.

The DMA method is a control method for improving system performance as compared to a CPU directly controlling a memory. This is to directly transfer the memory and the data by giving a control right to the interface device of the peripheral device without the intervention of the central processing unit. In particular, a system having a peripheral device having a large amount of data transfer is essential.

Fig. 1 shows a general system configuration provided with such a DMA controller.

According to the drawing, in order to apply the DMA scheme, a plurality of peripheral devices (I / O devices) 10 control the DMA controller 20 to control data transmission and reception directly with the memory 14 through the memory controller 12. ) Is provided.

The DMA controller 20 is controlled by the central processing unit (CPU) 1 only at the initial setting at the time of data transmission, and then the data transfer process is performed by the DMA controller 20 by the data of the I / O device 10. Is transferred directly to the memory 14.

The DMA controller 20 includes a control register 22 for controlling the operation of the DMA controller 20, and a DMA channel module unit 24 having a plurality of DMA channels for data transmission in accordance with a DMA interrupt signal. Is made of. The DMA channel module unit 24 usually has 32 DMA channels. The control register is provided with a DMA Interrupt Register (DINT) for indicating an interrupt generation channel.

Next, FIG. 2 is a configuration diagram for functionally explaining the interrupt routine process by the DMA controller shown in FIG.

An interrupt management routine section 30 for managing DMA interrupt generation is provided. The interrupt management routine unit 30 is a routine for overall control of all interrupts. The interrupt management routine unit 30 searches for an interrupt pin and calls the interrupt service routine unit 40.

The interrupt service routine unit (DMA ISR) 40 receives an interrupt occurrence fact from the interrupt management routine unit 30 and calls a function function to perform a corresponding operation.

An interrupt service threader 50 for actually performing an operation according to the function call and an interrupt completion routine 60 for performing an operation when the DMA interrupt is completed are provided.

The conventional DMA interrupt routine processing according to such a configuration proceeds as follows.

First, when an interrupt occurs from any one of the 32 DMA channels of the DMA channel module unit 24, the DMA controller 20 starts the interrupt routine processing process.

Thus, the interrupt management routine unit 30 retrieves the interrupt pin and calls the interrupt service routine unit 40. Then, the interrupt service routine unit 40 masks all of the DMA pins of the interrupt control mask register (ICMR) in order to disable all the channels of the DMA channel module unit 24, that is, 32 DMA channels. Mask) process. In other words, if an interrupt occurs in any one of the 32 DMA channels, the remaining 31 DMA channels are also disabled, so that the interrupts for the channels cannot be generated.

Thereafter, the interrupt service routine unit 40 searches for an interrupted DMA channel using a DMA interrupt register (DINT), and performs a function function (for example, SYSINTR_DMA) to perform a DMA service assigned to the found DMA channel. ).

In response to the call operation, the interrupt service execution unit 50 performs a corresponding operation for an interrupt. After the operation is completed, the interrupt service execution unit 50 transmits a function (for example, OEM Interrupt Done) to notify the interrupt completion routine unit 60 that the interrupt is finished, and the interrupt completion routine unit 60. Enables the interrupt to occur for all channels that are currently disabled.

In the prior art, when an interrupt occurs in any one of 32 DMA channels, the entire channel is switched to a disabled state and only a function of the generated interrupt is performed. In other words, an interrupt generated in another DMA channel could not be processed while an interrupt was in progress.

Therefore, since a predetermined function is performed only for the interrupted DMA channel and interrupts that may occur in the remaining DMA channels are ignored, there is a problem in that data is lost even in a short time.

This interrupt processing method causes jitter noise due to truncation of the audio data, especially when the DMB image data and the audio data are simultaneously reproduced, resulting in a problem that the DMB image data is not output cleanly.

Accordingly, an object of the present invention is to provide an interrupt routine processing method and apparatus for independently operating a plurality of DMA channels that generate interrupts.

Another object of the present invention is to provide a terminal apparatus in which an optimized interrupt routine processing method is applied so that data is reproduced cleanly without noise even when DMB image data and audio data are simultaneously reproduced.

In the interrupt routine processing method of the present invention for achieving the above object, the interrupt generation step, the channel search step for the generated interrupt, the step of disabling only the retrieved channel, and for the interrupt operation Calling a function and performing a corresponding operation.

The method may further include enabling the channel when the interrupt operation is completed.

In the present invention, the channel search is performed by different binary data set according to whether the interrupt occurs.

In the channel disabling and enabling step of the present invention, a predetermined bit of a DMA command register (DCMD Register) provided for each channel is used, and the bit is the 22nd bit or the 21st bit, and the value '0' or '1'. It is desirable for the value to be set.

The disabled channel of the present invention is not interrupted.

In addition, an interrupt may occur in a channel other than the disabled channel, and the interrupted channel may also generate an interrupt.

The interrupt of the present invention is generated individually for each channel.

In addition, the interrupt routine processing apparatus of the present invention for achieving the above object, the interrupt service routine means for searching for and disabling the interrupted channel and calling a function to perform the interrupt operation, to the function call Interrupt service execution means for performing an operation according to the present invention, and interrupt completion routine means for enabling the channel and completing an interrupt after the operation is completed.

The present invention provides a DMA command register (DCMD) for enabling / disabling a channel according to the interrupt occurrence.

In the enable / disable, the 21st or 22nd bit of the DCMD is used.

In addition, the terminal device according to the present invention for achieving the above object, if a plurality of interrupts generated for any of a plurality of channels, to control to perform the corresponding operation for the interrupt for each generated channel at the same time It is characterized by.

If an interrupt occurs for another channel while the operation according to the interrupt is generated, the terminal device controls to perform the corresponding operation for the generated interrupt, and the corresponding operation is completed in the interrupted channel. Control other interrupts from occurring before.

According to the present invention having such a configuration, since a plurality of DMA channels operate independently for interrupt generation, all the functions for the generated interrupt are performed even if a plurality of interrupts are generated.

Hereinafter, a method and apparatus for processing an interrupt routine according to the present invention and a terminal apparatus thereof will be described in detail with reference to a preferred embodiment shown in the accompanying drawings.

Interrupt routine processing in the present invention is performed by Figs. 1 and 2 will be described with reference to FIG. 1 and 2 will be described in the preferred embodiment of the present invention.

3 is a flowchart illustrating an interrupt routine processing method according to an exemplary embodiment of the present invention.

First, the case where an interrupt is generated in any one DMA channel among the 32 channels of the DMA channel module unit 24 will be described.

An interrupt is generated from any one of the DMA channels among the 32 DMA channels of the DMA channel module unit 24 (step 70). The interrupt management routine unit 30 then retrieves the interrupt pin and calls the interrupt service routine unit 40 for the corresponding DMA channel (step 72).

The interrupt service routine unit 40 uses the DMA interrupt register (DINT) to find out which DMA channel of the 32 DMA channels has an interrupt occurred. That is, different binary data are set according to whether or not the DINT is interrupted, the channel not interrupted has a value of '0', and the channel interrupted has a value of '1'.

When the interrupted channel is detected by the DINT (step 74), the interrupt service routine unit 40 disables only the DMA channel on which the interrupt is currently generated (step 76).

The DMA command register DCMDx is used for the DMA channel disable process. The DCMDx is a register allocated to each of the DMA channels, and is a register for sending a DMA channel control command. The structure of the DCMDx is shown in FIG. 4. Referring to Figure 4, the DCMDx is provided with a total of 32 bits, bits 22 and 21 are bits associated with the interrupt enable. Accordingly, the DMA channel disable disables the DMA channel by setting a user setting portion of the 22nd bit 'STARTIRQEN' or the 21st bit 'EndlrqEn' to '0'.

As such, when only the interrupted DMA channel is disabled, the interrupt cannot be further generated in the channel when the interrupt generated in the DMA channel is not processed. Of course, interrupt mask processing is performed only for the interrupted DMA channel, and the other 31 channels can be interrupted at any time as the enable state is continuously enabled.

Thereafter, the interrupt service routine unit 40 calls a function function (for example, SYSINTR_DMA) to perform an interrupt service on the interrupted DMA channel (step 78).

When the function function call is made, the interrupt service execution unit 50 performs a corresponding operation on the interrupt in step 80, and after the operation is completed, a function for notifying that the interruption has ended (eg, OEM Interrupt Done). Is passed to the interrupt completion routine 60 (step 82) (step 84).

Accordingly, in step 86, the interrupt completion routine 60 sets the 22nd bit 'STARTIRQEN' or the 21st bit 'EndlrqEn' to '1' to switch the DMA channel currently in the disabled state to the enabled state. Set to. The transition to the enabled state refers to a state in which an interrupt can occur again for the DMA channel. Therefore, if the interrupt occurs again after the interrupt processing is completed in the interrupted DMA channel as described above, the process returns to step 72 and the interrupt processing for the corresponding DMA channel is performed again.

In the present invention, since all of the DMA channels operate independently, even if an interrupt is generated for one DMA channel as described above, the routine process is executed, as in step 90 or 92 of FIG. May be generated. The generated interrupt proceeds with the interrupt routine in the corresponding DMA channel according to the interrupt pin search.

This process will be described using a DMB type PDA as an example.

DMB-type PDA is a personal portable terminal device that can play MP3 files in addition to general functions, as well as watch DMB broadcasts.

Thus, when the user first performs an input button operation for watching DMB broadcasting in the DMB type PDA, the interrupt management routine unit 30 recognizes the occurrence of the interrupt for viewing the DMB broadcasting. The interrupt management routine unit 30 searches for an interrupt pin according to the occurrence of an interrupt and calls the corresponding interrupt service routine unit 40.

When the interrupt service routine unit 40 searches for the interrupted DMA channel and disables the DMA channel, and calls a function function for DMB broadcast viewing, the interrupt service execution unit 50 executes a DMB program. Playback is performed on the display unit (not shown).

At this time, another interrupt may be generated by the user for playing the MP3 file. In this case, the same DMA channel is searched for and disabled in the same manner as the interrupt routine for viewing DMB broadcasting, and the MP3 file is played according to a function function call.

That is, in the embodiment of the present invention, the DMB broadcast and the MP3 file are processed through different DMA channels.

When the DMB broadcast and / or MP3 file playback is stopped, the corresponding DMA channel is switched to a state in which an interrupt can be generated.

As described above, the present invention described in the above embodiments controls only the DMA channel in which the interrupt is generated among the plurality of DMA channels, so that interrupts to the plurality of DMA channels can be generated at the same time.

As described above, it has been described with reference to the illustrated embodiment of the present invention, which is merely exemplary, those skilled in the art to which the present invention pertains without departing from the spirit and scope of the invention It will be apparent that other variations, modifications and equivalents are possible. Therefore, the true scope of the present invention should be determined by the technical idea of the appended claims.

As described above, according to the present invention, since an interrupt can be generated for another DMA channel while an interrupt is generated for an arbitrary channel among a plurality of DMA channels, independent interrupt processing can be performed, so that various types of data can be transferred. In this case, data loss does not occur and normal processing is possible.

In other words, when the present invention is applied to a terminal device capable of playing DMB broadcasting and MP3 files, even if the DMB video data and the MP3 data are played at the same time, it is possible to expect the effect that the data is played cleanly without disconnection and noise. have.

Claims (15)

delete Interrupt generation stage, A channel search step for the generated interrupt; Disabling only the found channel; Calling a function for the interrupt operation and performing the operation; and Enabling the channel upon completion of the interrupt operation, The disabled channel does not generate an interrupt, the interrupt routine processing method characterized in that the interrupt can occur in a channel other than the disabled channel. 3. The method of claim 2, The channel search is performed by different binary data set according to whether or not the interrupt occurs. 3. The method of claim 2, And said channel disabling and enabling step uses predetermined bits of a DMA command register (DCMD Register) provided for each channel. 5. The method of claim 4, The bit is the 22nd bit or the 21st bit, and a value of '0' or '1' is set. delete delete delete 3. The method of claim 2, And wherein the interrupt occurs individually for each channel.  Interrupt service routine means for retrieving and disabling the interrupted channel and calling a function to perform the interrupt operation; Interrupt service execution means for performing an operation according to the function call, and And an interrupt completion routine means for enabling the channel and completing an interrupt after completion of the operation, The disabled channel is not interrupted, the interrupt routine processing apparatus, characterized in that the interrupt can occur in a channel other than the disabled channel. The method of claim 10, And a DMA command register (DCMD) is provided for enabling / disabling a channel according to the interrupt occurrence. 12. The method of claim 11, The enable / disable is interrupt routine processing apparatus, characterized in that the 21st or 22nd bit of the DCMD is used. delete delete If a plurality of interrupts are generated for any of the plurality of channels, the control means for controlling to perform the corresponding operation for the interrupt for each of the generated channel at the same time, and Means for controlling to perform a corresponding operation on the generated interrupt when an interrupt is generated for another channel while an operation according to the interrupt is generated; and Means for controlling the interrupted channel so that no other interrupt is generated before the corresponding operation is completed. Terminal device comprising a.

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