KR101251997B1 - Thin film transistor array panel and method for manufacturing the same - Google Patents

Abstract

The present invention provides a substrate, first and second signal lines formed on the substrate and intersecting with each other, a source electrode connected to the first signal line, a drain electrode facing the source electrode, and a pixel electrode connected to the drain electrode. A barrier rib formed on the source electrode and the drain electrode and having an opening having a lower portion wider than an upper portion thereof, an organic semiconductor positioned at the opening and partially overlapping the source electrode and the drain electrode, and connected to the second signal line; The present invention relates to a thin film transistor array panel including a gate electrode partially overlapping the organic semiconductor and a method of manufacturing the same.

Organic semiconductor, inkjet, bulkhead, opening

Description

Thin film transistor array panel and manufacturing method therefor {THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME}

1 is a layout view of a thin film transistor array panel according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1,

3, 5, 7, 11, and 13 are layout views at an intermediate stage of the method for manufacturing the thin film transistor array panel of FIGS. 1 and 2 according to an embodiment of the present invention;

4 is a cross-sectional view of the thin film transistor array panel of FIG. 3 taken along the line IV-IV.

FIG. 6 is a cross-sectional view of the thin film transistor array panel of FIG. 5 taken along the line VI-VI.

FIG. 8 is a cross-sectional view of the thin film transistor array panel of FIG. 7 taken along the line VIII-VIII.

9 and 10 are cross-sectional views illustrating a continuous process in a manufacturing step of the thin film transistor array panel of FIG. 8;

FIG. 12 is a cross-sectional view of the thin film transistor array panel of FIG. 11 taken along the line XII-XII.

FIG. 14 is a cross-sectional view of the thin film transistor array panel of FIG. 12 taken along the line XIV-XIV.

 ≪ Description of reference numerals &

110: Insulation substrate 121: Gate line

124: gate electrode 126: blocking member

129: end portion of the gate line 146: gate insulating member

147: opening 154: organic semiconductor

160: interlayer insulating film

171: data line 172: sustain electrode line

173: protrusion 174 of the data line: light blocking film

177: sustain electrode 179: end of data line

82: contact auxiliary member 162, 163: contact hole

191: pixel electrode 193: source electrode

195: drain electrode

The present invention relates to a thin film transistor array panel and a method of manufacturing the same.

In general, a flat panel display device such as a liquid crystal display (LCD), an organic light emitting diode display (OLED display), an electrophoretic display, or the like, includes a plurality of pairs of field generating electrodes and And an electro-optical active layer interposed therebetween. In the case of a liquid crystal display device, a liquid crystal layer is included as an electro-optical active layer, and an organic light emitting layer is included as an electro-optical active layer in an organic light emitting display device.

One of the pair of field generating electrodes is typically connected to a switching element to receive an electrical signal, and the electro-optical active layer converts the electrical signal into an optical signal to display an image.

In a flat panel display device, a thin film transistor (TFT), which is a three terminal device, is used as a switching device, and a gate line for transmitting a scan signal for controlling the thin film transistor and a signal to be applied to the pixel electrode A data line to be transmitted is provided in the flat panel display.

Among these thin film transistors, studies on organic thin film transistors (OTFTs) using organic semiconductors instead of inorganic semiconductors such as silicon (Si) have been actively conducted.

The organic thin film transistor array panel in which the organic thin film transistors are arranged in a matrix form has many differences in structure and manufacturing method compared with the conventional thin film transistor.

One of them is that the organic thin film transistor can be manufactured by a solution process such as inkjet printing.

The inkjet printing method can easily form an organic thin film such as an organic semiconductor or an insulating film by dropping an organic solution in a predetermined region defined by a partition.

However, the organic thin film formed by the inkjet printing method may be formed of non-uniform thickness. In particular, in the case of an organic semiconductor, when a thickness difference occurs in a portion where a channel is formed, the characteristics of the thin film transistor may be affected.

Therefore, the technical problem to be achieved by the present invention is to solve such problems, and to form the organic thin film uniformly to improve the characteristics of the thin film transistor.

The thin film transistor array panel according to the exemplary embodiment of the present invention may include a substrate, first and second signal lines formed on the substrate and crossing each other, a source electrode connected to the first signal line, a drain electrode facing the source electrode, An organic semiconductor formed on the pixel electrode, the source electrode, and the pixel electrode connected to the drain electrode, the barrier rib having an opening having a lower portion wider than an upper portion thereof, and an organic semiconductor positioned at the opening and at least partially overlapping the source electrode and the drain electrode; And a gate electrode connected to the second signal line and partially overlapping the organic semiconductor.

In addition, the partition wall may include an inverse-taper portion.

In addition, the partition wall may include a negative photoresist.

In addition, the organic semiconductor may have a lower portion wider than the upper portion.

In addition, the semiconductor device may further include a gate insulating member including an organic material between the organic semiconductor and the gate electrode.

In addition, the gate insulating member may be surrounded by the partition wall.

The display device may further include a blocking member formed under the gate electrode.

In addition, the source electrode and the drain electrode may include ITO or IZO.

The display device may further include a storage electrode formed on the same layer as the data line and partially overlapping the pixel electrode.

The light blocking layer may further include a light blocking layer under the organic semiconductor.

The display device may further include a protection member covering the gate electrode.

In addition, the method of manufacturing a thin film transistor array panel according to an exemplary embodiment of the present invention includes forming a first signal line on a substrate, forming an interlayer insulating film having a plurality of contact holes on the first signal line, and forming the interlayer insulating film on the interlayer insulating film. Forming a pixel electrode including a source electrode connected to the first signal line and a drain electrode facing the first signal line through a contact hole, forming a photoresist film on the source electrode and the pixel electrode, and partially removing the photoresist film Forming an opening having a lower portion wider than an upper portion, forming an organic semiconductor in the opening, forming a gate insulation member on the organic semiconductor, and forming a second signal line including a gate electrode on the gate insulation member It includes.

In addition, at least one of the forming of the organic semiconductor and the forming of the gate insulating member may include dropping a solution into the opening and drying the solution.

In addition, the photosensitive film may be formed by applying a negative photosensitive material.

In addition, the opening may be formed by dry etching the photosensitive film.

The forming of the opening may include forming a metal layer on the photosensitive film, forming a metal pattern by photo etching the metal layer, dry etching the photosensitive film using the metal pattern as a mask, and the metal pattern. It may include the step of etching.

In addition, the metal layer may include a material different from the source electrode and the drain electrode.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. Like parts are designated with like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

Hereinafter, the organic thin film transistor panel according to one embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2. FIG.

1 is a layout view of an organic thin film transistor array panel according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the thin film transistor array panel of FIG. 1 taken along a line II-II.

A plurality of data lines 171, a plurality of storage electrode lines 172, and light on an insulating substrate 110 made of transparent glass, silicon, or plastic. The blocking film 174 is formed.

The data line 171 transmits a data signal and mainly extends in the vertical direction. Each data line 171 includes a plurality of projections 173 protruding sideways and a wide end portion 179 for connection with another layer or an external driving circuit. A data driving circuit (not shown) for generating a data signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 can extend and be directly connected thereto.

The storage electrode line 172 receives a predetermined voltage and extends substantially in parallel with the data line 171. Each storage electrode line 172 is positioned between the two data lines 171 and is close to the right side of the two data lines 171. The storage electrode line 172 includes a storage electrode 177 which is divided laterally to form a circle. However, the shape and arrangement of the storage electrode line 172 may be modified in various ways.

The light blocking film 174 is separated from the data line 171 and the storage electrode line 172.

The data line 171, the storage electrode line 172, and the light blocking film 174 may be formed of aluminum-based metal such as aluminum (Al) or aluminum alloy, silver-based metal such as silver (Ag) or silver alloy, gold (Ag), gold alloy, or the like. Gold-based metals, copper-based metals such as copper (Cu) and copper alloys, molybdenum-based metals such as molybdenum (Mo) and molybdenum alloys, and may be made of chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multi-film structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having a low resistivity, for example, an aluminum-based metal, a silver-based metal, or a copper-based metal to reduce signal delay and voltage drop. On the other hand, other conductive films have excellent adhesion to the substrate 110 or have physical, chemical and electrical contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals and chromium. Made of tantalum, titanium, etc. Examples of such a combination include a chromium lower layer, an aluminum (alloy) upper layer, an aluminum (alloy) lower layer, and a molybdenum (alloy) upper layer. However, the data line 171 and the storage electrode line 172 may be made of various other metals or conductors.

The side surfaces of the data line 171, the storage electrode line 172, and the light blocking layer 174 are inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

An interlayer insulating layer 160 is formed on the data line 171, the storage electrode line 172, and the light blocking layer 174. The interlayer insulating layer 160 may be made of an inorganic insulator such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ), and may have a thickness of about 2000 to 5000 kPa.

The interlayer insulating layer 160 has a plurality of contact holes 163 and 162 exposing the protrusion 173 and the end portion 179 of the data line 171, respectively.

A plurality of source electrodes 193, a plurality of pixel electrodes 191, and a plurality of contact assistants 82 are formed on the interlayer insulating layer 160.

The source electrode 193 may be an island type and is connected to the data line 171 through the contact hole 163.

A portion of the pixel electrode 191 facing the source electrode 193 forms a drain electrode 195 and receives a data signal. The pixel electrode 191 includes a portion at least partially overlapping the storage electrode line 172, which forms a storage capacitor for enhancing the voltage holding capability.

The contact auxiliary member 82 is connected to the end portion 179 of the data line 171 through the contact hole 162. The contact assistant 82 serves to protect and protect the adhesion between the end portion 179 of the data line 171 and an external device such as a driving integrated circuit, and is not essential. to be.

The source electrode 193, the pixel electrode 191, and the contact auxiliary member 82 may be made of a transparent conductive material such as IZO or ITO, or a conductive material having high reflectivity.

In particular, since the source electrode 193 and the drain electrode 195 are in direct contact with the organic semiconductor, they are made of a conductive material having a large difference in work function from the organic semiconductor, and accordingly, the Schottky is formed between the organic semiconductor and the electrode. The schottky barrier can be lowered to facilitate carrier injection and movement. Such materials include IZO or ITO.

The partition wall 140 is formed on the entire surface of the substrate including the source electrode 193, the pixel electrode 191, and the interlayer insulating layer 160. The partition wall 140 may be made of a photosensitive organic material capable of solution processing, and may have a thickness of about 5000 mm to 4 μm.

The partition wall 140 has a plurality of openings 147 exposing the source electrode 193 and the drain electrode 195 and the interlayer insulating layer 160 therebetween.

The partition wall 140 is formed in an inverse taper structure around the opening 147. Accordingly, as shown in FIG. 2, the opening 147 has a lower portion than the upper portion, and an acute edge between the source and drain electrodes 193 and 195 and the partition wall 140 at the lower portion of the opening 147. A portion A is formed.

A plurality of island type organic semiconductor islands 154 are formed in the opening 147 of the partition wall 140.

The organic semiconductor 154 may be formed by a solution process such as an inkjet printing method. The solution process goes through supplying the organic semiconductor solution to the opening 147 and drying the solution. At this time, since the organic semiconductor solution is filled in close contact with the partition wall 140 by affinity with the partition wall 140, the organic semiconductor 154 is formed to have substantially the same shape as the opening 147. Meanwhile, in the drying step, since the volatilization rate of the solvent is different in the peripheral portion and the central portion of the partition wall 140, the thickness of the organic semiconductor 154 may be formed in the peripheral portion and the central portion of the partition wall 140.

At this time, since the partition wall 140 is formed in a reverse tapered structure, a thicker portion of the organic semiconductor 154 may be filled in the edge portion A of the opening 147 so that the center portion where the channel is formed is uniform in thickness. It can be formed as. Therefore, even when the organic semiconductor 154 is formed by a solution process such as an inkjet method, the portion where the channel is formed may be formed to have a uniform thickness, and thus does not affect the thin film transistor characteristics.

The organic semiconductor 154 is in contact with the source electrode 193 and the drain electrode 195, and the height of the organic semiconductor 154 is lower than that of the partition wall 140 so as to be completely trapped by the partition wall 140. As described above, since the organic semiconductor 154 is completely trapped by the partition wall 140 and the side surface is not exposed, it is possible to prevent the chemical liquid from penetrating into the side surface of the organic semiconductor 154 in a subsequent process.

In addition, the organic semiconductor 154 is formed on the light blocking layer 174. The light blocking layer 174 prevents light supplied from the backlight from directly flowing into the organic semiconductor 154 to prevent a sudden increase in photoleakage current in the organic semiconductor 154.

The organic semiconductor 154 may include a high molecular compound or a low molecular compound dissolved in an aqueous solution or an organic solvent.

The organic semiconductor 154 may comprise a derivative comprising a substituent of tetracene or pentacene. The organic semiconductor 154 may also include an oligothiophene comprising 4 to 8 thiophenes connected at the 2, 5 positions of the thiophene ring.

The organic semiconductor 154 may be polythienylenevinylene, poly-3-hexylthiophene, polythiophene, phthalocyanine, metallized phthalocyanine or metallized phthalocyanine thereof. Halogenated derivatives. The organic semiconductor 154 may also include perylenetetracarboxylic dianhydride (PTCDA), naphthalenetetracarboxylic dianhydride (NTCDA), or an imide derivative thereof. The organic semiconductor 154 may include a derivative including perylene or coronene and substituents thereof.

The organic semiconductor 154 may have a thickness of about 300 GPa to 3,000 GPa.

The gate insulating member 146 is formed on the organic semiconductor 154. The gate insulating member 146 is also lower than the barrier rib 140 and completely trapped in the barrier rib 140.

The gate insulating member 146 is made of an organic material or an inorganic material. Examples of such organic materials include soluble polymer compounds such as polyimide compounds, polyvinyl alcohol compounds, polyfluorane compounds, and parylene, and inorganic materials. Examples include silicon oxide surface treated with octadecyl trichloro silane (OTS).

A blocking member 126 is formed on the gate insulating member 146. The blocking member 126 protects the gate insulating member 146 and the organic semiconductor 154 and may be made of IZO or ITO.

A plurality of gate lines 121 are formed on the blocking member 126 and the partition wall 140.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction to cross the data line 171 and the storage electrode line 172. Each gate line 121 includes a plurality of gate electrodes 124 protruding upwards and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) that generates a gate signal is mounted on a flexible printed circuit film (not shown) attached over the substrate 110, directly mounted on the substrate 110, or integrated into the substrate 110. Can be. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The gate electrode 124 overlaps the organic semiconductor 154 with the gate insulating member 146 interposed therebetween, and is formed to have a size that completely covers the blocking member 126 on the blocking member 126. The blocking member 126 may enhance the adhesion between the gate electrode 124 and the gate insulating member 146 to prevent the gate electrode 124 from lifting.

The gate line 121 may be made of the same material as the data line 171 and the storage electrode line 172.

The side surface of the gate line 121 is also inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

One gate electrode 124, one source electrode 193, and one drain electrode 195 form one thin film transistor together with the organic semiconductor 154, and a channel of the thin film transistor is a source electrode 193. And an organic semiconductor 154 between the drain electrode 195.

The pixel electrode 191 generates an electric field together with a common electrode (not shown) of another display panel (not shown) that receives a data voltage from a thin film transistor and receives a common voltage. The direction of the liquid crystal molecules of the liquid crystal layer (not shown) in between is determined. The pixel electrode 191 and the common electrode form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The protection member 180 is formed on the gate electrode 124. The protection member 180 is to protect the organic thin film transistor, and may be formed on a portion or the entire surface of the substrate, and may be omitted in some cases.

Next, a method of manufacturing the organic thin film transistor illustrated in FIGS. 1 and 2 will be described in detail with reference to FIGS. 3 to 14.

 3, 5, 7, 11, and 13 are layout views at an intermediate stage of a method of manufacturing the organic thin film transistor array panel of FIGS. 1 and 2 according to an embodiment of the present invention, and FIG. FIG. 6 is a cross-sectional view of the organic thin film transistor array panel of FIG. 5 taken along the line IV-IV. FIG. 6 is a cross-sectional view of the organic thin film transistor array panel of FIG. 5 taken along the line VI-VI. 9 is a cross-sectional view illustrating a continuous process in a manufacturing step of the organic thin film transistor array panel of FIG. 8, and FIG. 12 is a cross-sectional view of the organic thin film transistor array panel of FIG. 11. FIG. 14 is a cross-sectional view taken along the line XII-XII, and FIG. 14 is a cross-sectional view taken along the line XIV-XIV of the organic thin film transistor array panel of FIG. 13.

First, a metal layer is stacked on the substrate 110 by a method such as sputtering and photo-etched, thereby as shown in FIGS. 3 and 4, as illustrated in FIGS. 3 and 4, a data line including a protrusion 173 and an end portion 179. 171, the storage electrode line 172 including the storage electrode 177, and the light blocking film 174 are formed.

Next, as shown in FIGS. 5 and 6, silicon nitride is chemical vapor deposited (CVD) to form an interlayer insulating film 160, a photoresist film is coated on the interlayer insulating film 160, and photo-etched to contact holes. 162 and 163 are formed.

Next, as shown in FIGS. 7 and 8, after the sputtering of ITO or IZO, photolithography is performed to etch the pixel electrode 191 including the source electrode 193, the drain electrode 195, and the contact auxiliary member 82. Form.

Next, as shown in FIG. 9, a photosensitive organic film is coated on the entire surface of the substrate, a metal layer is formed thereon, and the metal pattern 10 is formed by photo etching. In this case, the metal layer is formed of a metal different from that of the source electrode 193 and the pixel electrode 191.

Subsequently, the partition wall is formed by dry etching the photosensitive organic layer using the metal pattern 10 as a mask and removing the metal pattern 10 to form a reverse tapered structure around the opening 147 as shown in FIG. 10. Complete 140.

In the above, only the method of forming the reverse tapered structure by dry etching is described, but the barrier 140 having the reverse tapered structure may be formed by applying a negative photosensitive organic material.

Next, as shown in FIGS. 11 and 12, an organic semiconductor 154 is formed in the opening 147. The organic semiconductor 154 is formed by the inkjet method. An inkjet nozzle (not shown) is first placed over the opening 147, and then the organic semiconductor solution is dropped and dried.

Subsequently, a gate insulating member 146 is formed on the organic semiconductor 154. The gate insulating member 146 may also be formed by an inkjet method, and the gate insulating member solution is added dropwise and dried as above.

Next, as shown in FIGS. 13 and 14, a blocking member 126 having a size covering the organic semiconductor 154 is formed.

Subsequently, the metal layer is stacked and photo-etched to form a gate line 121 including the gate electrode 124 and the end portion 129 by sputtering or the like.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of the invention.

The thin film transistor characteristics may be improved by forming a portion in which the channel is formed in the organic semiconductor with a uniform thickness.

Claims (17)

delete delete delete delete delete delete delete delete delete delete delete Forming a first signal line on the substrate, Forming an interlayer insulating film having a plurality of contact holes on the first signal line; Forming a pixel electrode on the interlayer insulating layer, the pixel electrode including a source electrode connected to the first signal line and a drain electrode facing the first signal line through the contact hole; Forming a photoresist film on the source electrode and the pixel electrode; Removing a portion of the photoresist to form an opening having a lower portion than the upper portion, Forming an organic semiconductor in the opening in a solution process manner to contact the sidewall of the opening, Forming a gate insulating member on the organic semiconductor, and Forming a second signal line including a gate electrode on the gate insulating member; Method of manufacturing a thin film transistor array panel comprising a. The method of claim 12, The forming of the gate insulation member is a method of manufacturing a thin film transistor array panel. The method of claim 12, And the photosensitive film is formed by applying a negative photosensitive material. The method of claim 12, The opening is formed by dry etching the photosensitive film. 16. The method of claim 15, Forming the opening Forming a metal layer on the photosensitive film; Photo-etching the metal layer to form a metal pattern; Dry etching the photosensitive film using the metal pattern as a mask, and Removing the metal pattern Method of manufacturing a thin film transistor array panel comprising a. 17. The method of claim 16, The metal layer may be formed of a material different from that of the source electrode and the drain electrode.

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