KR101238823B1 - The thin film transistor and the manufacuring method thereof - Google Patents

Abstract

The present invention relates to a method for manufacturing a thin film transistor, the present invention includes forming a semiconductor thin film with a boron doped zinc oxide-tin compound on a substrate, and patterning the semiconductor thin film to form a channel . Therefore, the boron-doped ZTO thin film can be manufactured in a low temperature process of less than 300 degrees, can be used for low-temperature substrates and low-cost glass substrates, and the uniformity of the device can be greatly increased by using boron-doped ZTO channels. It can increase. In addition, the electrical characteristics are dramatically improved compared to the existing ZTO channel by increasing mobility by about 50%.

Oxide thin film transistor, ZTO, transparent electronic device

Description

Thin Film Transistors and Manufacturing Method Thereof {THE THIN FILM TRANSISTOR AND THE MANUFACURING METHOD THEREOF}

The present invention relates to a thin film transistor. In particular, the present invention relates to an oxide thin film transistor in transparent electron irradiation and a method of manufacturing the same.

The present invention is derived from the research conducted as part of the IT source technology development project of the Ministry of Knowledge Economy and the Ministry of Information and Communication Research and Development. [Task management number: 2006-S-079-03, Task name: Smart window using transparent electronic device] .

Currently, for thin film transistors used in integrated circuits and display circuits, semiconductors of various materials are used as channels.

However, the zinc oxide film used as a channel in a typical oxide thin film transistor has a problem in stability because the characteristics of the thin film can be sensitively changed in air humidity, heat treatment, manufacturing process, etc., and it may cause a problem in device uniformity as a crystalline channel. In addition, device deformation with respect to current and light can be serious.

Therefore, when IGZO material in which indium and gallium oxide are applied to zinc oxide is used, the properties are improved, but indium and gallium are depleted resources, and the price is high, which leads to a problem of lower competitiveness. In addition, the oxide thin film transistor also has a disadvantage in that the stability against the current is poor due to the interface between the channel thin film or the gate insulating film.

In silicon-based thin film transistors, amorphous silicon has a low mobility problem, and in polycrystalline silicon, the uniformity problem is a major disadvantage for the large size of the panel. In particular, amorphous silicon transistors are vulnerable to stability with current.

Meanwhile, although the insulating film and the semiconductor are required to be transparent in the thin film transistor in the transparent electronic device, not only the silicon-based thin film transistor but also ZnS, ZnSe, CdS, and the like may be opaque, thereby limiting the application of the transparent electronic device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor of a transparent electronic device and a method for manufacturing the transparent electronic device having a low temperature process, good interface characteristics with a gate insulating film, and a method for forming a channel layer of a thin film transistor.

According to another aspect of the present invention, a method of manufacturing a thin film transistor includes forming a semiconductor thin film with a boron doped zinc oxide-tin compound on a substrate, and patterning the semiconductor thin film to form a channel.

The atomic ratio content of tin to zinc in the boron-doped zinc oxide-tin compound may satisfy 4: 1 to 2: 1 at a process temperature of 300 ° C. or lower and 4: 1 to 1: 4 at 300 ° C. or higher. Can be.

The boron may satisfy 0.001% to 10% of the sum of zinc and tin in the zinc oxide-tin compound.

After forming the semiconductor thin film, the method may further include forming a channel protective layer on the semiconductor thin film.

The channel protective layer may be formed to have a thickness of 1 to 20 nm, and may be patterned together with the semiconductor thin film.

The channel protective layer may be formed by stacking aluminum oxide, silicon oxide, or silicon nitride by sputtering, chemical vapor deposition, or atomic layer deposition.

The method may further include forming a gate insulating film on the channel, and forming a gate electrode on the gate insulating film.

The method may further include forming a gate electrode on the substrate, and forming a gate insulating layer between the gate electrode and the channel.

The channel layer, the channel protection layer, and the gate insulating layer may be formed of a transparent element.

In addition, in a thin film transistor including a source / drain electrode, a semiconductor channel, a gate insulating film, and a gate electrode on a substrate according to the present invention, the semiconductor channel connects the source / drain electrodes and is boron-doped zinc oxide. It is formed of a compound of tin.

In the zinc oxide-tin compound, the content of tin to zinc may satisfy 4: 1 to 2: 1 at a process temperature of 300 ° C. or less, and 4: 1 to 1: 4 at 300 ° C. or more.

The amount of boron doped may satisfy 0.001% to 10% of the sum of zinc and tin in the zinc oxide-tin compound.

A channel protection layer may be further included on the semiconductor channel.

The channel protective layer has a thickness of 1 to 20 nm, and may have the same pattern as the channel layer.

The channel protective layer may be formed of aluminum oxide, silicon oxide, or silicon nitride.

In the thin film transistor, the gate insulating film and the gate electrode may be sequentially stacked on the channel.

 In the thin film transistor, the gate electrode and the gate insulating layer may be sequentially stacked between the substrate and the channel.

According to the present invention, the boron-doped ZTO thin film in the amorphous state can be manufactured by using a low temperature process of 300 degrees or less, and can be used for low temperature substrates and low-cost glass substrates. Uniformity can be greatly increased. In addition, the electrical characteristics such as increased mobility of about 50% compared to the existing ZTO channel is dramatically improved, so that the utilization of the device is greatly increased, while suppressing the use of expensive In and Ga, the characteristics of the transparent electronic device are improved. It can be secured.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

Throughout the specification, when a part is said to "include" a certain component, it means that it can further include other components, without excluding other components unless specifically stated otherwise.

Hereinafter, a thin film transistor according to the present invention will be described.

1 is a cross-sectional view of a thin film transistor according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view of a thin film transistor according to a second embodiment of the present invention, and FIG. 3 is a thin film transistor according to a third embodiment of the present invention. 4 is a thin film transistor according to a fourth embodiment of the present invention.

Referring to FIG. 1, the thin film transistor according to the first exemplary embodiment of the present invention is a staggered transistor in which source / drain electrodes 110a and 110b are separated on the substrate 100. The semiconductor channel 120 is formed to connect the source / drain electrodes 110a and 110b to cover the exposed substrate 100 between the source / drain electrodes 110a and 110b. The semiconductor channel 120 has a tin atom ratio of 4: 1 to 2: 1 in the ZnO-based three-component monolayer channel, and is doped with boron.

The gate insulating layer 130 is formed to cover the source / drain electrodes 110a and 110b and the channel 120, and the gate electrode 140 is formed to face the channel 120 on the gate insulating layer 130. have.

The thin film transistor may further include a channel passivation layer 125 on the channel 120, and the gate insulating layer 130, the channel passivation layer 125, and the channel 120 are all formed of a transparent material to form a transparent electronic device. It acts as a thin film transistor of.

In the case of the thin film transistor of FIG. 2, a coplanar thin film transistor, unlike FIG. 1, a semiconductor channel 220 and a channel protection layer 225 are first formed on a substrate 200, and are separated from each other. The source / drain electrodes 210a and 210b and the source / drain electrodes 210a and 210b and the gate insulating film 230 and the gate electrode 240 covering the channel 220 are sequentially stacked. .

The thin film transistor of FIG. 3 is an inverted stagger type, in which a gate electrode 310 and a gate insulating layer 320 are sequentially stacked on the substrate 300, and source / drain electrodes 330a and 330b are separated from each other. The channel 340 and the channel protective layer 350 are formed to cover the source / drain electrodes 330a and 330b.

The thin film transistor of FIG. 4 is an inverted coplanar type in which a gate electrode 410 and a gate insulating film 420 are formed on a substrate 400, and a channel 430 and a channel protective layer 435 are formed thereon. The source / drain electrodes 440a and 440b are formed at both sides of the channel 430.

The channels 120, 220, 340, and 440 of the thin film transistors of the first to fourth embodiments of the present invention are ZnO-based three-component monolayer channels, and have a tin atomic ratio of 4: 4 to the zinc composition ratio when mixed with tin oxide. 1 to 2: 1, and is optimized at the interface with the gate insulating film 130, 230, 320, 420 at a process temperature of 300 degrees or less. In this case, the gate insulating layers 130, 230, 320, and 420 may be alumina, and a silicon nitride layer and a silicon oxide layer may be used as the gate insulating layers 130, 230, 320, and 420.

In addition, the thin film transistor of the present invention is doped with boron in the zinc-tin-oxide (ZTO) to optimize the interface characteristics between the oxide channel and the gate insulating layer (130, 230, 320, 420), Increases and decreases the value of the sub-threshold swing significantly. That is, boron increases the carrier concentration of the ZTO channels 120, 220, 340, 440, and improves the surface properties, positively affects mobility and SS value.

As a result, the low-temperature fabrication of thin film transistors using oxide channels can enhance the application possibilities of transparent and stable devices, from medical LCDs to automotive HUD (HEAD UP DISPLAY) products, as well as conventional LCD and OLED driving devices.

Hereinafter, a method of manufacturing a thin film transistor according to a first embodiment of the present invention will be described with reference to FIGS. 5A to 5F.

5A through 5F are cross-sectional views illustrating a method of manufacturing the thin film transistor of FIG. 1.

First, as illustrated in FIG. 5A, the conductive material 110 for forming the source / drain electrodes is stacked on the substrate 100 and patterned to be spaced apart from the channel region to form the source / drain electrodes 110a and 110b.

Next, as shown in FIG. 5B, the channel material layer 120a is stacked to cover the exposed substrate 100 between the source / drain electrodes 110a and 110b and the source / drain electrodes 110a and 110b. The channel material layer 120a may be deposited through sputtering, pulsed laser deposition (PLD), ion beam deposition, or the like.

In this case, the channel material layer 120a is boron added to the zinc-tin oxide having an atomic ratio content of tin to zinc in the range of 4: 1 to 2: 1, and may be formed by sputtering it as a target. Thereafter, heat treatment is performed at a low temperature of 300 degrees or less to form boron-doped ZTO of the amorphous oxide film. Alternatively, when formed at a high temperature of 300 degrees or more, the tin content of zinc may be increased to 4: 1 to 1: 4, and the process may be performed to less than about 450 degrees, the temperature at which an amorphous state is maintained.

At this time, the concentration of boron satisfies 0.001% to 10% in atomic weight with respect to the sum of zinc and tin.

Meanwhile, as shown in FIG. 5C, after forming ZTO, the channel material layer 120a, boron may be doped, and the doping concentration may satisfy 0.001% to 10% by atomic weight with respect to the sum of zinc and tin.

Next, as shown in FIG. 5D, the channel protection layer 125 is stacked on the channel material layer 120a.

The channel protective layer 125 may have a thickness of 1 to 20 nm and may be formed of an insulating film, such as AlOx, SiNx, or SiOx. The channel material layer 120a and the channel protection layer 125 may be formed by stacking and patterning a photoresist, performing wet and dry etching, and ion milling to form a source / drain electrode (see FIG. 5E). Contacting 110a and 110b and patterning a channel on the substrate 100 between the source / drain electrodes 110a and 110b.

At this time, the lift-off pattern may be formed of the photoresist, but the photoresist is vulnerable to the ZTO deposition temperature, so it is applied at less than 150 degrees.

Next, as shown in FIG. 5F, the gate insulating layer 130 is formed to cover the source / drain electrodes 110a and 110b and the channel.

The gate insulating layer 130 deposits an insulating layer by atomic layer deposition (ALD), and forms a metal-insulator-semiconductor (MIS) capacitor by using the same.

In this case, in the case of using alumina as the gate insulating layer 130, the deposition is performed at 100 degrees to 250 degrees, and the device heat treatment process is performed at 300 degrees or less, preferably at 200 degrees to 300 degrees.

The alumina gate insulating film 130 can be grown by plasma enhanced chemical vapor deposition (PECVD) or metal organic chemical vapor deposition (MOCVD) in addition to the atomic layer deposition method. In the case of forming it, it is grown between 100 and 300 degrees.

The optimal temperature is obtained by experimentally measuring the change of MIS capacitance with the heat treatment temperature.

In the case of the boron-doped ZTO channel, the substrate temperature can be heat treated up to 200 degrees at room temperature, and the post-heat treatment temperature can be adjusted within 300 degrees.

Hereinafter, the effects of the thin film transistor according to the present invention will be described with reference to FIGS. 6 and 7.

6 is a characteristic curve of a thin film transistor having a ZTO channel, Figure 7 is a characteristic curve of a thin film transistor having a boron doped ZTO channel according to the present invention.

The thin film transistors of FIGS. 6 and 7 are all staggered types, and the channels are deposited at room temperature, and after heat treatment at 300 ° C., the characteristics are evaluated.

All the materials of the thin film transistor are made of transparent materials.The source / drain and gate electrodes are made of transparent materials such as indium-tin-oxide (ITO) or metal materials such as Mo and Au / Ti, and the insulator is made of alumina. The device is optimized to have an average transmittance of 80% or more in the ultraviolet-infrared region. In addition, the Zn: Sn ratio of each channel satisfy | fills 3: 1 by atomic weight ratio.

The thickness of the channel is 20 nm, the thickness of the alumina channel protective layer is 10 nm, the thickness of the alumina gate insulating film is 190 nm, and the ITO electrode is 150 nm.

The channel layer and the channel protective layer were patterned by wet etching the diluted HF-based solution, and ITO and alumina were performed by the wet etching method.

In addition, ITO deposited by sputtering was etched at 50 degrees using a mixture of phosphoric acid and nitric acid, and alumina was formed by atomic layer thin film deposition, PECVD, MOCVD, etc., and etching was performed by heating the phosphoric acid solution to 120 degrees. It was performed later.

6 and 7, the mobility of the thin film transistor of FIG. 7 doped with boron is about 50% higher than that of the thin film transistor of FIG. 6 without boron doping, and the SS value is about 1/2. It can be seen that the properties have been significantly improved.

Hereinafter, an application method of the thin film transistor of the present invention will be described with reference to FIGS. 8 to 18.

The transparent thin film transistor to which the ZTO channel of the present invention is applied is applied to the circuit design of various transparent electric elements as well as a display.

In particular, the medical transparent display panel of FIG. 8, applied to an electronic circuit as shown in FIG. 9, or a UV PD as shown in FIG. 10, a transparent LED of FIG. 11, a bidirectional transparent monitor of FIG. 12, and a panel as a driving element of the LCD and OLED of FIG. 13. Applicable to

In addition, an amorphous ZTO thin film transistor may be used for the transparent RFID of FIG. 14, a smart window capable of simultaneously performing the transparent glass window of FIG. 15 and a display function, and a HUD of an automobile and an aircraft of FIG. 16, and a head mounted display of FIG. 17. Thin film transistors having amorphous ZTO channels can be used for (HMD) and the general purpose transparent display or transparent flexible display of FIG. 18.

The embodiments of the present invention described above are not implemented only through the apparatus and the method, but may be implemented through a program for realizing a function corresponding to the configuration of the embodiment of the present invention or a recording medium on which the program is recorded. Implementation may be easily implemented by those skilled in the art from the description of the above-described embodiments.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

1 is a cross-sectional view of a thin film transistor according to a first exemplary embodiment of the present invention.

2 is a cross-sectional view of a thin film transistor according to a second exemplary embodiment of the present invention.

3 is a thin film transistor according to a third embodiment of the present invention.

4 is a thin film transistor according to a fourth embodiment of the present invention.

5A through 5F are cross-sectional views illustrating a method of manufacturing the thin film transistor of FIG. 1.

6 is a characteristic curve of a thin film transistor having a ZTO channel.

7 is a characteristic curve of a thin film transistor having a boron doped ZTO channel according to the present invention.

8 to 18 are photographs showing an application field of the thin film transistor according to the present invention.

Claims (17)

Forming a semiconductor thin film with a boron doped zinc oxide-tin compound on a substrate, and Patterning the semiconductor thin film to form a channel Method of manufacturing a thin film transistor comprising a. The method of claim 1, The atomic ratio content of tin to zinc in the boron-doped zinc oxide-tin compound is 4: 1 to 2: 1 at a process temperature of 300 ° C. or lower, and 4: 1 to 1: 4 at 300 ° C. or higher. Method of manufacturing a thin film transistor. The method of claim 1, Wherein the boron satisfies 0.001% to 10% of the sum of zinc and tin in the zinc oxide-tin compound. 4. The method according to any one of claims 1 to 3, After forming the semiconductor thin film, further comprising forming a channel protective layer on the semiconductor thin film Method of manufacturing a thin film transistor. 5. The method of claim 4, The channel protective layer is formed to have a thickness of 1 ~ 20nm, and patterned together with the semiconductor thin film Method of manufacturing a thin film transistor. The method of claim 5, The channel protective layer is formed by stacking aluminum oxide, silicon oxide, or silicon nitride by sputtering, chemical vapor deposition, or atomic layer deposition. Method of manufacturing a thin film transistor. 5. The method of claim 4, Forming a gate insulating film on the channel, and Forming a gate electrode on the gate insulating film Further comprising Method of manufacturing a thin film transistor. 5. The method of claim 4, Forming a gate electrode on the substrate, and Forming a gate insulating film between the gate electrode and the channel Further comprising Method of manufacturing a thin film transistor. The method of claim 7, wherein The channel, the channel protective layer and the gate insulating layer are formed of a transparent element Method of manufacturing a thin film transistor. A thin film transistor comprising a source / drain electrode, a semiconductor channel, a gate insulating film, and a gate electrode on a substrate,  The semiconductor channel is A connection between the source / drain electrodes and formed of boron-doped zinc oxide-tin compound Thin film transistor. The method of claim 10, In the zinc oxide-tin compound, the content of tin to zinc is 4: 1 to 2: 1 at a process temperature of 300 ° C. or lower, and 4: 1 to 1: 4 at 300 ° C. or higher. Thin film transistor. The method of claim 10, The amount of boron doped satisfies 0.001% to 10% of the sum of zinc and tin in the zinc oxide-tin compound Thin film transistor. 13. The method according to claim 11 or 12, Further comprising a channel protective layer on the semiconductor channel Thin film transistor. 14. The method of claim 13, The channel protective layer has a thickness of 1 ~ 20nm, and has the same pattern as the channel Thin film transistor. The method of claim 14, The channel protective layer is formed of aluminum oxide, silicon oxide or silicon nitride Thin film transistor. The method of claim 10, In the thin film transistor, the gate insulating film and the gate electrode are sequentially stacked on the channel. Thin film transistor. The method of claim 10, In the thin film transistor, the gate electrode and the gate insulating layer are sequentially stacked between the substrate and the channel. Thin film transistor.

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