KR100997323B1 - A rfid tag with an encryption funtion - Google Patents

Abstract

The present invention relates to an RFID system having an RFID tag having an encryption function.

Specifically, the RFID tag of the present invention generates key data and plane data in response to a command signal that demodulates an authentication signal input from an RFID reader, and encrypts the plane data with an encryption signal using the key data. And transmitting the encrypted signal to the RFID reader.

RFID, Tag, Reader, Password, Demodulation, Modulation, Authentication, Key Data, Plain Data

Description

RFID tag with encryption {A RFID TAG WITH AN ENCRYPTION FUNTION}

The present invention relates to an RFID tag having an encryption function. More specifically, the authentication signal generated by the RFID reader is received from the RFID tag to generate key data and plane data, and the plane data is encrypted using the key data to transmit the encrypted signal back to the RFID reader to determine whether to authenticate. Related to an RFID tag.

RFID (Radio Frequency Identification) is a contactless automatic identification method that attaches an RFID tag to an object to be identified and automatically communicates with an RFID tag reader by transmitting and receiving using radio frequency in order to automatically identify the object using wireless radio waves. As a technology, it is a technology that can compensate for the disadvantages of the conventional automatic identification technology of barcode and optical character recognition technology. RFID systems, which have emerged since the 1980s, are also referred to as dedicated short range communication (DSRC) or wireless identification systems.

Recently, RFID devices have been used in various cases, such as logistics management systems, user authentication systems, electronic money systems, and transportation systems. For example, in the logistics management system, cargo classification or inventory management is performed using an integrated circuit (IC) tag in which data is recorded instead of a delivery slip or a tag. In the user authentication system, admission management and the like are performed using an IC card that records personal information and the like.

On the other hand, with the development of RFID technology, the size of the RFID chip becomes smaller and the communication distance becomes longer, so that anyone can access specific information from anywhere by making a disguised RFID tag. As a result, companies or individuals using RFID systems are at risk of exposing sensitive information, and encryption technologies have emerged to prevent such risks.

Encryption technology has long been used to protect information from those who are prohibited from accessing it. As an example of simple encryption, each character of the alphabet corresponds to a unique number, and these numbers are used instead of the characters to represent the information.

Anyone who knows the encryption algorithm (substitution of a unique number for each character) can decode the information and access it. However, this type of simple encryption can be easily decrypted, which leads to a problem of low reliability.

In order to solve the above problems, the present invention receives an authentication signal generated by an RFID reader from an RFID tag to generate key data and plane data, and encrypts the plane data using the key data to convert the encrypted signal to the RFID reader. It is associated with an RFID tag that is sent back to determine whether to authenticate.

The present invention generates key data and plane data in response to a command signal demodulated from an authentication signal input from an RFID reader, encrypts the plane data into an encrypted signal using the key data, and encrypts the encrypted signal into the RFID reader. It discloses an RFID tag characterized in that the transmission to.

Additionally, the present invention provides an analog block for demodulating an authentication signal input from an RFID reader to generate a command signal, and generates key data and plane data corresponding to the command signal, and encrypts the plane data using the key data. An RFID tag comprising a digital block encrypted with a signal, wherein the analog block modulates the encrypted signal and transmits the encrypted signal to the RFID reader.

First, the present invention has the advantage that the reliability of the security can be improved by encrypting the signal transmitted from the RFID reader in the RFID tag and transmitting it to the RFID reader.

Secondly, the present invention has an advantage that it can be easily applied to an existing international standard RFID system as an RFID tag using DES / 3-DES or RSA / ECC.

In view of the above advantages, the present invention may be widely used in the field of checking whether a specific product is genuine by recognizing an encrypted RFID tag using an RFID reader. For example, the RFID tag of the present invention may be widely applied to genuine identification of products such as expensive liquor, expensive handbags, and clothing.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is an overall configuration diagram of an RFID tag according to the present invention.

Referring to FIG. 1, an RFID tag according to the present invention includes an analog block 100, a digital block 200, and a memory 300.

Here, the analog block 100 may include a voltage multiplier 110, a modulator 120, a demodulator 130, a clock generator 140, and a power on reset unit 150. It includes.

The antenna unit 10 of the analog block 100 serves to transmit and receive data between the RFID reader and the RFID tag. The voltage multiplier 110 rectifies and boosts the radio frequency signal received from the antenna unit 10 to generate a power supply voltage VDD which is a driving voltage of the RFID.

The modulator 120 modulates the encrypted response signal RP applied from the digital block 200 and transmits the modulated response signal RP to the antenna unit 10.

The demodulator 130 detects an operation command signal from a radio frequency signal applied from the antenna unit 10 according to the output voltage of the voltage multiplier 110 and outputs the command signal CMD to the digital block 200.

The clock generator 140 supplies the clock CLK for controlling the operation of the digital block 200 to the digital block 200 according to the output voltage VDD of the voltage multiplier 110.

The power-on reset unit 150 detects the output voltage VDD of the voltage multiplier 110 and outputs a power-on reset signal POR for controlling the reset operation to the digital block 200.

The digital block 200 receives the power supply voltage VDD, the power-on reset signal POR, the clock CLK, and the command signal CMD from the analog block 100 to interpret the command signal CMD and generate control signals and processing signals. In particular, the digital block 200 operates an encryption circuit according to the command signal CMD to output the encrypted response signal RP to the analog block 100.

The digital block 200 outputs an address ADD, input / output data I / O, a control signal CTR, and a clock CLK to the memory 300. The memory 300 reads / writes data using a memory device.

As the memory 300, a nonvolatile ferroelectric memory (FeRAM) may be used. FeRAM has a data processing speed of about DRAM (DRAM). In addition, FeRAM has a structure almost similar to DRAM, and has a high residual polarization characteristic of the ferroelectric by using a ferroelectric as the material of the capacitor. This residual polarization does not erase the data even when the electric field is removed.

2 shows a digital block of an RFID tag according to a first embodiment of the present invention. The first embodiment of the present invention shows an RFID tag using a serial data transmission scheme, and signals in the RFID tag are transmitted and received serially.

Referring to FIG. 2, the digital block 200 of the RFID tag according to the present invention includes an encryption processor 210 and an encryption signal output processor 220.

The encryption processor 210 receives the command signal CMD input from the analog block 100 in a serial manner and receives a command signal divider 217 and a command signal CMD distributed by the command signal divider 217. A plane data input processor for receiving the command signal CMD distributed by the key data storage register 215 for storing the key data KD output from the processor 211 and the key data input processor 211 and the command signal distributor 217 ( 212, a plane data storage register 216 for storing the plane data PD output from the plane data input processor 212, and a mode processor 213 for receiving the command signal CMD distributed by the command signal distributor 217; And an encryption processor 214 activated by the activation signal DN output from the mode processor 213 to perform an encryption operation.

In an RFID tag using a serial data transmission method according to the first embodiment of the present invention, a signal is transmitted and received serially. Therefore, when the command signal CMD is to be input to the plurality of processors 211, 212, 213, the command signal CMD cannot be input to the plurality of processors 211, 212, 213 at the same time, and a separate device that sets the order so that the command signal CMD is input to each processor. Is needed. In the first embodiment of the present invention, the command signal divider 217 plays this role.

When the command signal CMD is input, the command signal distributor 217 outputs the command signal CMD in the order of, for example, the key data input processor 211, the plane data input processor 212, and the mode processor 213. This order is exemplary and there is no problem in achieving the object of the present invention even if the order is changed. Hereinafter, it is assumed that the command signal CMD is output in the order of the key data input processor 211, the plane data input processor 212, and the mode processor 213.

When the command signal CMD is input to the key data input processor 211, the key data input processor 211 generates the key data KD. The key data KD means data that is the basis for encrypting the plane data PD to be described later. The generated key data KD is output to the key data storage register 215 and stored.

When the command signal CMD is input to the plane data input processor 212, the plane data input processor 212 generates a plane data PD. The plane data PD refers to a signal containing information used in an RFID system. For example, if an RFID system is used for the recognition of a product, the plane data PD refers to unique information for identifying the product. The generated plane data PD is output to the plane data storage register 216 and stored.

When the command signal CMD is input to the mode processor 213, the mode processor 213 generates an activation signal EN. The activation signal EN refers to a signal for activating or deactivating the encryption processor 214 and the encryption signal output processor 220.

If the encryption processor 214 is activated by the activation signal EN received from the mode processor 213, the encryption processor 214 starts an encryption operation.

Encryption processor 214 receives key data KD and plane data PD from key data storage register 215 and plane data storage register 216, respectively.

The reason for storing the key data KD and the plane data PD in the key data storage register 215 and the plane data storage register 216 is because the signals in the RFID tag are transmitted in serial, so that the plane data PD and the key data are transmitted to the encryption processor 214. This is because KD cannot be input at the same time.

That is, when the key data KD and the plane data PD are generated in the key input processor 211 and the plane data input processor 212, the key data KD and the plane data PD are stored in the key data storage register 215 and the plane data storage register 216, respectively. When 214 is activated to generate the encryption signal CT, it receives serially the key data KD and the plane data PD from registers 215 and 216. The order in which the encryption processor 214 receives the key data KD and the plane data PD from the registers 215 and 216 may be received first.

The encryption processor 214 may perform an encryption operation in various ways. For example, the encryption processor 214 is an encryption technology such as Data Encryption Standard (DES) / 3-Data Encryption Standard (DES) / Rivest Shamir Adleman (RSA) / Elipstic Curve Cryto (ECC), which are asymmetric encryption standards. Can be used.

DES / 3-DES is a data encryption standard that was established in 1977 by the National Bureau of Standards (NBS), based on IBM's proposal, and was adopted by the US Federal Information Processing Standard 46 (FIPS Publication 46). DES is a type of encryption technology that uses a 64-bit key to encrypt 64-bit plain text using a combination of the former and the patient. It is designed to enable high speed processing of encryption and decryption in one large integrated circuit (LSI).

RSA is a standard for encryption using public keys and is based on the difficulty of factoring large numbers. ECC is an elliptic curve-based cipher, which replaces the finite field multiplication group used in discrete algebra with an elliptic curve group. In particular, it has comparable security with a shorter key size than other encryption schemes. For example, cryptography with an RSA 1024-bit key and an ECC 160-bit key has equivalent security. Therefore, when applied to the RSA method it can significantly reduce the speed.

The encryption processor 214 generates the encryption signal CT using the key data KD and the plane data PD by the encryption technique described above. The generated encrypted signal CT is output to the encrypted signal output processor 220.

When the encryption signal output processor 220 is activated by the activation signal EN received from the mode processor 213, the encryption signal output processor 220 converts the encryption signal CT into the response signal RP and transmits it to the modulator 120. The encrypted signal output processor 220 does not decode the encrypted signal CT, but converts the encrypted signal CT into a format that the modulator 120 can modulate.

3 shows a digital block of an RFID tag according to a second embodiment of the present invention. The second embodiment of the present invention shows an RFID tag using a parallel data transmission scheme, and signals in the RFID tag are transmitted and received in parallel.

Referring to FIG. 3, the digital block 200 of the RFID tag according to the present invention includes an encryption processor 210 and an encryption signal output processor 220.

The encryption processor 210 includes a key data input processor 211, a plane data input processor 212, and a mode processor 213 that receive a command signal CMD from the analog block 100, and output from the mode processor 213. And an encryption processor 214 that is activated by the activation signal DN to be performed to perform an encryption operation.

According to the second embodiment of the present invention, in the RFID tag using the parallel data transmission scheme, signals are transmitted and received in parallel. Therefore, when the command signals CMD are to be input to the plurality of processors 211, 212, 213, the command signals CMD are input to the respective processors 211, 212, 213 without the need for a separate distribution device.

When the command signal CMD is input to the key data input processor 211, the key data input processor 211 generates the key data KD. The key data KD means data that is the basis for encrypting the plane data PD to be described later. The generated key data KD is output to the encryption processor 216.

When the command signal CMD is input to the plane data input processor 212, the plane data input processor 212 generates a plane data PD. The plane data PD refers to a signal containing information used in an RFID system. For example, if an RFID system is used to recognize a product, the plane data PD refers to unique information for identifying the product. The generated plain data PD is output to the encryption processor 216.

When the command signal CMD is input to the mode processor 213, the mode processor 213 generates an activation signal EN. The activation signal EN refers to a signal for activating or deactivating the encryption processor 214 and the encryption signal output processor 220.

If the encryption processor 214 is activated by the activation signal EN received from the mode processor 213, the encryption processor 214 starts an encryption operation.

The encryption processor 214 receives the key data KD and the plane data PD from the key data input processor 211 and the plane data input processor 212, respectively. When the signal is received in the parallel manner, since the key data KD and the plane data PD can be input at the same time, a separate register is not required.

The encryption processor 214 may perform an encryption operation in various ways. For example, the encryption processor 214 may use encryption techniques such as DES / 3-DES, RSA / ECC, which is an asymmetric encryption standard.

The encryption processor 214 generates the encryption signal CT using the key data KD and the plane data PD by the encryption technique described above. The generated encrypted signal CT is output to the encrypted signal output processor 220.

When the encryption signal output processor 220 is activated by the activation signal EN received from the mode processor 213, the encryption signal output processor 220 converts the encryption signal CT into the response signal RP and transmits the result to the modulator. The encrypted signal output processor 220 does not decode the encrypted signal CT, but converts the encrypted signal CT into a format that the modulator 12 can modulate.

As described above, the RFID tag transmits an encrypted signal to the RFID reader in response to a signal input from the RFID reader. The transmitting RFID reader then decrypts the encrypted signal received from the RFID tag or compares it with other signals encrypted at the RFID reader to authenticate whether the RFID reader and the RFID tag match each other.

1 is an overall configuration diagram of an RFID tag according to the present invention.

2 shows a digital block of an RFID tag according to a first embodiment of the present invention.

3 shows a digital block of an RFID tag according to a second embodiment of the present invention.

Claims (22)

delete delete delete delete delete delete delete delete delete delete An analog block which demodulates an authentication signal input from an RFID reader to generate a command signal, modulates an encryption signal, and transmits the encrypted signal to the RFID reader; And A digital block generating key data and plane data in response to the command signal, and encrypting the plane data with the encryption signal using the key data; The digital block is A key data input processor configured to generate the key data in response to the command signal; And And a plane data input processor to generate the plane data in response to the command signal. The method of claim 11, The analog block includes a demodulator for demodulating an authentication signal input from the RFID reader. The method of claim 11, The analog block comprises a modulator for modulating the encrypted signal and transmits to the RFID reader. delete The method of claim 11, The digital block is And a command signal distributor for distributing the command signals serially to the key data input processor and the plane data input processor. The method according to claim 15, The digital block is A key data storage register for storing the key data generated by the key data input processor; And And a plane data storage register for storing the plane data generated by the plane data input processor. 18. The method of claim 16, The digital block is And an encryption processor for encrypting the plane data input from the plane data storage register with the encryption signal using the key data input from the key data storage register. The method of claim 11, The digital block is And an encryption processor for encrypting the plane data input from the plane data input processor with an encryption signal using the key data input from the key data input processor. The method according to claim 17 or 18, The digital block is And a mode processor for generating an activation signal for activating the encryption processor in response to the command signal. 14. The method of claim 13, The digital block is And an encrypted signal output processor for converting the encrypted signal into a format modifiable by the modulator. The method of claim 19, And the mode processor activates the encrypted signal output processor with the activation signal. The method of claim 11, And the encrypted signal is encrypted by DES or 3-DES.

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