KR100900807B1 - Substrate for semiconductor device, method of fabricating the same and method of fabricating semiconductor device using the substrate - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for a semiconductor device that can be used in the manufacture of high power light emitting diodes (LEDs), a method for manufacturing the same, and a method for manufacturing a semiconductor device using the substrate. These substrates are formed by joining different types of substrates such as sapphire substrates and silicon substrates together, which not only reduces the steps of the semiconductor device manufacturing process but also solves the stress problems that occur during device layer growth, thereby manufacturing high quality semiconductor devices. There is an advantage.

Description

Substrate for semiconductor device, method of fabricating the same and method of fabricating semiconductor device using the substrate}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device substrate, a method of manufacturing the same, and a method of manufacturing a semiconductor device using the substrate, and more particularly, to a semiconductor device substrate, a method of manufacturing the same, and a substrate thereof, which can be used for manufacturing high-power LEDs. The present invention relates to a method for manufacturing a semiconductor device.

The LED market grew based on low-power LEDs used in portable communication devices such as mobile phones, keypads of small home appliances, and back light units of liquid crystal displays (LCDs). Recently, as the need for high-power and high-efficiency light sources for interior lighting, exterior lighting, automotive interior and exterior, and large LCD backlight units has emerged, the LED market is shifting to high-power products. In this LED market, device fabrication is fundamental and requires high technology, and price competitiveness is also very important.

A method of manufacturing a conventional LED chip will be described with reference to FIG. 1.

Conventionally, the epitaxial layer 2 of the LED structure is grown on the sapphire substrate 1 and patterned with an appropriate device layer 2a, and then a transparent electrode, a p-type metal pad 3, and an n-type metal pad 4 are formed. The process steps (above, steps (a) to (c), so-called Fab (FAB) process). Then, it goes through a post-process (steps (d) to (f)) to form the LED into a chip shape.

In handling during the manufacturing and testing process, the sapphire substrate 1 must have a sufficient thickness so that breakage or surface damage of the sapphire substrate 1 does not occur. However, a thin sapphire substrate is advantageous for miniaturization and high integration of chip components. Therefore, the post-processing step (step (d)) of grinding the sapphire substrate (1) having a thickness of 400um or more (400-450um) to a thin sapphire substrate (1a) of 100um or less using a grinding process and diamond slurry and A scribing process (step (e)) for forming the separating grooves 5 for dividing into chip shapes and a breaking process for cutting with an external force along the separating grooves 5 (step (f)). ) Is included.

However, in such a post-processing step, substrate damage or deterioration of device characteristics may occur due to stress generation by grinding and polishing processes, and device damage by lasers mainly used for scribing may also occur. This post-process is the last step in fabricating the device-fabricated substrate in the fab process. If a problem occurs in the process, not only can it generate a lot of defective products, but also lower the brightness, which is a factor that greatly affects the cost of the chip.

The technical problem to be solved by the present invention is to provide a substrate for manufacturing a semiconductor device, such as a highly integrated LED without the need for grinding and polishing process.

Another technical problem to be solved by the present invention is to provide a method of manufacturing such a substrate.

Another technical problem to be solved by the present invention is to provide a method for manufacturing a semiconductor device, such as an LED that is highly integrated and does not have a decrease in brightness using such a substrate.

A substrate according to the present invention for achieving the above technical problem is a single crystal substrate for semiconductor device manufacturing, the separation groove for separating the chip region is formed on the lower surface, and bonded to the lower surface of the single crystal substrate via an oxide film to form the single crystal substrate. A substrate comprising a heterogeneous substrate for support, which is specifically referred to herein as a "heterojunction substrate".

In the heterojunction substrate according to the present invention, the single crystal substrate may be any one of sapphire, SiC, GaAs, GaN, AlN, ZrB ₂ , LiAlO ₂ , MgO, spinel (MgAl ₂ O ₄ ), ZnO, LiGaO ₂ The oxide layer may be any one of a silicon oxide layer (SiO ₂ ), ZrO ₂ , Al ₂ O ₃ , TiO ₂ , Phosphorous Silicate Glass (PSG), and Boro-Phosphorous Silicate Glass (BPSG).

According to another aspect of the present invention, there is provided a method of manufacturing a substrate, the method comprising: forming a separation groove separating a chip region on a lower surface of a single crystal substrate for manufacturing a semiconductor device, and a heterogeneous structure for supporting the lower surface of the single crystal substrate and the single crystal substrate; Forming an oxide film on at least one of the top surfaces of the substrate, and bonding the bottom surface of the single crystal substrate and the heterogeneous substrate with the oxide film therebetween.

Through this method for manufacturing a substrate, it is possible to manufacture a heterojunction substrate according to the present invention. In this case, the bonding may be performed using a substrate bonding apparatus or through heat treatment.

According to another aspect of the present invention, there is provided a method of fabricating a semiconductor device, the method comprising: separating a single crystal substrate from a heterogeneous substrate by removing an oxide film, and manufacturing a device layer on a substrate according to the present invention. Breaking accordingly to cut into chips.

According to the present invention, there is provided a substrate capable of manufacturing a semiconductor device, such as a high-integrated LED, without the need for grinding and polishing process, there is no fear of occurrence of problems such as lowering of the productivity and improved productivity when manufacturing the device using such a substrate .

The present invention provides a heterojunction substrate, a method of manufacturing the same, and a method of manufacturing a semiconductor device using the same, which enables the post-processing step only by wet etching and breaking.

When fabricating a device such as an LED using the heterojunction substrate according to the present invention, the process cost can be reduced since the process of making a chip by polishing and scribing the substrate in a post process can be reduced, and in a post process Since there is no deterioration of the material characteristics due to the generated stress, there is an advantage in that it is possible to manufacture an electrically and optically improved device.

Therefore, the use of such a substrate is expected to reduce the damage caused by the stress generated in the post-process or the generation of defective products and to bring down the process cost. This substrate has the advantage that it is possible to grow a high quality LED epi structure by reducing the steps of the manufacturing process of the nitride-based LED in the form of bonding a heterogeneous substrate, as well as solving the stress problem during growth.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. The embodiments described below may be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below. The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. In the drawings illustrating embodiments of the present invention, the thicknesses of certain layers or regions are exaggerated for clarity of specification, and like numerals in the drawings refer to like elements.

Heterojunction substrate and method of manufacturing the first embodiment

The heterojunction substrate according to the present invention does not have to consider an electrical connection since only the mechanical bonding capable of heat transfer is performed between the lower substrate and the upper substrate due to the manufacturing characteristics of a nitride-based semiconductor device such as an LED. That is, the lower substrate and the upper substrate use a medium such as an oxide film for bonding. One embodiment of the heterojunction substrate manufacturing method according to the invention follows the process sequence as shown in FIG.

First, a single crystal substrate 10 having a thickness of about 50 to 200 um on which both surfaces are processed very smoothly is prepared (step s1).

The single crystal substrate 10 is cut in a single crystal ingot and processed. Both surfaces of the single crystal substrate 10 should be processed very clean and flat. In general, such surfaces are called epi-ready wafers (epi-ready wafers) in the industry, and production of double-sided substrates is common, so there is no difficulty.

As the single crystal substrate 10, any kind of substrate such as a semiconductor substrate, an oxide substrate or a boride substrate can be used. Preferably, the single crystal substrate 10 is a sapphire (single crystal Al ₂ O ₃ ) substrate. However, SiC, GaAs, GaN, AlN, ZrB ₂ , LiAlO ₂ , MgO, spinel (MgAl ₂ O ₄ ), ZnO or LiGaO ₂ substrates are also possible. It should be noted that the single crystal substrate 10 only needs to be a single crystal substrate capable of growing a semiconductor epitaxial layer, and the kind thereof is not limited to those mentioned herein. For example, sapphire substrates are used to manufacture blue LEDs formed of nitride semiconductors such as GaInN, GaAs substrates are used in AlGaInP-based LEDs, and cubic or hexagonal SiC substrates are used in short-wavelength (near ultraviolet, blue, or green) LEDs. . Therefore, the material of the single crystal substrate 10 may be selected according to the type of device to be manufactured. As such, the material of the single crystal substrate 10 is not particularly limited, and the crystal orientation of the substrate is not particularly limited, but may be aligned in any desired direction.

At this time, the surface (for example, the lower surface) to be bonded to the heterogeneous substrate (to be described later) of both surfaces of the single crystal substrate 10 is formed in advance in the separation groove 15 in a chip-like pattern (step s2).

3 is a view for showing a separation groove 15 formed in the single crystal substrate 10. As shown in FIG. 3, the separation groove 15 is formed along the X-axis and Y-axis directions to form a lattice chip shape, and the single crystal substrate 10 is a flat zone F formed for substrate alignment or the like. ) Or has a notch. "D" in the figure represents an effective chip area which becomes an actual device part in a subsequent device fabrication process.

The separation groove 15 may be formed by a scribing process using a laser. This process can form a separation groove quickly has the advantage of excellent mass production.

As long as the separation groove can be formed to separate the single crystal substrate 10 into chips, the shape of the laser processing machine is not particularly limited. Specific examples of devices that may be used include CO ₂ lasers, YAG lasers, excimer lasers, and pulsed lasers. Of these, pulsed lasers are preferred.

The depth of each of the separation grooves 15 is preferably 6 µm or more from the surface of the single crystal substrate 10. When the depth of the separation groove 15 is less than 6 μm, the single crystal substrate 10 may be diagonally cut in the chip to form a defective chip. Although the cross section of each of the separating grooves 15 may be assumed to have an arbitrary shape, a rectangle, a U shape or a V shape, it is preferable to assume that the separating groove cross section is a V shape or a U shape, and V shape is particularly preferable. This is because when the single crystal substrate 10 is cut into chips, cracking starts in the vicinity of the bottom end of the V-shaped separation groove, thereby reducing the defective rate. The cross section of the separation groove 15 may be adjusted through control of a laser optical system such as a laser beam diameter and a focus.

The scribed single crystal substrate 10 is prepared in a clean state through a cleaning process. When the thickness of the single crystal substrate 10 is reduced, the cutting distance is reduced, so that the single crystal substrate 10 can be easily cut into chips at the position of the separation groove 15 in a later process after fabrication of the device.

For example, in detail, a water-soluble resist or the like is uniformly applied to one surface of the single crystal substrate 10 using a spin coater and dried to form a protective film. Then, the surface on which the protective film is formed is fixed to the stage of the pulse laser processing machine by a vacuum chuck. The stage can move in the X-axis and Y-axis directions, and can rotate. After the wafer is fixed, the laser optical system is adjusted to focus the laser beam on the surface where the protective film is not formed, and is processed so that the separation groove 15 of the V-shaped cross section is formed in the X-axis direction. Subsequently, the stage is rotated 90 degrees, and the separation groove 15 is also formed in the Y-axis direction in the same manner as described above. Then, the single crystal substrate 10 is removed from the vacuum chuck and placed on the stage of the washer to spray water to remove the protective film and to dry.

Next, one surface (for example, an upper surface) of the different substrate 20 different from the single crystal substrate 10 such as sapphire is processed to be very smooth. At this time, the dissimilar substrate 20 uses a substrate having good thermal characteristics and excellent structural characteristics such as a silicon substrate and alumina (polycrystalline Al ₂ O ₃ ). A low cost and recyclable substrate is preferred. The thickness of the heterogeneous substrate 20 is a thickness for supporting the single crystal substrate 10, such as about 200 to 400 μm, and only the surface to be bonded is precisely processed.

An oxide film 25 is formed on the hetero substrate 20 as a bonding medium. In this case, the oxide film may be deposited by a silicon oxide film (SiO ₂ ), ZrO ₂ , Al ₂ O ₃ , TiO ₂ or the like by chemical vapor deposition (CVD), sputtering or evaporation. At this time, a CVD apparatus, a sputter or an e-beam evaporator is used. In particular, in the case of a silicon oxide film, a thermal oxide film, a CVD oxide film, Phosphorous Silicate Glass (PSG), Boro-Phosphorous Silicate Glass (BPSG), or the like may be used.

PSG is very useful as a bonding medium because it can arbitrarily control the glass transition point (Tg), such as melting point and viscosity by controlling the amount of P. When the amount of P is adjusted to about 3 wt% and the Tg of the PSG is adjusted to about 1000 to 1100 ° C., bonding between the single crystal substrate 10 and the heterogeneous substrate 20 becomes easy as described later.

Next, a heterojunction substrate 30 according to the present invention is manufactured by bonding the single crystal substrate 10 and the heterogeneous substrate 20 prepared above using a substrate bonding apparatus or through heat treatment. In the drawing, although the separation groove 15 is not filled with the oxide film 25, the oxide film 25 may move to fill the separation groove of the single crystal substrate 10 during high temperature bonding. Bonding can be accomplished using commercial equipment, such as anodical bonding using pressure and electricity, or wafer bonders, fusion bonding equipment using heat and pressure.

Anodic bonding is a technique well known for bonding metal and glass or silicon and glass, and when applied to the present invention, the surface of the single crystal substrate 10 having the separation grooves 15 formed thereon and the oxide film of the heterogeneous substrate 20. The oxide film 25 is heated to a predetermined temperature in a state where the 25 is facing each other. When a voltage of 200 to 1000 volts is applied according to the thickness of the oxide film 25 or the like, cations present in the oxide film 25 move to the opposite side of the junction interface, and the fixed negative charge and the single crystal substrate 10 remaining at the junction interface are retained. The static electricity is generated between the charges of the).

Fusion bonding is a thermocompression bonding method in which the surface of the separation groove 15 is formed in the single crystal substrate 10 and the oxide film 25 of the heterogeneous substrate 20 is brought into contact with each other by increasing the temperature of the oxide film 25 and applying pressure thereto. to be.

The heterojunction substrate 30 manufactured as described above is used for semiconductor device manufacturing, and the isolation groove 15 separating the chip region is formed on the lower surface of the single crystal substrate 10 and the oxide film 25 is formed on the lower surface of the single crystal substrate 10. It is bonded to each other to include a hetero substrate 20 for supporting the single crystal substrate 10.

Meanwhile, in the heterojunction substrate 30 according to the present embodiment, the oxide film 25 is formed on the heterogeneous substrate 20 to be positioned between the single crystal substrate 10 and the heterogeneous substrate 20, but will be described in the following embodiments. As described above, the oxide film 25 may be formed on the single crystal substrate 10 to be positioned between the single crystal substrate 10 and the heterogeneous substrate 20, or may be formed on both the single crystal substrate 10 and the heterogeneous substrate 20. And may be disposed between the single crystal substrate 10 and the heterogeneous substrate 20.

Heterojunction Substrate and Method of Manufacturing the Second Embodiment

Another embodiment of the heterojunction substrate manufacturing method according to the invention follows the process sequence as shown in FIG.

First, a single crystal substrate 10 having a thickness of about 50 to 200 um on which both surfaces are processed very smoothly is prepared (step s11). At this time, the surface (for example, the lower surface) to be bonded to the heterogeneous substrate of both surfaces of the single crystal substrate 10 is formed in advance in the separation groove 15 in a chip-shaped pattern (step s12). The procedure so far is the same as that of the first embodiment described above.

Next, an oxide film 25 is formed on the surface where the separation grooves 15 are formed as a bonding medium (step 13). At this time, the separation groove 15 may be filled with the oxide film 25 as shown. The formation method of the oxide film 25 is the same as that of the first embodiment described above.

Next, one surface (e.g., upper surface) of the heterogeneous substrate 20 different from the single crystal substrate 10 such as sapphire is processed and prepared very smoothly (step s14), followed by using a substrate bonding apparatus or by heat treatment. The substrate 10 and the heterogeneous substrate 20 are bonded together with the oxide film 25 interposed therebetween to produce a heterojunction substrate 30 'according to the present invention (step s15). The bonding method is also the same as in the first embodiment described above.

Heterojunction substrate and method of manufacturing same Example 3

Another embodiment of the heterojunction substrate manufacturing method according to the present invention is in the form of a combination of the first embodiment and the second embodiment described above.

In other words, an oxide film serving as a bonding medium is formed on one surface of the single crystal substrate and on one surface of the hetero substrate, and then the single crystal substrate and the hetero substrate are bonded so that both oxide films meet.

Method of manufacturing semiconductor device using heterojunction substrate

The method of manufacturing a semiconductor device using a heterojunction substrate (30 or 30 ', hereinafter referred to as 300,000) according to the present invention follows the process sequence as shown in FIG.

First, prepare a heterojunction substrate 30 as in step A, and in step B, the epitaxial layer of the LED structure is grown (MOCVD, MBE, etc.) on the heterojunction substrate 30 and then patterned into an appropriate device layer 40. The device is formed through a process step of forming the transparent electrode, the p-type metal pad 45 and the n-type metal pad 50.

Examples of the epi layer include a group III nitride semiconductor layer, for example AlGaInN, or AlGaAs, AlGaInP, GaP, or the like. When the group III nitride semiconductor layer is grown by MOCVD, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as the carrier gas, and trimethylgallium (TMG) or triethylgallium (TEG) is Ga (group III element). Used as a source, trimethylaluminum (TMA) or triethylaluminum (TEA) is used as an Al (group III element) source, trimethylindium (TMI) or triethylindium (TEI) is used as an In (group III element) source, Ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), and the like are used as N (Group V elements).

The p-type metal pad 45 may have a multilayer structure containing a Ti layer, an Al layer, a Ti layer, and an Au layer, and the n-type metal pad 50 also contains a Ti layer, an Al layer, a Ti layer, and an Au layer. It can have a multi-layer structure. In the present embodiment, such LED manufacturing is taken as an example, but of course, other devices based on semiconductors may be manufactured.

When the device formation is completed, the single crystal substrate 10 and the lower hetero substrate 20 are separated by wet etching (step C). First, a passivation layer (not shown) is formed of a material on which a device is easily coated. The material of the protective layer is not particularly limited, and may be formed of, for example, a resist, a transparent resin, glass, or an insulating film. As a resist, the water-soluble resist used for photolithography etc. is mentioned. Examples of the transparent resin include acrylic resins, polyesters, polyimides, polyvinyl chlorides, and silicone resins. Examples of the insulating film include a silicon nitride film.

This protective layer can be formed by a known method such as coating, vapor deposition or sputtering. Among them, the water-soluble resist can be formed into a protective layer having a uniform thickness by using a spin coater to cover the entire surface of the device, and is preferable since it can be easily removed by washing with water in a subsequent step. The thickness of the protective layer is not particularly limited as long as it has sufficient strength to prevent the device from being lost or degraded.

After the protective layer is formed, the heterojunction substrate 30 is immersed in a hydrofluoric acid etching solution or the like. At this time, the etching time depends on the thickness or the bonding degree of the oxide film 25, which is a bonding medium, and may be about 1 hour to 3 hours. When PSG is used as the oxide film 25 for substrate bonding, the PSG is very weak against hydrofluoric acid, and since the separation groove 15 is formed in the single crystal substrate 10 in advance, the penetration of the hydrofluoric acid is very fast, so that the single crystal in which the element is formed. The substrate 10 and the heterogeneous substrate 20 at the bottom are easily separated.

Then, the protective layer is removed from the single crystal substrate 10 in which the separated elements are formed. The protective layer can be completely removed and is not particularly limited as long as it does not damage the device. The protective layer can be removed by any method, for example by cleaning, in particular by sonication, jet flow, showering, dipping, etching and the like.

When the protective layer is formed of a water-soluble resist, it can be easily removed by washing with water. When the protective layer is formed of photoresist, it is preferably immersed in phosphoric acid, sulfuric acid, hydrochloric acid or the like, and completely removed using an organic solvent such as acetone. When the protective layer is made of an insulating film, it can be removed by etching with an appropriate solution.

After the protective layer is removed, chip manufacturing is completed by breaking the chip into a chip shape by breaking it in accordance with the separation groove 15 previously formed under the single crystal substrate 10 (step (D)).

As described above, in the conventional art shown in FIG. 1, a chip may be obtained only after a very complicated process of grinding and breaking the sapphire substrate 1 through scribing and polishing, but using a heterojunction substrate according to the present invention. As a result, the substrate in which the shape of the device is realized is greatly simplified in the post-process. Therefore, high processing speed is achieved and productivity is improved.

In addition, in the conventional post-processing step, substrate damage or deterioration of device characteristics are generated due to the stress generated by the grinding and polishing process, and device damage is also caused by a laser mainly used for scribing. However, according to the present invention, there is no such problem, since the isolation grooves are already formed in the thin single crystal substrate and the device is manufactured and only the single crystal substrate is separated without grinding and polishing. Accordingly, there is no fear of lowering the brightness, and the device obtained from the substrate according to the present invention, such as an LED chip, exhibits excellent light extraction efficiency and is manufactured at high yield and high speed.

While the preferred embodiment of the present invention has been described above, it is apparent that various modifications can be made without departing from the scope of the present invention.

1 illustrates a method of manufacturing a conventional light emitting diode (LED) chip.

2 illustrates a semiconductor device substrate and a method of manufacturing the same according to an embodiment of the present invention.

3 is a view for showing a separation groove formed in the single crystal substrate in the method for manufacturing a semiconductor device substrate according to the present invention.

4 illustrates a semiconductor device substrate and a method of manufacturing the same according to another embodiment of the present invention.

5 illustrates a semiconductor device manufacturing method according to the present invention.

<Explanation of symbols for the main parts of the drawings>

10 ... Single Crystal Board 15 ... Separation Groove

20 Dissimilar substrate 25 Oxide

30, 30 '... heterojunction substrate 40 ... element layer

45 ... p type metal pad 50 ... n type metal pad

Claims (6)

A single crystal substrate having a top surface on which the device layer is to be manufactured and a bottom surface opposite to the top surface, and a separation groove separating the chip region; And Including a heterogeneous substrate bonded to the lower surface of the single crystal substrate via an oxide film for supporting the single crystal substrate, A heterojunction substrate, which is introduced into an element layer manufacturing process. The heterojunction of claim 1, wherein the single crystal substrate is any one of sapphire, SiC, GaAs, GaN, AlN, ZrB ₂ , LiAlO ₂ , MgO, spinel (MgAl ₂ O ₄ ), ZnO, and LiGaO ₂ . Board. The method of claim 1, wherein the oxide film is any one of silicon oxide (SiO ₂ ), ZrO ₂ , Al ₂ O ₃ , TiO ₂ , Phosphorous Silicate Glass (PSG) and Boro-Phosphorous Silicate Glass (BPSG) Heterojunction substrate. Forming, before the device layer fabrication process, a separation groove for separating chip regions in the bottom surface of the single crystal substrate having a top surface on which the device layer is to be manufactured and a bottom surface opposite thereto; Forming an oxide film on at least one of a lower surface of the single crystal substrate and an upper surface of a heterogeneous substrate for supporting the single crystal substrate; And A substrate manufacturing method comprising the step of bonding the lower surface of the single crystal substrate and the hetero substrate with the oxide film interposed therebetween to manufacture a substrate to be introduced into the device layer manufacturing process. The method of claim 4, wherein the bonding is performed using a substrate bonding apparatus or through heat treatment. A device layer is prepared on the heterojunction substrate according to any one of claims 1 to 3, Separating the single crystal substrate and the heterogeneous substrate by removing the oxide film; And A method of manufacturing a semiconductor device, comprising the steps of breaking a chip along a separation groove.

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