KR100885018B1 - Liquid crystal display and driving method thereof - Google Patents

Abstract

The present invention relates to a liquid crystal display device, which includes a plurality of gate lines and a plurality of data lines crossing each other, and a plurality of pixels connected to the gate line and the data line. Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line, and the first and second subpixels are connected to one of the gate lines and one of the data lines. And a liquid crystal capacitor and a storage capacitor connected to the switching element. In addition, a first subpixel and a second subpixel of the pixel connected to at least one of the gate lines may be disposed opposite to each other with respect to the data line, and the first and second subpixels may be coupled capacitors to other adjacent subpixels. It is connected. Accordingly, one subpixel is applied with a voltage of its original size, while a higher voltage is applied to another subpixel, thereby increasing the effective driving voltage, thereby improving visibility of the liquid crystal display, increasing transmittance, and improving gray level inversion. The effect of improving the image quality of the liquid crystal display device occurs.

Liquid crystal display, LCD, inversion driving, column inversion, dot inversion, dual source, visibility, transmittance

Description

Liquid crystal display and driving method thereof {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a waveform diagram of a data signal applied to a data line of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

5 is a diagram illustrating a polarity state of a pixel of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

6 is an equivalent circuit diagram of a liquid crystal display according to another exemplary embodiment of the present invention.

7 is a waveform diagram of a data signal applied to a data line of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

8 is a diagram illustrating a polarity state of a pixel of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display and a driving method thereof.

A general liquid crystal display device includes two display panels and a liquid crystal layer having dielectric anisotropy interposed therebetween. An electric field is applied to the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. Such liquid crystal displays are typical among portable flat panel displays (FPDs) that are easy to carry. Among them, TFT-LCDs using thin film transistors (TFTs) as switching elements are mainly used.

Among such liquid crystal display devices, liquid crystal display devices using twisted nematic (TN) liquid crystals have various advantages, but have limitations in extending their range to the monitor or TV area due to viewing angle problems. For this reason, a series of achievements have been shown through many studies such as the multi-domain method or the development of a new compensation film to improve the viewing angle of the TN mode. In particular, when the WV (wide viewing) film is applied, the characteristics are almost inferior to other wide viewing angle modes in the left and right directions. However, in the up and down direction, there remains a problem of gray level inversion (a phenomenon in which the brightness to be increased as the gray voltage is increased). In particular, the gray level inversion of the lower side is a very serious problem.

In particular, in the multi-domain liquid crystal display, a side gamma curve distortion phenomenon occurs in which the gamma curve on the front side and the gamma curve on the side do not coincide with each other, resulting in inferior visibility in the left and right sides compared to the TN mode liquid crystal display. For example, in the patterned vertically aligned (PVA) mode, which makes an incision by domain dividing means, the screen looks brighter and the color tends to shift toward white as the side faces. Occasionally, the picture appears clumped and disappears.

An object of the present invention is to improve the viewing angle of a liquid crystal display. In particular, the viewing angle is improved by eliminating the gray level inversion generated when the liquid crystal display is viewed from the bottom (bottom) of the screen.

Another object of the present invention is to implement a liquid crystal display device having excellent visibility by improving the image quality of the liquid crystal display device.

One liquid crystal display device for achieving the object of the present invention,

A plurality of gate lines and a plurality of data lines crossing each other, and

A plurality of pixels connected to the gate line and the data line

Including,

Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line.

The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively.

The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line.

The first and second subpixels are coupled to another adjacent subpixel by a coupling capacitor.

Preferably, the first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are positioned on either side of the data line.

The liquid crystal display according to the present invention further includes a storage electrode line positioned between the gate line, and the storage capacitor is connected between the switching element and the storage electrode line.

It is also preferable that the pair of subpixels connected by the coupling capacitor have the same polarity.

라고 할 때, 상기 액정 표시 장치가 노멀리 블랙 모드이고 V_블랙이 검은색을 나타내는 계조 전압이면, TV_블랙은 액정 임계 전압(V_th)보다 작고, 상기 액정 표시 장치가 노멀리 화이트 모드이고 V_화이트가 흰색을 나타내는 계조 전압이면, TV_화이트는 액정 임계 전압(V_th)보다 작은 것이 바람직하다. In the present invention, the capacitances of the liquid crystal capacitor and the storage capacitor of the second subpixel are respectively C _LC2 , C _ST2 , and the capacitance of the coupling capacitor is C _PP ,

When the liquid crystal display is normally black mode and V _black is a gray voltage representing black, the TV _black is smaller than the liquid crystal threshold voltage V _th , and the liquid crystal display is normally white mode and V _white. It is preferable that TV _white is smaller than the liquid crystal threshold voltage (V _th ) if is a gradation voltage representing _white .

The liquid crystal display according to the present invention further includes a plurality of color filters corresponding to the first and second subpixels, and the colors of the color filters corresponding to the first and second subpixels of one pixel. This same thing is good.

The liquid crystal display device according to the present invention

A plurality of gate lines and a plurality of data lines crossing each other, and

A plurality of pixels connected to the gate line and the data line

Including,

Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line.

The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively.

The first and second subpixels are coupled to another adjacent subpixel by a coupling capacitor,

The pair of subpixels connected by the coupling capacitor have the same polarity,

라고 할 때,The capacitances of the liquid crystal capacitor and the storage capacitor of the second subpixel are C _LC2 , C _ST2 , and the capacitances of the coupling capacitor are respectively C _PP ,

When I say

If the liquid crystal display device is normally black mode and V _black is a gradation voltage representing black, the TV _black is less than the liquid crystal threshold voltage (V _th ),

If the liquid crystal display device is normally white mode and V _white is a gray voltage indicating white, the TV _white is smaller than the liquid crystal threshold voltage V _th .

And a plurality of gate lines and a plurality of data lines crossing each other, and a plurality of pixels connected to the gate line and the data line,

Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line.

The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively.

The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line.

The first and second subpixels are connected to other adjacent subpixels by a coupling capacitor.

The driving method of the liquid crystal display device is

Sequentially applying a gate-on voltage for turning on the switching element to the gate line, and

Applying a data voltage to the data line

Including;                     

Polarities of the data voltages applied to neighboring data lines are opposite,

The polarity of the data voltage applied to the data line changes each time the gate line to which the gate-on voltage is applied is changed.

A plurality of gate lines and a plurality of data lines crossing each other, and a plurality of pixels connected to the gate line and the data line,

Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line.

The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively.

The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line.

First and second subpixels of the pixel connected to at least one of the gate lines are positioned on either side of the data line,

The first and second subpixels are connected to other adjacent subpixels by a coupling capacitor.

The driving method of the liquid crystal display device is

Sequentially applying a gate-on voltage for turning on the switching element to the gate line, and

Applying a data voltage to the data line                     

Including;

Polarities of the data voltages applied to neighboring data lines are opposite,

The polarity of the data voltage applied to the data line changes each time two gate lines to which the gate-on voltage is applied are changed.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

Next, a liquid crystal display device according to an embodiment of the present invention will be described.

1 is a block diagram of a liquid crystal display according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of a liquid crystal display according to an embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the present invention includes a liquid crystal panel assembly 300, a gate driver 400 and a data driver 500 connected thereto. The driving voltage generator 700 connected to the gate driver 400, the gray voltage generator 800 connected to the data driver 500, and a signal controller for controlling the driving voltage generator 700 are connected to the gate driver 400. It contains 600.

The liquid crystal panel assembly 300 includes a plurality of signal lines G ₁ -G _n , D ₁ -D _m , 131 and a plurality of pixels connected thereto in an equivalent circuit.

The signal lines G ₁ -G _n , D ₁ -D _m , 131 transmit a scanning signal or a gate signal, and the plurality of scanning signal lines or gate lines G ₁ -G extending in the row direction. _n ) and a data signal line or data line D ₁ -D _m which transmits an image signal or a data signal and extends in the column direction. The signal lines G ₁ -G _n , D ₁ -D _m are also applied with a common voltage (V _com ) or a reference voltage, between the gate lines G ₁ -G _n , and with the pixels. The storage electrode line 131 is disposed between the pixels.

,

)로 이루어져 있고, 각 부화소(

,

)는 신호선(G₁-G_n, D₁-D_m)에 각각 연결된 스위칭 소자(Q₁, Q₂)와 이에 연결된 액정 축전기(liquid crystal capacitor)(C_LC1, C_LC2) 및 유지 축전기(storage capacitor)(C_ST1, C _ST2)를 포함한다. 그리고 각 화소(P_i,_j)의 부화소(

,

)는 게이트선(G_i)을 중심으로 서로 반대쪽에, 그리고 데이터선(D_j)을 중심으로도 서로 반대쪽에 위치한다. 도 2에서, 화소(P_i,_j)의 부화소 중 하나(

)는 게이트선(G_i)의 위쪽, 데이터선(D_j)의 오른쪽 에 위치하고, 다른 하나(

)는 게이트선(G_i)의 아래쪽, 데이터선(D_j)의 왼쪽에 위치한다. 그리고 각 화소의 위 부화소와 아래 부화소는 각각 위아래로 이웃한 다른 부화소와 결합 축전기(C_PP)로 연결되어 있는데, 어떤 화소, 예를 들면 화소(P_i, _j)의 위쪽 부화소(

)는 화소(P_i-1,_j+1)의 아래쪽 부화소(

)와 결합 축전기(C_PP)로 연결되어 있고, 아래쪽 부화소(

)는 화소(P_i+1,_j-1)의 위쪽 부화소(

)로 결합 축전기(C_pp)로 연결되어 있다. 스위칭 소자(Q₁, Q₂)는 삼단자 소자로서, 그 제어 단자는 게이트선(G₁-G_n)에 연결되어 있고 입력 단자는 데이터선(D₁-D_m)에 연결되며, 출력 단자는 액정 축전기(C_LC1, C _LC2) 및 유지 축전기(C_ST1, C_ST2)의 한 단자에 연결되어 있다.As shown in FIG. 2, each pixel P _i , _j connected to the i-th gate line G _i and the j-th data line D _j (i = 1, 2, ..., n, j = 1, 2, ..., m) are two subpixels (

,

) And each subpixel (

,

) Is a switching element Q ₁ , Q ₂ connected to the signal lines G ₁ -G _n , D ₁ -D _m , respectively, and a liquid crystal capacitor C _LC1 , C _LC2 and a storage capacitor connected thereto. capacitors) (C _ST1 , C _ST2 ). And the sub-pixels (P _i , _j ) of each pixel

,

) Are positioned opposite to each other with respect to the gate line G _i and also opposite to each other with respect to the data line D _j . In FIG. 2, one of the subpixels of the pixels _Pi and _j (

) Is located above the gate line G _i , to the right of the data line D _j , and the other (

) Is positioned below the gate line G _i and to the left of the data line D _j . The upper and lower subpixels of each pixel are connected to other subpixels adjacent to each other up and down by a coupling capacitor C _PP , and the upper subpixels of a pixel, for example, pixels P _i and _j (

) Is a sub _- pixel (P _i-1 , _{j + 1} )

) And the coupling capacitor (C _PP )

) Is an upper subpixel of the pixels P _{i + 1} , _j-1 .

Is connected to the coupling capacitor (C _pp ). The switching elements Q ₁ , Q ₂ are three-terminal elements, the control terminals of which are connected to the gate lines G ₁ -G _n , the input terminals of which are connected to the data lines D ₁ -D _m , and output terminals Is connected to one terminal of the liquid crystal capacitors C _{LC1 and} C _LC2 and the storage capacitors C _{ST1 and} C _ST2 .

The liquid crystal capacitors C _{LC1 and} C _LC2 are connected between the output terminals of the switching elements Q ₁ and Q ₂ and a common voltage V _com or a reference voltage. The storage capacitors C _{ST1 and} C _{ST2 are} connected between the switching elements Q ₁ and Q ₂ and the storage electrode line 131.

Meanwhile, the liquid crystal panel assembly 300 may be schematically illustrated as shown in FIG. 3. For convenience, only one pixel is shown in FIG. 3.                     

As shown in FIG. 3, the liquid crystal panel assembly 300 includes a lower panel 100 and an upper panel 200 facing each other and a liquid crystal layer 3 therebetween. The lower panel 100 includes a gate line G _i , a data line D _j , a switching element Q1, and a storage capacitor C _ST1 . The liquid crystal capacitor C _LC1 has two terminals, a pixel electrode 190 of the lower panel 100 and a reference electrode 270 of the upper panel 200, and a liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric.

The pixel electrode 190 is connected to the switching element Q ₁ , and the reference electrode 270 is formed on the entire surface of the upper panel 200 and is connected to the common voltage V _com .

Herein, the liquid crystal molecules change their arrangement according to the change of the electric field generated by the pixel electrode 190 and the reference electrode 270, and thus the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

The pixel electrode 190 overlaps the storage electrode line 131 to form a storage capacitor C _ST1 , and is connected to a neighboring pixel electrode by a coupling capacitor C _PP . In addition, the pixel electrode 190 and the reference electrode 270 may have a plurality of cutouts, or protrusions may be formed on the electrodes 190 and 270. In this case, the viewing angle may be improved by the fringe field.

FIG. 3 shows a MOS transistor as an example of the switching element Q ₁ , which is implemented as a thin film transistor having amorphous silicon or polysilicon as a channel layer in an actual process. .

Unlike in FIG. 3, the reference electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 are linearly formed.

On the other hand, in order to implement color display, each pixel should be able to display a color, which is provided with a color filter 230 of red, green, or blue in a region corresponding to each pixel electrode 190. It is possible by doing. In this embodiment, since two pixel electrodes 190 are disposed in one pixel in a diagonal direction, as shown in FIG. 5, a color filter for one pixel is also disposed in a diagonal direction.

A driving voltage generating unit 700 and the like are the switching elements (Q _1, Q _2), the gate-on voltage (V _on) and switching elements (Q _1, Q _2), a gate turn-off voltage (V _off) for turning off to turn on the Create

The gray voltage generator 800 generates a plurality of gray voltages related to the luminance of the liquid crystal display.

The gate driver 400 may also be referred to as a scan driver. The gate driver 400 may be connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to provide a gate-on voltage V _on from the driving voltage generator 700. And a gate signal composed of a combination of the gate off voltage V _off are applied to the gate lines G ₁ -G _n .

The data driver 500 may also be referred to as a source driver. The data driver 500 may be connected to the data lines D ₁ -D _m of the display panel 300 to select a gray voltage from the gray voltage generator 800 to select data as a data signal. Applies to lines D ₁ -D _m .

The signal controller 600 generates a control signal for controlling operations of the gate driver 400, the data driver 500, the driving voltage generator 700, and the like, so that each gate driver 400, the data driver 500, and The driving voltage generator 700 is supplied.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 controls an RGB data signal R, G, B and its display from an external graphic controller (not shown), for example, vertical synchronization. A vertical synchronizing signal (V _sync ), a horizontal synchronizing signal (H _sync ), a main clock (CLK), and a data enable signal (DE) are provided. The signal controller 600 generates a gate control signal and a data control signal based on the control input signal, appropriately processes the gray level signals R, G, and B according to the operating conditions of the liquid crystal panel 300, and then controls the gate control signal. Are sent to the gate driver 400 and the driving voltage generator 700, and the data control signal and the processed gray level signals R ′, G ′, and B ′ are sent to the data driver 500.

The gate control signal includes a vertical synchronization start signal (STV) for indicating the start of output of the gate on pulse (high period of the gate signal), and a gate clock signal for controlling the output timing of the gate on pulse. CPV) and a gate on enable signal (OE) for limiting the width of the gate on pulse. Among them, the gate-on enable signal OE and the gate clock signal CPV are supplied to the driving voltage generator 700. The data control signal is a horizontal synchronization start signal (STH) indicating the start of input of the gray scale signal and a load signal (load signal, LOAD or TP) for applying a corresponding data voltage to the data lines D ₁ -D _m . ), An inversion control signal RVS for inverting the polarity of the data voltage, a data clock signal HCLK, and the like.

The gate driver 400 sequentially applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal from the signal controller 600, thereby applying the gate-on voltage V _on to the gate lines G ₁ -G _n . Turn on the two connected switching elements Q ₁ , Q ₂ . At the same time, the data driver 500 controls the gray level signals R ', G', and B 'of the pixels including the turned-on switching elements Q ₁ and Q ₂ according to the data control signal from the signal controller 600. The analog gray voltage from the gray voltage generator 800 corresponding to the data signal is supplied as a data signal to the data lines D ₁ -D _m . The data signals supplied to the data lines D ₁ -D _m are applied to the corresponding pixels through the turned-on switching elements Q ₁ and Q ₂ . In this way, the gate-on voltage V _on is sequentially applied to all the gate lines G ₁ -G _n during one frame to apply the data signal to all the pixels. At this time, when one frame is finished and the inversion control signal RVS is supplied to the driving voltage generator 700 and the data driver 500, the polarities of all data signals of the next frame are changed.

Next, a method of applying a data signal to the liquid crystal panel assembly according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4 to 5.

4 is a waveform diagram of a data signal applied to a data line of a liquid crystal panel assembly according to an exemplary embodiment of the present invention, and FIG. 5 is a view illustrating a polarity state of each pixel of the liquid crystal panel assembly according to an exemplary embodiment of the present invention. to be. Here, d _j is a data signal applied to the j-th data line, and displays "+" and "-" indicate the polarity of the data signal with respect to the common voltage V _com .

As shown in Fig. 4, in one embodiment of the present invention, the polarity of the data signal applied to the data line is inverted every data line and also in every row.

)이라 하자. 도 4에서

의 극성이 (+)이고,

(x, y는 정수)의 극성은 ｜x+y｜가 짝수이면 (+)이고, ｜x+y｜가 홀수이면 (-)이다. 도 4의 다음 프레임에서는 극성이 모두 반대가 된다. 따라서

의 극성은 ｜x+y｜가 짝수이면

의 극성과 동일하고, ｜x+y｜가 홀수이면

의 극성과 반대임을 알 수 있다.When the gate-on voltage Von is applied to the i-th gate line G _i , the voltage of the data signal d _j applied to the j-th data line D _j is _converted into the data voltage (

Let's say In Figure 4

The polarity of is (+),

The polarity of (x, y is an integer) is (+) if | x + y | is even and (-) if | x + y | is odd. In the next frame of Fig. 4, the polarities are all reversed. therefore

Polarity of 이면 x + y |

Is the same as the polarity of and if | x + y | is odd

It can be seen that the polarity of the opposite.

In this way, when the data signal is applied, the polarity of any of the pixels _{Pi + x} and _{Pj + y} is the same polarity as the pixels _Pi and _j when | x + y is even and | x + y | Is an odd polarity. For example, since the polarities of the pixels _Pi-1 , _{j + 1} and the pixels _{Pi + 1} , _j-1 are | -1 + 1 | = | 1 + (-1) | = 0, It is the same as the polarity of the pixels _Pi and _j .

)는 화소(P_i-1,_j+1)의 아래쪽 부화소(

)와 결합 축전기(C_PP)로 연결되어 있고, 아래쪽(

)는 화소(P_i+1,_j-1)의 위쪽 부화소(

)와 결합 축전기(C_PP)로 연결되어 있으므로, 결합 축전기(C_PP)로 연결된 한 쌍의 부화소의 극성은 도 5에 도시한 것처럼 동일하다.However, the upper subpixels of the pixels P _i and _j (

) Is a sub _- pixel (P _i-1 , _{j + 1} )

) And the coupling capacitor (C _PP )

) Is an upper subpixel of the pixels P _{i + 1} , _j-1 .

) And the coupling capacitor C _PP , the polarity of the pair of subpixels connected by the coupling capacitor C _PP is the same as shown in FIG. 5.

,

)의 액정 축전기(C_LC1, C_LC2)에 인가되는 전압을 각각 V(

), V(

)라 할 때, 다음과 같은 관계식이 성립한다. On the other hand, the subpixel (

,

Liquid crystal capacitor (C _LC1 , The voltage applied to C _LC2 ) is each V (

), V (

), The following relation holds.

V() =

V () =

)의 액정 축전기 및 유지 축전기 의 정전 용량이고, C_PP는 결합 축전기의 정전 용량이며,

은 이전 프레임의 부화소(

)에 인가되었던 전압을 의미하고, 편의상 데이터선(D₁-D_m)의 배선 저항은 무시하며, 공통 전압(V_com)은 0으로 가정하다.In Equations 1 and 2, C _LC2 and C _ST2 represent lower subpixels (

) And the capacitance of the LC capacitor and the storage capacitor, C is the _PP Capacitance of the coupling capacitor,

Is the subpixel of the previous frame (

), The wiring resistance of the data lines D ₁ -D _m is ignored for convenience, and the common voltage V _com is assumed to be zero.

와

은 동일한 극성이고

와

은 반대 극성이므로,

가 된다. 특히, 화소(P_i+1,_j-1)가 화소(P_i,_j)와 동일한 계조를 표시하며 정지 화상인 경우에,

이 되어 수학식 2는 다음과 같이 정리될 수 있다.In equation (2)

Wow

Is the same polarity

Wow

Is the opposite polarity,

Becomes In particular, in the case where the pixels _{Pi + 1} , _j-1 display the same gray level as the pixels _Pi , _j and are still images,

Equation 2 can be summarized as follows.

,

,

＞ 1

＞ 1

to be.

)에는 부화소(

)보다 높은 전압이 인가되므로 유효 구동 전압이 상승하게 된다. 이때, 상승한 유효 구동 전압은 액정 임계 전압(V_th)보다 작아야 하므로, 노멀리 블랙 모드에서는 TV_블랙 ＜ V _th를 충족하도록 V_블랙값을 정하며, 노멀리 화이트 모드에서는 TV_화이트 ＜ V_th 가 충족되도록 V_화이트값을 정해야 한다. 여기에서, V_블랙, V_화이트는 노멀리 블랙 모드, 노멀리 화이트 모드에서 각각 검은색, 흰색을 나타내는 계조 전압을 의미한다.Eventually, according to Equations 2 and 3, the subpixel (

) Has a subpixel (

Since a voltage higher than) is applied, the effective driving voltage rises. In this case, so that it increased the effective driving voltage is so smaller than the liquid crystal threshold voltage (V _th), normally in the black mode jeonghamyeo a V _black value to meet the TV _Black <V _th, a normally white mode, the TV _white <V _th is satisfied You must set the V _white value. Here, V _black and V _white mean a gray voltage representing black and white in the normally black mode and the normally white mode, respectively.

Next, a liquid crystal display and a driving method thereof according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 6 to 8.

6 is an equivalent circuit diagram of a liquid crystal display according to another exemplary embodiment of the present invention, FIG. 7 is a waveform diagram of a data signal applied to a data line of the liquid crystal panel assembly according to another exemplary embodiment of the present invention, and FIG. FIG. 3 is a diagram illustrating polarity states of pixels of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Pixel arrangement of the liquid crystal display according to another exemplary embodiment of the present invention is as follows.

,

)는 데이터선(D_j)을 중심으로 반대쪽에 위치하고 있고, 이에 인접한 (i-1)번째 및 (i+1)번째 게이트선(G_i-1, G_i+1)에 연결된 화소, 예를 들면 화소(P_i+1,_j-1)의 두 부화소(

,

)는 데이터선(D_j-1)에 대해서 오른쪽에 위치하고 있다. 즉, 도 6에서 화소(P_i+x,_j)의 두 부화소(

,

)는 x가 짝수이면 데이터선(D_j)에 대하여 반대쪽에 위치하고, x가 홀수이면 데이터선(D_j)에 대하여 오른쪽에 위치한다. 이때, 한 화소의 위 부화소와 아래 부화소는 위 아래로 인접한 다른 부화소에 결합 축전기(C_PP)로 연결되어 있다. 예를 들어, 화소(P_i+x,_j)의 위쪽 부화소(

)는, x가 짝수일 때 화소(P_i+x-1,_j)의 아래쪽 부화소(

)에, x가 홀수일 때는 화소(P_i+x-1,_j+1)의 아래쪽 부화소(

)에 결합 축전기(C_pp)로 연결되어 있고, 아래쪽 부화소(

)는 x가 짝수일 때는 화소(P_i+x+1,_j-1)의 위쪽 부화소(

)에, x가 홀수일 때는 화소(P_i+x-1,_j)의 위쪽 부화소(

)에 결합 축전기(C_pp)로 연결되어 있다.As shown in FIG. 6, two sub-pixels of each pixel are positioned above and below a connected gate line, and the pixels connected to the i-th gate line G _i , for example, pixels P _i and _j , are located in the pixel region. Two subpixels (

,

) Is positioned on the opposite side of the data line D _{j and} connected to the (i-1) th and (i + 1) th gate lines G _i-1 and G _{i + 1} adjacent thereto, for example. For example, two subpixels (P _{i + 1} , _j-1 )

,

) Is located on the right side with respect to the data line D _j-1 . That is, in FIG. 6, two sub-pixels (P _{i + x} , _j )

,

) It is located on the opposite side with respect to if x is even-numbered data lines (D _j), located on the right side with respect to x is an odd-numbered data lines (D _j). In this case, the upper subpixel and the lower subpixel of one pixel are connected to the other subpixel adjacent up and down by a coupling capacitor C _PP . For example, the upper subpixel of the pixel P _{i + x} , _j (

) Is the lower subpixel (of pixel P _{i + x-1} , _j ) when x is even.

), When x is odd, the lower subpixel (of pixel P _{i + x-1} , _{j + 1} )

) Is connected to the coupling capacitor (C _pp ) and the lower subpixel (

) Is the upper subpixel of pixel P _{i + x + 1} , _j-1 when x is even.

), When x is odd, the upper subpixel (of pixel P _{i + x-1} , _j )

) Is connected to the coupling capacitor (C _pp ).

Also in this embodiment, the color filter is arranged corresponding to each subpixel, and the color of the color filter corresponding to the upper subpixel and the lower subpixel of one pixel is the same.

As shown in Fig. 7, in one embodiment of the present invention, the polarity of the data signal applied to the data line is inverted every data line and inverted every two rows.

,

(l은 정수)의 극성은 y가 짝수이면

의 극성과 반대이고, 반대로 y가 홀수이면

의 극성과 동일하다. 그리고

,

의 극성은 y가 짝수이면

의 극성과 동일하고, y가 홀수이면

의 극성과 반대이다.The polarity inversion for the row must be done so that the polarity of the subpixels connected by the coupling capacitor is the same as shown in FIG. In Figure 7,

,

(l is an integer) if y is even

Is the opposite of polarity and if y is odd

Is the same as. And

,

If the polarity of y is even

Equals the polarity of, and if y is odd

Is the opposite of the polarity.

 In this way, since a lower voltage is applied to the lower subpixel than the upper subpixel, the effective driving voltage is increased.

As such, in a liquid crystal display device in which a pixel is divided into two subpixels to form two switching elements and two liquid crystal capacitors per pixel, and a neighboring pixel is combined using a coupling capacitor, the two connected pixels are connected to each other. Since the polarities of the two subpixels are the same, a voltage having an original magnitude is applied to one subpixel, but a higher voltage is applied to another subpixel, thereby increasing the effective driving voltage. Therefore, the visibility of the liquid crystal display device is improved, the transmittance is increased, and the lower gray level inversion phenomenon is improved, so that the image quality of the liquid crystal display device is improved.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (10)

A plurality of gate lines and a plurality of data lines crossing each other, and A plurality of pixels connected to the gate line and the data line Including, Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line. The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively. The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line. The first and second subpixels are connected to other adjacent subpixels by a coupling capacitor. Liquid crystal display. In claim 1, And a first subpixel and a second subpixel of the pixel connected to at least one of the gate lines are positioned on either side of the data line. The method of claim 1 or 2, The liquid crystal display further includes a storage electrode line positioned between the gate lines, And the storage capacitor is connected between the switching element and the storage electrode line. The method of claim 1 or 2, And a pair of subpixels connected by the coupling capacitor have the same polarity. In claim 4, The capacitances of the liquid crystal capacitor and the storage capacitor of the second subpixel are C _LC2 , C _ST2 , and the capacitances of the coupling capacitor are respectively C _PP ,

And the TV _black is smaller than the liquid crystal threshold voltage (V _th ) when the liquid crystal display is normally black mode and V _black is a gray voltage representing _black . In claim 4, The capacitances of the liquid crystal capacitor and the storage capacitor of the second subpixel are respectively C _LC2 , C _ST2 , and the capacitance of the coupled capacitor is C _PP ,

And the TV _white is smaller than the liquid crystal threshold voltage (V _th ) when the liquid crystal display is normally white mode and V _white is a gradation voltage representing _white . The method of claim 1 or 2, The liquid crystal display further includes a plurality of color filters corresponding to the first and second subpixels, and the same color of the color filters corresponding to the first subpixel and the second subpixel of one pixel is the same. Device. A plurality of gate lines and a plurality of data lines crossing each other, and In the liquid crystal display device including a plurality of pixels connected to the gate line and the data line, Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line. The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively. The first and second subpixels are coupled to another adjacent subpixel by a coupling capacitor, The pair of subpixels connected by the coupling capacitor have the same polarity, The capacitances of the liquid crystal capacitor and the storage capacitor of the second subpixel are C _LC2 , C _ST2 , and the capacitances of the coupling capacitor are respectively C _PP ,

When I say When the liquid crystal display device is normally black mode and V _black is a gray voltage representing _black , the TV _black is smaller than the liquid crystal threshold voltage V _th , If the liquid crystal display is normally white mode and V _white is a gradation voltage representing white, the TV _white is smaller than the liquid crystal threshold voltage (V _th ). Liquid crystal display. A plurality of gate lines and a plurality of data lines crossing each other, and a plurality of pixels connected to the gate line and the data line, Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line. The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively. The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line. The first and second subpixels are connected to other adjacent subpixels by a coupling capacitor. As a driving method of a liquid crystal display device, Sequentially applying a gate-on voltage for turning on the switching element to the gate line, and Applying a data voltage to the data line Including; Polarities of the data voltages applied to neighboring data lines are opposite, The polarity of the data voltage applied to the data line changes every time the gate line to which the gate-on voltage is applied is changed. Driving method of liquid crystal display device. A plurality of gate lines and a plurality of data lines crossing each other, and a plurality of pixels connected to the gate line and the data line, Each pixel includes a first subpixel and a second subpixel disposed on opposite sides of the gate line. The first and second subpixels each include a switching element connected to one of the gate lines and one of the data lines, a liquid crystal capacitor and a storage capacitor connected to the switching element, respectively. The first subpixel and the second subpixel of the pixel connected to at least one of the gate lines are located opposite to the data line. First and second subpixels of the pixel connected to at least one of the gate lines are positioned on either side of the data line, The first and second subpixels are connected to other adjacent subpixels by a coupling capacitor. As a driving method of a liquid crystal display device, Sequentially applying a gate-on voltage for turning on the switching element to the gate line, and Applying a data voltage to the data line Including; Polarities of the data voltages applied to neighboring data lines are opposite, The polarity of the data voltage applied to the data line changes every time two gate lines to which the gate on voltage is applied are changed. Driving method of liquid crystal display device.

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