KR100870323B1 - Method of forming isolation film of semiconductor device - Google Patents

Abstract

The first insulating layer for forming the element isolation film of the cell region is formed and the trench etching process and the second dielectric layer formation process for forming the element isolation film of the peri area are progressed. Therefore, fault by the step height of the cell region and peri region can be prevent and a pattern can be uniformly formed. The method of forming a device isolation film in a semiconductor device is provided. A step is for providing that semiconductor substrate(100) including the cell region and peri region. A step is for forming the trench(105C) by etching and the semiconductor substrate of the element isolation region of the cell region. A step is for forming the first insulating layer on the entire structure including the cell trench. A step is for forming the peri region trench by etching the semiconductor substrate and the first insulating layer formed on the element isolation region of the peri region. A step is for forming the second insulating layer on the entire structure including the peri area trench. A step is for forming the element isolation film(113) of the cell region and element isolation film(111) of the peri region by performing the planarization process.

Description

Method of forming isolation film of semiconductor device

1 to 5 are cross-sectional views of devices for describing a method of forming a device isolation film of a semiconductor device according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100 semiconductor substrate 101 tunnel insulating film

102: conductive film for floating gate 103: buffer film

104: hard mask film 105C: cell trench

105B: boundary region trench 106: primary insulating film

107: antireflection film 108: photoresist pattern

109: mask 110: ferry region trench

111, 112, 113: device isolation film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a device isolation film of a semiconductor device, and more particularly, to a method of forming a device isolation film of a semiconductor device capable of uniformly forming a pattern of a device isolation film by removing a step between a cell region and a ferry region.

In a semiconductor circuit, it is necessary to electrically separate a unit element formed on the semiconductor substrate, for example, a transistor, a diode, or a resistor. Therefore, this device isolation process is an initial step in all semiconductor manufacturing process steps, and depends on the size of the active region and the process margin of subsequent steps.

As a method for forming such device isolation, a LOCal Oxidation of Silicon (LOCOS) has been widely used. However, according to the LOCOS device isolation, as the oxygen penetrates into the side of the pad oxide film under the nitride film used as the mask for the selective oxidation of the semiconductor substrate, a bird's beak is generated at the end of the field oxide film. Since the field oxide film is extended to the active region by the length of the buzz beak by such a buzz beak, the channel length is shortened and the threshold voltage is increased, thereby causing problems such as deterioration of the electrical characteristics of the transistor. do.

On the other hand, the trench trench isolation (STI) process is an instability factor of the process such as deterioration of the field oxide film due to the reduction of the design rule of the semiconductor device, and the reduction of the active region due to the buzz beak. It is emerging as a device separation process that can fundamentally solve the problem.

The technical problem to be achieved by the present invention is to form a first insulating film for forming the device isolation film of the cell region, and then to proceed to the trench etching process and the second insulating film forming process for forming the device isolation film of the ferry region, Disclosed is a method of forming a device isolation film of a semiconductor device capable of uniformly forming a pattern by eliminating a defect due to a step of a ferry region.

The method of forming an isolation layer of a semiconductor device according to an embodiment of the present invention includes providing a semiconductor substrate divided into a cell region, a ferry region, a boundary region where the cell region and the ferry region meet each other, and a device isolation region of the cell region. And selectively etching the semiconductor substrate in the device isolation region of the boundary region to form a cell trench and a boundary region first trench, and forming a first insulating layer on the entire structure including the cell trench and the boundary region trench. Selectively etching the first insulating film and the semiconductor substrate formed on the device isolation region of the ferry region and the device isolation region of the boundary region to form a boundary region second trench and a ferry region trench; Forming a second insulating film over the entire structure including the region second trench and the ferry region trench And forming a device isolation film in a cell region, a device isolation film in a boundary region, and a device isolation film in a ferry region by performing a planarization process to expose the semiconductor substrate and the semiconductor substrate.

Prior to forming the cell trench and the boundary region first trench, a step of sequentially forming a tunnel insulating film, a floating gate conductive film, a buffer film, and a hard mask film on the semiconductor substrate is performed on the semiconductor substrate. It includes more.

The first insulating layer is formed of a PSZ (polysilazane) or SOD (Spin On Dielectric) film.

After the forming of the first insulating film, the method may further include planarizing the first insulating film by performing a planarization process.

The forming of the boundary region second trench and the ferry region trench may include forming an antireflection film on the first insulating film, forming a photoresist pattern on the antireflection film, and using the photoresist pattern. Etching the anti-reflection film, the first insulating film, and the semiconductor substrate by an etching process.

The second insulating film is formed of an HDP oxide film.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and the scope of the present invention is not limited to the embodiments described below. Only this embodiment is provided to complete the disclosure of the present invention and to fully inform those skilled in the art, the scope of the present invention should be understood by the claims of the present application.

1 to 5 are cross-sectional views of devices for describing a method of forming a device isolation film of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1, a tunnel insulating film 101, a floating gate conductive film 102, a buffer film 103, and a hard mask film 104 are sequentially stacked on a semiconductor substrate 100.

The tunnel insulating film 101 is deposited at 70 to 80 kW using a wet oxidation process, and the N2O annealing process is performed as a subsequent step to incorporate nitride inside the tunnel insulating film 101 to trap trap density. It is desirable to reduce the density and to improve the reliability. The floating gate conductive film 102 is preferably formed of a double film composed of an amorphous polysilicon film containing no impurities and a polysilicon film containing impurities. The buffer film 103 is preferably formed by depositing a nitride film with a thickness of 300 to 1000 GPa using an LP-CVD method. The hard mask film 104 is preferably formed to a thickness of 100 ~ 400 100 by using a LP-CVD method.

Referring to FIG. 2, the hard mask film 104, the buffer film 103, the floating gate conductive film 102, and the tunnel oxide film 101 are sequentially selected and etched on the boundary region between the cell region and the ferry region. The device isolation region of the semiconductor substrate 100 is exposed.

Thereafter, the exposed semiconductor substrate 100 is etched to form the trench 105C in the cell region and the trench 105B in the boundary region. Preferably, the width of the trench 105B in the boundary region is wider than the width of the trench 105C in the cell region.

 The first insulating film 106 is formed over the entire structure including the trench 105C in the cell region and the trench 105B in the boundary region. The first insulating film 106 is preferably formed of a fluid insulating film. The first insulating film 106 is preferably formed of a PSZ (polysilazane) or SOD (Spin On Dielectric) film. In this case, the first insulating layer 106 may be formed to completely fill the trench 105C of the cell region and the trench 105B of the boundary region. After that, it is preferable to perform a planarization process to planarize the surface of the first insulating film 106.

Referring to FIG. 3, an antireflection film 107 is formed on the entire structure including the first insulating film 106. The antireflection film 107 is preferably formed by coating and applying a liquid substance containing a carbon component, followed by curing.

Thereafter, after the photoresist film is coated on the entire structure including the antireflection film 107, the photoresist pattern 108 is formed by performing an exposure and development process using the mask 109. In this case, the photoresist pattern 108 is formed such that the device isolation region of the boundary region and the device isolation region of the ferry region are open. The exposure step is preferably performed using I-Line (λ = 365 nm), Krf (λ = 248 nm), or Arf (λ = 193 nm).

At this time, the anti-reflection film 107 and the photoresist pattern 108 are formed on the first flat insulating film 106 to be uniformly formed without a step.

Referring to FIG. 4, by performing an etching process using a photoresist pattern, an antireflection film, a first insulating film 106, a hard mask film 104, a buffer film 103, a floating gate conductive film 102, and a tunnel insulating film 101 and the semiconductor substrate 100 are sequentially etched to form the trench 110 in the ferry region and the trench 105B 'in the boundary region. In this case, the trench 110 in the ferry region and the trench 105B 'in the boundary region may be formed deeper than the trench 105C in the cell region.

Thereafter, the photoresist pattern and the antireflection film are removed.

Referring to FIG. 5, a second insulating layer is formed on the entire structure including the trench 110 in the ferry region and the trench 105B ′ in the boundary region. The second insulating film is preferably formed of an insulating film having a higher density than the first insulating film 106. It is preferable to form a 2nd insulating film with an HDP oxide film. In this case, the second insulating layer may be formed to completely fill the trench 110 in the ferry region and the trench 105B 'in the boundary region. Thereafter, a planarization process is performed to expose the buffer film, thereby forming the device isolation film 111 in the ferry region, the device isolation film 112 in the boundary region, and the device isolation film 113 in the cell region.

Thereafter, an etching process is performed to remove the buffer film.

As described above, the isolation layer 111 in the ferry region and the isolation layer 113 in the cell region may be formed of different insulating layers to improve insulation between transistors in the ferry region.

Although the present invention has been described in detail only with respect to specific embodiments, it can be apparent to those skilled in the art that modifications or changes can be made within the scope of the technical idea of the present invention, and such modifications or changes are defined in the claims of the present invention. Will belong.

According to an embodiment of the present invention, after forming the first insulating film for forming the device isolation film of the cell region, the trench etching process and the second insulating film forming process for forming the device isolation film of the ferry region are performed, The pattern can be formed uniformly by eliminating the defect due to the step of the ferry region.

In addition, the device isolation layer in the cell region and the device isolation layer in the ferry region may be formed of different insulating layers, thereby improving insulation characteristics between transistors in the ferry region.

Claims (12)

Providing a semiconductor substrate comprising a cell region and a ferry region; Etching the semiconductor substrate in the device isolation region of the cell region to form a cell trench; Forming a first insulating film on the entire structure including the cell trench; Etching the first insulating film and the semiconductor substrate formed on the device isolation region of the ferry region to form a ferry region trench; Forming a second insulating film on the entire structure including the ferry region trench; And Forming a device isolation film in a cell region and a device isolation film in a ferry region by performing a planarization process. The method of claim 1, Prior to forming the cell trench, And sequentially stacking a tunnel insulating film, a floating gate conductive film, a buffer film, and a hard mask film on the semiconductor substrate. The method of claim 1, And the first insulating film is formed of a fluid insulating film. The method of claim 3, wherein The fluid insulating layer is a method of forming a device isolation layer of a semiconductor device formed of a polysilazane (PSZ) or a spin on dielectric (SOD) film. The method of claim 1, After the step of forming the first insulating film, And planarizing the first insulating film by performing a planarization process. The method of claim 1, Forming the ferry region trench Forming an anti-reflection film on the first insulating film; Forming a photoresist pattern on the anti-reflection film; And Etching the anti-reflection film, the first insulating film, and the semiconductor substrate by an etching process using the photoresist pattern. The method of claim 1, And the second insulating film is formed of an insulating film having a higher density than the first insulating film. The method of claim 7, wherein And the second insulating film is formed of an HDP oxide film. The method of claim 1, And forming the ferry region trench deeper than the cell trench. The method of claim 1, And forming a boundary region first trench by etching the semiconductor substrate in the boundary region of the cell region and the ferry region when the cell trench is formed. The method of claim 10, And forming a boundary region second trench by etching the first insulating layer and the semiconductor substrate of the boundary region when the ferry region trench is formed. The method of claim 11, And forming a device isolation film in the boundary region by leaving first and second insulating films in the boundary region first and second trenches during the planarization process.

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