KR100828219B1 - Method For Testing Cell Of Liquid Crystal Display Using Depletion Thin Film Transistor - Google Patents

Abstract

The present invention discloses a test method for a liquid crystal display device. Disclosed is a liquid crystal cell test method for a liquid crystal display device including a gate line, a data line, an enhancement-type thin film transistor, a liquid crystal panel in which a liquid crystal cell is formed, and a driver integrated circuit for driving the liquid crystal panel. The liquid crystal panel is manufactured to form a depletion-type thin film transistor at the end of the circuit pad, and a test driving signal is applied to the liquid crystal panel through the depletion thin film transistor to test the liquid crystal cell of the liquid crystal panel.

Description

Method for Testing Cell Of Liquid Crystal Display Using Depletion Thin Film Transistor}

1 is a schematic configuration diagram for a liquid crystal cell test using a conventional thin film transistor,

2 is a schematic configuration diagram for a liquid crystal cell test using a conventional diode;

3A to 3D show the basic structure and ID vs. VDS characteristics of the thin film transistor of FIG. 1;

4 is a view showing ID vs. VGS characteristics of the thin film transistor of FIG. 1;

FIG. 5 is a graph illustrating a result of simulating a voltage drop according to a change in channel width of the thin film transistor of FIG. 1;

FIG. 6 is a graph illustrating a result of simulating a voltage drop according to a change in driving frequency of the thin film transistor of FIG. 1;

7 is a flowchart illustrating a liquid crystal cell test method of a liquid crystal display according to an exemplary embodiment of the present invention;

8A to 8D show the basic structure and ID vs. VDS characteristics of the depletion type thin film transistor used in FIG.

FIG. 9 is a diagram illustrating ID versus VGS characteristics of a depletion type thin film transistor used in FIG. 7.

The present invention relates to a test method for a liquid crystal display device, and more particularly, to a liquid crystal cell test method for a liquid crystal display device using a depletion type thin film transistor.

In general, liquid crystal displays are thinner, lighter, and consume less power than cathode ray tubes, and thus are used as screen display elements of portable information devices such as mobile phones and laptop computers.

Recently, a thin film transistor (TFT) or a diode for a liquid crystal cell test has been used as a liquid crystal cell test method of the liquid crystal display device in order to eliminate the efficiency of the liquid crystal cell test and the process problems caused by the liquid crystal cell test.

That is, the test drive signal (gate signal and data signal) is applied to the liquid crystal panel using a liquid crystal cell test thin film transistor or diode formed separately during the cell test, and after bonding the driver integrated circuit (IC), the thin film transistor or diode for cell test Does not affect the drive signal line of each liquid crystal panel.

1 is a schematic configuration diagram for a liquid crystal cell test using a conventional thin film transistor. Referring to FIG. 1, a conventional liquid crystal cell test method using a thin film transistor is provided through a liquid crystal cell test thin film transistor circuit 100 formed at each pad end before bonding a driver integrated circuit to a liquid crystal panel. The liquid crystal cell test is performed after turning all of the thin film transistors on by applying a test driving signal.

When the liquid crystal cell test is completed, the driver integrated circuit is bonded to the liquid crystal panel. In this case, since the driving signal for normal operation is not applied to the gate of the liquid crystal cell test thin film transistor circuit 100, the driving signal is turned off and does not affect the driving signal line of the liquid crystal panel.

2 is a schematic configuration diagram for a liquid crystal cell test using a conventional diode. Referring to FIG. 2, the liquid crystal cell test method using a conventional diode uses a diode circuit 200 that operates as an electrostatic discharge protection device instead of the thin film transistor of FIG. 1. Here, the diode has a structure in which the gate and the drain of the thin film transistor are commonly connected.

However, since the thin film transistor circuit 100 and the diode circuit 200 formed for the liquid crystal cell test in the above-described conventional technology have an enhancement type thin film transistor structure, a process of applying a test driving signal during the liquid crystal cell test. Has a structure in which a voltage drop is generated by an increased thin film transistor at.

This will be described with reference to FIGS. 3A to 3D, which illustrate the basic structure of the TFT array and the drain current ID to drain-source voltage VDS characteristics of the TFT. In general, an increased type thin film transistor has a structure in which a channel for flowing current from a drain to a source is formed in a semiconductor layer when the gate-source voltage VGS exceeds a threshold voltage (Vth). Here, the threshold voltage Vth is 4V.

In FIG. 3A, when the gate-source voltage VGS is 3V and smaller than the threshold voltage Vth 4V, no channel is formed in the semiconductor layer. Therefore, the semiconductor layer operates with infinite resistance and the drain current ID is zero regardless of the drain-source voltage VDS.

In FIG. 3B, when the gate-source voltage VGS is 8V and the threshold voltage Vth is greater than 4V, a channel is formed in the semiconductor layer. At this time, when the drain-source voltage VDS is applied to the channel formed in the semiconductor layer, the drain current ID flows, and as the drain-source voltage V DS increases, the drain current ID increases linearly. . Reference numeral W denotes a width of a channel formed in the semiconductor layer of the incremental thin film transistor. 4 shows the drain current ID vs. gate-source voltage VGS characteristics of such a thin film transistor.

FIG. 3C illustrates a pinched off state in which the gate-source voltage VGS is applied and the drain-source voltage VDS is applied at 4V as shown in FIG. 3B. When the drain-source voltage VDS is increased in the linear operation period of an incremental thin film transistor in which the gate-source voltage VGS is constantly maintained at a value greater than the threshold voltage Vth, the channel having the deep source end and the shallow drain end is The slope will increase.

If the drain-source voltage VDS increases and the gate-source voltage VGS minus the threshold voltage Vth is equal to the drain-source voltage VDS, the channel depth at the drain end decreases to zero to pinch off. It becomes a state. That is, in FIG. 3C, since VDS (4v) = VGS (8v)-Vth (4V), FIG. 3C is in the pinch off state.

3D illustrates that even when the drain-source voltage VDS is increased in the pinch-off state of FIG. 3C, the thin film transistor operates in a saturation region in which the drain current ID no longer increases.

That is, in the incremental thin film transistor, a gate-source voltage VGS greater than a threshold voltage Vth must be applied to form a channel, and when the drain-source voltage VDS is increased, the drain current (VDS) is increased. ID increases linearly, causing the channel to act as a resistor. Therefore, a voltage drop is generated in the process of applying the test driving signal through the incremental thin film transistor during the liquid crystal cell test.

In order to solve the voltage drop problem, 1) increasing the channel width of the thin film transistor, 2) adjusting the frequency of the test drive signal, and 3) comparing the test drive signal voltage with the actual drive signal voltage. A method of applying a high voltage can be used. 5 is a graph simulating that the voltage drop decreases as the channel width of the thin film transistor increases, and FIG. 6 shows the voltage drop as the frequency of the driving signal of the thin film transistor decreases (one horizontal cycle time increases). It is a graph simulating the decrease.

However, when the channel width of the increased type thin film transistor is increased, there is a problem in that a space constraint for forming the thin film transistor is followed, and when the frequency and voltage of the test drive signal are adjusted and applied, the liquid crystal cell test drive is performed. There is a problem that the correct liquid crystal cell test can not be performed because the deviation from the general specifications of the generator for applying the signal.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to test a liquid crystal cell of a liquid crystal display using a depletion type thin film transistor for liquid crystal cell test formed at an end of a driver integrated circuit pad.

In order to achieve the above object, the present invention provides a liquid crystal cell of a liquid crystal display including a gate line, a data line, an enhancement-type thin film transistor, a liquid crystal panel in which a liquid crystal cell is formed, and a driver integrated circuit for driving the liquid crystal panel. A test method comprising: a) fabricating a liquid crystal panel such that a depletion-type thin film transistor is formed at an end of the driver integrated circuit pad, and b) a driving signal for a test on the liquid crystal panel through the depletion thin film transistor. Applying a test to test the liquid crystal cell of the liquid crystal panel.

The present invention may further include c) applying a pinch-off voltage to the gate of the depletion type thin film transistor after the liquid crystal cell test step of the liquid crystal panel.

In addition, the step a) may include a first mask step of forming a gate pattern on a glass substrate, a second mask step of forming an active layer, a third mask step of forming a source-drain pattern, and a fourth mask forming a protective layer contact window And a fifth mask step of forming a pixel electrode pattern, the second mask step doping an n + layer to form an ohmic layer with a source-drain, and an n + layer in the depletion type thin film transistor region. After doping again, removing the ohmic layer of the source-drain of the incremental thin film transistor outside the depletion type thin film transistor region.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

7 is a flowchart illustrating a liquid crystal cell test method of a liquid crystal display according to an exemplary embodiment of the present invention. As shown in FIG. 7, a liquid crystal cell test method of a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel in which a gate line, a data line, an enhancement-type thin film transistor, and a liquid crystal cell are formed. A liquid crystal cell test method of a liquid crystal display device including a driver integrated circuit for driving a device, the depletion type thin film transistor forming step S100, the liquid crystal cell test step S200, and a pinch-off voltage applying step S300. ).

The depletion type thin film transistor forming step S100 is a step of manufacturing a liquid crystal panel such that a depletion-type thin film transistor is formed at an end of a driver integrated circuit pad.

The depletion type thin film transistor forming step S100 may be a process of fabricating an etch-back type thin film transistor, that is, a first mask step of forming a gate pattern on a glass substrate, a second mask step of forming an active layer, and a source And a third mask step of forming a drain pattern, a fourth mask step of forming a protective film contact window, and a fifth mask step of forming a pixel electrode pattern.

Here, the second mask step may form an ohmic layer with the source-drain by doping the n + layer, doping the n + layer in the depletion type thin film transistor region, and then Removing the ohmic layer of the source-drain. The other mask step is the same as the process of fabricating the increased type thin film transistor connected to the liquid crystal cell, and the process of fabricating the other liquid crystal panel is well known to those skilled in the art, so the detailed description is omitted.

The liquid crystal cell test step (S200) is a step of testing a liquid crystal cell of a liquid crystal panel by applying a test driving signal to the liquid crystal panel through a depletion type thin film transistor.

The test driving signal may include a gate signal and a data signal for driving the liquid crystal cell of the liquid crystal panel, and may be provided by a pattern generator for generating a driving signal meeting the test specification.

Since the n + channel is formed between the source and the drain in the depletion type thin film transistor forming step S100, current may flow between the source and the drain even when the gate voltage VGS is 0V. Therefore, since the depletion type thin film transistor can be turned on even at a voltage level lower than that of the conventional test signal voltage, the conventional voltage drop problem can be avoided without widening the width of the liquid crystal cell test thin film transistor or adjusting the frequency of the test drive signal. It can be solved.

The pinch-off voltage applying step (S300) is a step of applying a pinch-off voltage to the gate of the depletion type thin film transistor after the liquid crystal cell test step (S200) of the liquid crystal panel.

This is to open the depletion type thin film transistor after the liquid crystal cell test step S200 to disconnect the gate line and the data line of the liquid crystal panel. Thereafter, the process of bonding the driver integrated circuit to the liquid crystal panel is performed.

Next, when the liquid crystal cell test method of the liquid crystal display according to the exemplary embodiment of the present invention is performed, an operation process of the depletion type thin film transistor will be described with reference to FIGS. 8A to 8D. 8A through 8D show the basic structure and the drain current ID vs. drain-source voltage VDS specification of a depletion thin film transistor.

8A shows that a depletion type thin film transistor does not need to induce a channel unlike an incremental thin film transistor. This is because depletion type thin film transistors have physically implanted channels. Therefore, in the depletion type thin film transistor, the threshold voltage (Vth: Threshold Voltage) becomes 0V. In FIG. 8A, since the drain-source voltage VDS is not applied, the drain current ID does not flow.

FIG. 8B illustrates a case where a drain-source voltage VDS of 5V is applied to the depletion type thin film transistor of FIG. 8A. At this time, as the drain current ID flows and the drain-source voltage VDS increases, the drain current ID increases linearly and is pinched off to operate in a saturation region. Shows the case. Where Vp is the voltage at which the channel of the depletion type thin film transistor is pinched off.

8C illustrates that when the gate-source voltage VGS of −3 V is applied to the depletion thin film transistor of FIG. 8A, the drain-source voltage VDS for pinching off the channel of the depletion thin film transistor is 2V. That is, when a negative gate-source voltage VGS is applied, electrons of the channel are pushed out of the channel, and the channel is depleted, so that the depletion type thin film transistor operates in the depletion mode.

8D illustrates that when the gate-source voltage VGS of 3V is applied to the depletion thin film transistor of FIG. 8A, the drain-source voltage VDS for pinching off the channel of the depletion thin film transistor is 8V. That is, when a positive gate-source voltage VGS is applied, more electrons are introduced into the channel and the channel is increased, so that the depletion type thin film transistor operates in an enhancement mode.

FIG. 9 illustrates the drain current (ID) versus gate-source voltage (VGS) characteristics of the thin film transistor, in which the depletion type thin film transistor used in the liquid crystal cell test method according to the exemplary embodiment of the present invention is depleted in mode and increased. Demonstrates that it can operate in mode.

Therefore, when the liquid crystal cell is tested in the liquid crystal cell test method according to an embodiment of the present invention, the depletion type thin film transistor is preferably operated in an incremental mode. After the liquid crystal cell test, the depletion mode is performed after the driver IC is bonded. It is desirable to operate at.

As described above, the cell test method of the liquid crystal display device using the depletion type thin film transistor of the present invention is to test the liquid crystal cell of the liquid crystal display device using the depletion type thin film transistor for the liquid crystal cell test formed on the end of the driving integrated circuit pad. Therefore, there is an effect that can reduce the voltage drop generated during the conventional liquid crystal cell test.

In addition, since the depletion type thin film transistor can be operated at a low driving voltage during the liquid crystal cell test, the liquid crystal cell test can be performed within the specification of the existing pattern generator.

In addition, preferred embodiments of the present invention are disclosed for the purpose of illustration, those skilled in the art will be able to various modifications, changes, additions, etc. within the spirit and scope of the present invention, these modifications and changes should be seen as belonging to the following claims. something to do.

Claims (3)

A liquid crystal cell test method of a liquid crystal display device comprising a liquid crystal panel including a gate line, a data line, an enhancement-type thin film transistor and a liquid crystal cell, and a driver integrated circuit driving the liquid crystal panel: a) fabricating the liquid crystal panel such that a depletion-type thin film transistor is formed at an end of the driver integrated circuit pad; b) testing a liquid crystal cell of the liquid crystal panel by applying a test driving signal to the liquid crystal panel through the depletion type thin film transistor; Cell test method of a liquid crystal display comprising a. The method of claim 1, c) after the liquid crystal cell testing of the liquid crystal panel, applying a pinch-off voltage to the gate of the depletion type thin film transistor;  Cell test method of liquid crystal display. The method of claim 1, The a) step may include a first mask step of forming a gate pattern on a glass substrate, a second mask step of forming an active layer, a third mask step of forming a source-drain pattern, and a fourth mask step of forming a protective film contact window And a fifth mask step of forming a pixel electrode pattern, In the second mask step, an n + layer is doped to form an ohmic layer with a source-drain, and the dopant thin film transistor region is doped again with an n + layer, and then the increase type outside the depletion thin film transistor region is obtained. Removing the ohmic layer of the source-drain of the thin film transistor  Cell test method of liquid crystal display.

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