KR100777988B1 - Television receiver of universal serial bus external type - Google Patents

Abstract

The present invention relates to a USB external TV receiver for simultaneously transmitting high speed data by inserting audio data into video data without compressing analog video and audio data, and receiving analog broadcast data and digital broadcast data through an antenna and a cable to perform digital data. And a tuner for separating analog data, 8VSB for receiving and transmitting digital data output from the tuner, a decoder for decoding analog video data output from the tuner, and audio for processing analog audio data output from the tuner, the 8VSB FPGA for processing digital data from the decoder, video data from the decoder, and audio data from the audio for high speed transfer, and USB 2.0 control for high speed transfer of the digital data, analog video data, and audio data to a PC Includes n. According to the present invention configured as described above, the data is transmitted to a PC without compressing data by using a high-speed transmission technology using an FPGA, and audio is transmitted during horizontal blank signal during video data transmission without using a separate interface to transmit audio data to the PC. Since it carries data, no extra hardware is required, so a low-cost receiver can be produced.

Description

USB external TV receiver {TELEVISION RECEIVER OF UNIVERSAL SERIAL BUS EXTERNAL TYPE}

1 is a block diagram showing the configuration of a conventional TV receiver.

2 is a block diagram showing the structure of another conventional TV receiver;

Figure 3 is a block diagram showing the configuration of a USB external TV receiver according to the present invention.

Figure 4 is a block diagram showing the configuration of the FPGA of the USB external TV receiver according to the present invention.

Figure 5 is a waveform output diagram showing the waveform output in the FPGA of the USB external TV receiver according to the present invention.

The present invention relates to a TV receiver, and more particularly, to a USB external TV receiver for high-speed transmission by inserting audio data into video data without compressing analog video and audio data when transmitting a TV signal to a PC. will be.

As shown in FIG. 1, a conventional TV receiver includes a tuner 10 which receives analog broadcast data and digital broadcast data through an antenna and a cable, and separates the digital broadcast data into digital data and analog data, and is output from the tuner 10. 8VSB 20 for receiving and transmitting digital data, a decoder 21 for decoding analog video data output from the tuner 10, and audio 23 for processing analog audio data output from the tuner 10. And an encoder 25 which mixes and decodes the decoded video data from the decoder 21 and the audio data from the audio 23, and digital data from the 8VSB (8Vestigial Side Band) 20. Field-Programmable Gate Array (FPGA) 30 for processing analog video data and audio data from encoder 25 and the digital data, analog video data Emitter and a high speed transmission USB 2.0 controller 40 to the audio data to the PC.

However, since such a TV receiver transmits the analog video and audio data through the encoder 25 to the PC in order to reduce the amount of transmission data, a separate decoder is required for the PC to decode the encoded signal. Therefore, the price of the hardware increases accordingly, and since the original data is reproduced through compression and extension, there is a problem in that a deterioration of data occurs and a clean screen cannot be viewed.

In addition, as shown in FIG. 2, the decoded video data at the decoder 21 and the audio data from the audio 23 are also separated, but since the audio data cannot be processed simultaneously, a separate audio interface 24 is provided. There is a problem to be provided.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and its object is to provide high speed transmission at the same time by inserting audio data into video data without compressing analog video and audio data when transmitting TV signal to PC. It is to provide a TV receiver.

USB external TV receiver according to the present invention for achieving the above object, as a USB external TV receiver for receiving digital data and analog data, receiving analog broadcast data and digital broadcast data with an antenna and cable digital data And a tuner 100 for separating analog data, an 8VSB 200 for receiving and transmitting digital data output from the tuner 100, and a decoder 210 for decoding analog video data output from the tuner 100; Processing audio 230 for processing analog audio data output from the tuner 100, digital data from the 8VSB 200, video data from the decoder 210, and audio data from the audio 230. FPGA 300 for high speed transmission, and the digital data, analog video data and audio data It includes a USB 2.0 controller 400 for fast transmission.

Here, the FPGA 300 may include a first selector 310 for receiving and selecting digital data, a second selector 320 for receiving and selecting analog video data, and a third selector for receiving and selecting analog audio data ( 330, a buffer 325 for temporarily storing video data received and selected from the second selector 320, and a FIFO for outputting audio data received and selected from the third selector 330 according to an external clock generation order. 335, a first multiplexer 340 for multiplexing signals from the buffer 325 and the FIFO 335 and inserting audio data into the video data, and data from the first selector 310 and the first signal; It is preferred to include a second multiplexer 350 to multiplex the data from one multiplexer 340.

In addition, the vertical blank signal is preferably input to the buffer 325 and the FIFO 335 in the FPGA 300 so as to output an audio data signal during the blank of the video data signal.

Hereinafter, a USB external TV receiver according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 3 is a block diagram showing the configuration of a USB external TV receiver according to the present invention, Figure 4 is a block diagram showing the configuration of the FPGA of the USB external TV receiver according to the present invention, Figure 5 is a USB according to the present invention A waveform output diagram showing waveform output in an FPGA of an external TV receiver.

As shown in FIG. 3, the USB external TV receiver according to the present invention includes a tuner 100 and a tuner 100 for receiving analog broadcast data and digital broadcast data through an antenna and a cable, and separating the digital data and analog data. 8VSB 200 for receiving and transmitting digital data output from the decoder, a decoder 210 for decoding analog video data output from the tuner 100, and audio for processing analog audio data output from the tuner 100 ( 230, the FPGA 300 which processes and transmits the digital data from the 8VSB 200, the video data from the decoder 210, and the audio data from the audio 230, and the digital data and analog video. And a USB 2.0 controller 400 for high speed transfer of data and audio data to a PC.

In addition, as shown in FIG. 4, the FPGA 300 stores a first selector 310 for receiving and selecting digital data, a second selector 320 for receiving and selecting analog video data, and analog audio data. A third selector 330 for receiving and selecting, a buffer 325 for temporarily storing video data received and selected from the second selector 320, and audio data received and selected from the third selector 330. The first multiplexer 340 and the first multiplexer 340 for outputting the audio data to the video data by multiplexing the signals from the buffer 325 and the FIFO 335 according to the order of clock generation. And a second multiplexer 350 that multiplexes the data from the first selector 310 and the data from the first multiplexer 340.

At this time, in the USB external TV receiver according to the present invention, it is preferable to control the operation of the entire system by supplying a periodic clock pulse to the FIFO 335 through a clock generator (not shown).

In addition, a vertical blank signal into which the vertical synchronization signal is inserted is input to the buffer 325 and the FIFO 335 so that no vertical blanking is involved in the vertical scan of the USB external TV receiver according to the present invention.

That is, in the USB external TV receiver according to the present invention, an asynchronous FIFO 335 is implemented in the FPGA 335 to transmit an audio data signal using the vertical blank, and the FIFO 335 is continuously input. ) And output the audio data signal stored in the FIFO 335 during the blank of the video data signal.

Therefore, as shown in Fig. 5D, the audio data a, b, c, ... is inserted into the empty cycle of the video data B, C, D, ..., and is transmitted at high speed. That is, the audio data continuously input is stored in the FIFO 335 and the audio data stored in the FIFO 335 is output during the blank of the video data to output the audio data to the video data. Therefore, the timing of the data is adjusted in the FPGA 300.

Although the present invention has been described above according to an embodiment of the present invention, a person skilled in the art to which the present invention belongs has changed and modified within the scope without departing from the technical spirit of the present invention. Of course.

As described above, according to the USB external TV receiver according to the present invention, data is transmitted to a PC without compressing data through a high-speed transmission technology using an FPGA, and a separate interface is not used to transmit audio data to the PC. Since audio data is loaded during the horizontal blank signal during video data transmission, no additional hardware is required, and thus a low-cost receiver can be produced.

Claims (3)

USB external TV receiver for receiving digital data and analog data, A tuner 100 which receives analog broadcast data and digital broadcast data with an antenna and a cable, and separates the digital broadcast data into digital data and analog data; 8VSB 200 for receiving and transmitting the digital data output from the tuner 100, A decoder 210 for decoding analog video data output from the tuner 100 and an audio 230 for processing analog audio data output from the tuner 100, An FPGA 300 which processes digital data from the 8VSB 200 and video data from the decoder 210 and audio data from the audio 230 and transmits them at high speed; And a USB 2.0 controller (400) for high speed transfer of the digital data, analog video data and audio data to a PC. The method of claim 1, The FPGA 300, A first selector 310 for receiving and selecting digital data, A second selector 320 for receiving and selecting analog video data, A third selector 330 for receiving and selecting analog audio data, A buffer 325 for temporarily storing video data received and selected from the second selector 320, A FIFO 335 for outputting audio data received and selected from the third selector 330 in the order of external clock generation; A first multiplexer 340 for multiplexing signals from the buffer 325 and the FIFO 335 to insert the audio data into the video data, and And a second multiplexer (350) for multiplexing the data from the first selector (310) and the data from the first multiplexer (340). The method according to claim 1 or 2, USB external TV receiver, characterized in that the vertical blank signal is input to the buffer (325) and FIFO (335) in the FPGA (300) to output the audio data signal during the blank of the video data signal.

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