KR100709565B1 - Method for fabricating capacitor in semiconductor device - Google Patents

Abstract

The present invention is to provide a method of manufacturing a capacitor of a semiconductor device to prevent the lower structure from damage in the process of removing the capacitor formation sacrificial film to form a cylindrical lower electrode, to which the present invention is completed a substrate Forming an insulating film on the substrate; Forming a buffer film for protecting a lower structure on the insulating film; Forming a sacrificial layer for forming a capacitor on the underlayer protective buffer layer; selectively removing the underlayer protective buffer layer and the capacitor forming sacrificial layer to form a capacitor forming hole through which the contact plug is exposed; Forming a lower electrode in the capacitor forming hole; Removing the capacitor forming sacrificial layer by a wet etching process; Forming a dielectric thin film on the lower electrode surface; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

Semiconductor, Capacitor, Wet Etch, Interlayer Insulator, Cylinder.

Description

METHODS FOR FABRICATING CAPACITOR IN SEMICONDUCTOR DEVICE}             

1A to 1B show a method of manufacturing a capacitor of a semiconductor device according to the prior art.

2A to 2H illustrate a method of manufacturing a capacitor of a semiconductor device according to a preferred embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

35: etching stop film

36: buffer film for protecting the substructure

37: sacrificial film for capacitor formation

38: hole for capacitor formation

39: spacer for lower electrode

41: lower electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a capacitor of a semiconductor device having a three-dimensional structure.

As the degree of integration of semiconductor memory devices, in particular DRAM (Dynamic Random Access Memory), increases, the area of memory cells, which are basic units for information storage, has been rapidly reduced.

Such a reduction in the memory cell area is accompanied by a reduction in the area of the cell capacitor, thereby lowering the sensing margin and the sensing speed, and causes a problem that the durability against soft errors caused by α-particles is degraded. Accordingly, there is a need for a method capable of securing sufficient capacitance in a limited cell area.

The capacitance C of the capacitor is defined as in Equation 1 below.

C = εAs / d

Is the dielectric constant, As is the effective surface area of the electrode, and d is the distance between the electrodes. Therefore, in order to increase the capacitance of the capacitor, it is necessary to increase the surface area of the electrode, reduce the thickness of the dielectric thin film, or increase the dielectric constant.

Among them, a method of increasing the effective surface area of the electrode in a limited layout area by first making a three-dimensional form of the electrode structure of the capacitor, such as a concave structure and a cylinder structure, was first considered.                         

The concave structure forms a hole in which an electrode of a capacitor is to be formed in an insulating film, a lower electrode of a capacitor is formed on an inner surface of the hole, and a dielectric thin film and an upper electrode are formed thereon. However, as semiconductor memory devices are increasingly integrated, it is difficult to secure sufficient capacitor capacity per cell within a limited cell area even with a concave structure, and thus a cylinder structure capable of providing a larger surface area has been proposed.

The cylinder structure forms a hole in which the electrode of the capacitor is to be formed in the insulating film, forms a lower electrode of the capacitor in the hole, removes the insulating film used as a formwork, and then removes the dielectric thin film and the upper electrode along the remaining lower electrode surface. It is a form laminated in order.

Therefore, the cylinder structure can use both the inner and outer surfaces of the lower electrode as the effective surface area of the capacitor, thereby forming a capacitor having a larger capacitance in a limited area than the concave structure.

However, the degree of integration of semiconductor memory devices is increasing and the area allocated to one unit cell continues to decrease. On the other hand, in a situation where a capacitor has a constant capacity to maintain stable data, the electrode is also manufactured in a capacitor having a cylindrical structure, and the width thereof is getting narrower and higher.

In addition, the capacitor of the cylinder structure has a problem in that the chemical solution used in the wet etching process of removing the capacitor forming insulating film when the lower electrode is formed damages the lower structure.

1A to 1B are views showing a capacitor manufacturing method of a semiconductor device according to the prior art.

In the method of manufacturing a capacitor of a semiconductor device according to the related art, first, as shown in FIG. 1A, an interlayer insulating film 12 is formed on a semiconductor substrate 10 on which an active region 11 is formed, and then an interlayer insulating film 12 is formed. A through hole is formed to penetrate the active region 11 of the semiconductor substrate 10. A contact plug 13 is formed by filling the contact hole with a conductive material.

Next, after the upper region of the contact plug 13 is recessed, titanium silicide 14 is formed in the recessed region.

Subsequently, an etch stop layer 15 is formed of a silicon nitride layer, and a sacrificial layer 16 for forming a capacitor is formed thereon. Subsequently, the capacitor forming sacrificial film formed on the contact plug 13 is selectively removed to form the capacitor forming hole.

Subsequently, the lower electrode 17 is formed of a metal film in the capacitor forming hole.

Subsequently, as shown in FIG. 1B, the sacrificial layer 16 for forming the capacitor is removed by a wet etching process.

Subsequently, the lower electrode 17 is formed of a dielectric thin film made of a material having a high dielectric constant on its surface, and an upper electrode is formed thereon.

As described above, in order to secure the capacity of the capacitor in a limited area, the lower electrode is formed in a cylindrical shape. However, this is not sufficient, and a material having a high dielectric constant is used as the dielectric thin film. The upper and lower electrodes are formed of a metal film in order to obtain the high dielectric constant thin film characteristics.

When the lower electrode is used as a metal film, unlike the conductive polysilicon film mainly used as a lower electrode, fine uniformity is generated at an interface between the lower electrode and an underlying structure such as an etch stop film or a contact plug. Reference)

Chemicals used in the wet etching process of removing the capacitor-forming sacrificial layer to make the cylindrical lower electrode penetrate and diffuse through the interface between the lower electrode and the lower structure such as an etch stop film or a contact plug to decompose the insulating film, or It causes voids such as bunkers and even causes corrosion or uniformity of bit lines having electrical wiring characteristics.

While the lower electrode is used as the metal film to secure the capacity of the capacitor, the process of removing the capacitor forming sacrificial film by the wet etching process is essential to form the cylindrical lower electrode. It is essential to develop a process so that the lower bottom structure of the lower electrode is not damaged.

The present invention has been proposed to solve the above-described problem, and an object of the present invention is to provide a method of manufacturing a capacitor of a semiconductor device such that the lower structure is not damaged in the process of removing the capacitor forming sacrificial film to form the cylindrical lower electrode. do.

The present invention includes forming an insulating film having a contact hole exposing an active region on a substrate; Filling the contact hole in the insulating layer to form a contact plug in contact with the active region; Sequentially forming an underlayer protective buffer film and a capacitor forming sacrificial film on the insulating film to cover the contact plug; Selectively removing the underlayer protective buffer layer and the capacitor forming sacrificial layer to form a capacitor forming hole exposing the contact plug; Forming a spacer on a sidewall of the capacitor forming hole; Forming a lower electrode on the spacer, the lower electrode being in electrical contact with the contact plug; Removing a portion of the capacitor forming sacrificial layer and the spacer that protrudes higher than the buffer layer for protecting the lower structure by a wet etching process; Forming a dielectric thin film on the lower electrode surface; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

The present invention is due to the chemical solution used in the wet etching process of removing the capacitor forming sacrificial film by forming a buffer buffer for the lower structure between the silicon nitride film formed of the etch stop film and the sacrificial film for forming the capacitor when forming the cylindrical lower electrode In the process of removing the capacitor-forming sacrificial film, the stress rapidly changed and appropriately alleviated, thereby preventing the chemical solution from penetrating and diffusing into the substructure.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2A to 2G illustrate a method of manufacturing a capacitor of a semiconductor device according to an exemplary embodiment of the present invention.

In the method of manufacturing a capacitor of a semiconductor device according to the present embodiment, as shown in FIG. 2A, an interlayer insulating film 32 is formed on a semiconductor substrate 30 on which an active region 31 is formed, and then an interlayer insulating film 32 is formed. A contact hole connected to the active region 31 of the semiconductor substrate 30 is formed through the through hole. A contact plug 33 is formed by filling the contact hole with a conductive material.

The conductive material may be a polysilicon film or a metal such as tungsten.

The interlayer insulating layer 32 may include an undoped-silicate glass (USG) film, a phospho-silicate glass (PSG) film, a boro-phospho-silicate glass (BPSG) film, a high density plasma (HDP) oxide film, and a spin on glass (SOG) film. Membranes, TEOS (Tetra Ethyl Ortho Silicate), LP-TEOS (Low Pressure TEOS), or HDP (high densigy plasma) using oxide film or thermal oxide (Thermal Oxide; high temperature between 600 ~ 1,100 ℃ in the furnace Film formed by oxidizing a silicon substrate).

Subsequently, after the upper region of the contact plug 33 is recessed, the metal silicide layer 34 is formed in the recessed region. The metal used for the metal silicide film may be any one selected from the group of Ti, Co, Pt, Ir, Ru, and AlSiN ₃ , or a mixture of at least two materials selected from the group, in a reducing atmosphere in a temperature range of 500 to 1000 degrees. It is formed by rapid heat treatment.

Subsequently, an etch stop layer 35 is formed of the silicon nitride layer SixNy. Where x and y are in the range 0.1-4, 0.1-5.

Subsequently, as shown in FIG. 2B, an underlayer protective buffer layer 36 is formed on the etch stop layer 35. The underlayer protective buffer layer 36 is formed of a silicon oxide layer 36a or a polysilicon layer 36b. Use to form a range of 10 ~ 3000Å.

In addition, the lower protective film 36 may be formed by stacking the silicon oxide film 36a and the polysilicon film 36b at a constant ratio. The silicon oxide film 36a is formed using PSG, USG, or LP-TEOS.

In addition, a silicon oxide film 36a may be formed above and below the polysilicon 36b.

In addition, the polysilicon film 36b is formed in a reducing atmosphere in a temperature range of 400 to 700 degrees by using a method of forming in a thermal equilibrium state of gas.

The polysilicon film 36b is formed using chemical vapor deposition or atomic layer deposition.

Subsequently, as shown in FIG. 2C, a sacrificial film 37 for forming a capacitor is formed on the buffer film 36 for protecting the underlying structure. At this time, the height of the capacitor-forming sacrificial film 37 and the underlayer protective buffer film 36 becomes the height at which the cylindrical lower electrode is to be formed.

Here, the capacitor forming sacrificial film 37 may include an undoped-silicate glass (USG) film, a phospho-silicate glass (PSG) film, a boro-phospho-silicate glass (BPSG) film, a high density plasma (HDP) oxide film, and a spin (SOG) film. On Glass (TEOS), Tetra Ethyl Ortho Silicate (TEOS), Low Pressure TEOS (LP-TEOS), or oxide film using HDP (high densigy plasma), or thermal oxide (Thermal Oxide; between 600 ~ 1,100 ℃ in furnace) And a film formed by oxidizing the silicon substrate at a high temperature of.

Subsequently, as shown in FIG. 2D, the capacitor forming sacrificial film 37 and the underlying structure protecting buffer film 36 are selectively removed, and then the exposed etch stop layer 35 is removed to remove the capacitor forming hole 38. ).

Subsequently, as shown in FIG. 2E, an oxide film or a nitride film is formed along the pattern of the capacitor forming hole 38, and then the capacitor is formed through a blank etch back process to expose the metal silicide film 34. Spacers 39 are formed on the sidewalls of the holes 38.

The reason why the spacer 39 is formed is that when the lower electrode protective buffer layer 36 is used as a polysilicon layer, a short may occur between neighboring lower electrodes, which is a film for preventing this.

Subsequently, as shown in FIG. 2F, the silicide 40 is formed on the bottom surface of the capacitor forming hole 38 to be in contact with the metal silicide film 34, and the lower electrode 41 is formed on the spacer 39. ).

The lower electrode 41 includes a tungsten film W or a titanium nitride film TiN, a platinum film Pt, an iridium film Ir, an iridium oxide film IrO ₂ , a ruthenium film Ru, a ruthenium oxide film RuO ₂ , Tungsten nitride film (WN) or the like is used, or a combination thereof is used for lamination.

Subsequently, as shown in FIG. 2G, a portion of the lower electrode of the cylinder structure is removed by removing the portion protruding higher than the buffer layer 36 for protecting the lower structure of the spacer 39 together with the capacitor forming sacrificial layer 37 using the wet etching process. To form.

At this time, the chemical solution used in the wet etching process is mixed with a strong acid such as HF, BOE solution (Buffered Oxidant Etchant, HF + NF ₄ ), H2SO4, H ₃ PO ₄ and a certain amount of H ₂ O, H ₂ O ₂ Use it.

At this time, even if the chemical solution is used to remove the capacitor-forming sacrificial film 37 in the wet etching process, since there is a buffer layer 36 for protecting the lower structure, the chemical solution does not penetrate into the lower structure, thereby etching the lower insulating film. The resulting bunks and voids are not formed.

This is due to the underlayer protective buffer layer 36 formed under the capacitor forming sacrificial layer 37 at the process of removing the capacitor forming sacrificial layer 37, thereby appropriately buffering and relieving the underlying structure. This prevents the penetration of chemical solution from penetration.

Subsequently, as shown in FIG. 2H, a dielectric thin film 42 is formed on the surface of the lower electrode 41.

The dielectric thin film 42 includes a silicon oxide film, a silicon nitride film, Ta ₂ O ₅ , Al ₂ O ₃ , La ₂ O ₃ , HfO ₂ , SrTiO ₃ , (Ba _{1- x} , Sr _x ) TiO ₃ (BST), ZrO _High dielectric materials such as ₂ , (Pb, Zr) TiO ₃ (PZT), BaTiO ₃ (BTO), (Bi _{1- x} , Lax) Ti ₃ O ₁₂ (BLT), (Pb, La) (Zr, Ti) _One of the ferroelectric materials such as O ₃ (PLZT), SrBi ₂ Ta ₂ O ₉ (SBT), SrBi ₂ (Ta _1-x , Nb _x ) ₂ O ₉ (SBTN), Bi ₄ Ti ₃ O ₁₂ (BiT) It may be selected or a combination thereof may be laminated.

The dielectric thin film 42 is formed in the range of 10 to 1000 mW using the atomic layer deposition method or the chemical vapor deposition method. Subsequently, the heat treatment process is performed in the range of 200 to 700 degrees to improve the characteristics of the dielectric thin film 42.

Subsequently, an upper electrode 43 is formed on the dielectric thin film 42 to complete the capacitor.                     

The upper electrode 43 includes a tungsten film W or a titanium nitride film TiN, a platinum film Pt, an iridium film Ir, an iridium oxide film IrO ₂ , a ruthenium film Ru, a ruthenium oxide film RuO ₂ , Tungsten nitride film (WN) or the like is used, or a combination thereof is used for lamination.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention, even when the capacitor lower electrode is formed in a cylindrical shape using a metal, a buffer film is provided at a lower end thereof in the process of forming the cylindrical lower electrode, and thus wet etching is used to remove the sacrificial film for capacitor formation. The chemical solution does not penetrate the infrastructure and does not damage the infrastructure.

Therefore, a more reliable capacitor and semiconductor device can be manufactured.

Claims (12)

Forming an insulating film having a contact hole exposing an active region on the substrate; Filling the contact hole to form a contact plug in contact with the active region; Sequentially forming an underlayer protective buffer film and a capacitor forming sacrificial film on the insulating film to cover the contact plug; Selectively removing the underlayer protective buffer layer and the capacitor forming sacrificial layer to form a capacitor forming hole exposing the contact plug; Forming a spacer on a sidewall of the capacitor forming hole; Forming a lower electrode on the spacer, the lower electrode being in electrical contact with the contact plug; Removing a portion of the capacitor forming sacrificial layer and the spacer that protrudes higher than the buffer layer for protecting the lower structure by a wet etching process; Forming a dielectric thin film on the lower electrode surface; And Forming an upper electrode on the dielectric thin film Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 1, The buffer structure for protecting the substructure A method for manufacturing a capacitor of a semiconductor device, characterized in that it is formed of a silicon oxide film or polysilicon, or a laminate thereof. delete The method of claim 2, The silicon oxide film is At least one of a PSG film, a USG film, or a PL-TEOS film is selected. The method of claim 1, The method for manufacturing a capacitor of a semiconductor device, characterized in that the buffer structure for protecting the substructure is formed in the range of 10 ~ 1000Å. The method of claim 2 The method for manufacturing a capacitor of a semiconductor device, wherein the buffer film for protecting the substructure is formed by using chemical vapor deposition or atomic layer deposition. The method of claim 1, The chemical solution used in the wet etching process A method for manufacturing a capacitor of a semiconductor device, comprising using a mixture of one selected from HF, BOE solution (HF + NF ₄ ), H 2 SO ₄ or H ₃ PO _4, and a predetermined amount of H ₂ O, H ₂ O ₂ . delete The method of claim 1, And forming a metal silicide film connected to an upper end of the contact plug and a lower end of the lower electrode. The method of claim 9, The metal silicide is A method for manufacturing a capacitor of a semiconductor device, characterized in that it is formed using any one selected from the group of Ti, Co, Pt, Ir, Ru, and AlSiN ₃ or a mixture of at least two materials selected from the group. The method of claim 1, The contact plug is A method for manufacturing a capacitor of a semiconductor device, characterized in that formed from tungsten. The method of claim 1, The buffer structure for protecting the substructure A method for manufacturing a capacitor of a semiconductor device, characterized in that formed of a silicon oxide film / polysilicon / silicon oxide film.

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