KR100629177B1 - Organic electro-luminescence display - Google Patents

Abstract

The present invention relates to an organic light emitting display device capable of correcting a gamma voltage as necessary.

The organic electroluminescent display includes a control unit for generating first and second selection signals; The high potential gamma reference is performed by dividing the first high potential source voltage and the first low potential source voltage using a first voltage divider circuit including a plurality of voltage divider nodes and controlling the output paths of the voltages divided in response to the first selection signal. A first reference voltage generator for generating a voltage; The low potential gamma reference is performed by dividing the second high potential source voltage and the second low potential source voltage using a second voltage divider circuit including a plurality of voltage divider nodes, and controlling the output paths of the voltages divided in response to the second selection signal. A second reference voltage generator which generates a voltage; And a gamma voltage generator configured to divide the high potential gamma reference voltage and the low potential gamma reference voltage to generate analog gamma voltages for each gray level.

Description

Organic electroluminescent display {ORGANIC ELECTRO-LUMINESCENCE DISPLAY}

1 is a cross-sectional view illustrating an organic light emitting diode device formed in a conventional organic electroluminescent display.

2 is a block diagram schematically illustrating an organic electroluminescent display.

3 is an equivalent circuit diagram of an active type pixel.

4 is a waveform diagram illustrating a driving signal of an organic light emitting display device.

5 is a block diagram illustrating a data driver in an organic light emitting display device according to an exemplary embodiment of the present invention.

6 is a circuit diagram illustrating in detail a first reference voltage generator illustrated in FIG. 5.

FIG. 7 is a circuit diagram illustrating in detail a second reference voltage generator illustrated in FIG. 5.

<Description of the code | symbol about the principal part of drawing>

1 glass substrate 2 anode electrode

3: hole injection layer 4: light emitting layer

5: electron injection layer 6: cathode electrode

20: display panel 21, 56: timing controller

22, 50: data driver 23: gate driver

51A, 51B: reference voltage generator 52: gamma voltage generator

53: DAC 54: Shift Register

55: latch

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic electroluminescent display, and more particularly, to an organic electroluminescent display that enables gamma voltage correction as necessary.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCDs"), field emission displays (FED) plasma display panels (hereinafter referred to as "PDPs") and electroluminescence. And an electro-luminescence display.

Among them, PDP is attracting attention as the most favorable display device for light and small size and large screen because of its simple structure and manufacturing process, but it has the disadvantages of low luminous efficiency, low luminance and high power consumption. Active matrix LCDs with thin film transistors (hereinafter referred to as "TFTs") as switching devices are difficult to screen due to the use of semiconductor processes, but demand is increasing as they are mainly used as display devices in notebook computers. In contrast, the electroluminescent display is classified into an inorganic electroluminescent display and an organic electroluminescent display according to the material of the light emitting layer. The electroluminescent display is a self-luminous element that emits light and has a high response speed, high luminous efficiency, high luminance and a viewing angle.

Each organic light emitting diode (OLED) of the organic light emitting display device has an anode electrode 2 formed as a transparent electrode pattern on a glass substrate 1 and a hole injection layer 3 stacked thereon as shown in FIG. 1. ), A light emitting layer 4, an electron injection layer 5, and a cathode electrode 6.

When a driving voltage is applied to the anode electrode 2 and the cathode electrode 6, holes in the hole injection layer 3 and electrons in the electron injection layer 5 proceed toward the light emitting layer 33 to excite the light emitting layer 4. Causes the light emitting layer 4 to emit visible light. Thus, an image or an image is displayed by the visible light generated from the light emitting layer 4.

2 shows an organic electroluminescent display including a driving circuit. 3 is an equivalent circuit diagram of a voltage driven pixel of an organic light emitting display device, and FIG. 4 is a driving waveform of the organic light emitting display device.

2 to 4, in the organic electroluminescent display, m x lines in which m data lines DL1 to DLm and n gate lines GL1 to GLn are formed and arranged in a matrix type at intersections thereof are formed. a display panel 20 in which n pixels are formed, a data driver 22 for converting digital video data into an analog gamma voltage and supplying the gamma voltage to the data lines DL1 to DLm as a pixel data voltage, and a gate; A gate driver 23 for sequentially supplying scan pulses to the lines GL1 to GLn, and a timing controller 21 for controlling the data driver 22 and the gate driver 23.

Each pixel formed in the display panel 20 includes a switch TFT (SW_TFT), a driving TFT (DRV_TFT), and a storage capacitor Cst. The switch TFT (SW_TFT) and the driving TFT (DRV_TFT) are implemented with a P type MOS-FET.

The switch TFT SW_TFT is turned on in response to the scan voltages from the gate lines GL1 to GLn to conduct current paths between its source and drain terminals, and the voltages on the gate lines GL1 to GLn are self-contained. When the threshold voltage (Threshold Voltage: Vth) is less than to maintain the off state. In the on-time period of the switch TFT SW_TFT, the data voltage VDL from the data lines DL is applied to the gate terminal of the driving TFT DRV_TFT via the source terminal and the drain terminal of the switch TFT SW_TFT. . On the contrary, in the off time period of the switch TFT SW_TFT, the current path between the source terminal and the drain terminal of the switch TFT SW_TFT is opened so that the data voltage VDL is not applied to the driving TFT DRV_TFT.

The driving TFT DRV_TFT adjusts the amount of current between the source terminal and the drain terminal according to the data voltage supplied to its gate terminal to emit the organic light emitting diode OLED with brightness corresponding to the data voltage.

The storage capacitor Cst stores the difference voltage between the data voltage and the high potential driving voltage VDD to maintain a constant voltage applied to the gate terminal of the driving TFT DRV_TFT for one frame period.

The organic light emitting diode OLED includes an anode terminal connected to the drain terminal of the driving TFT DRV_TFT and a cathode terminal supplied with the low potential driving voltage VSS. The organic light emitting diode element OLED emits light by the current from the driving TFT DRV_TFT. The organic light emitting diode device OLEED is illustrated in FIG. 1.

The data driver 22 converts the digital video data RGB into an analog gamma compensation voltage in response to the control signal DDC from the timing controller 21. To this end, the data driver 22 is supplied with gamma reference voltages VH and VL as reference voltages for generating analog gamma voltages. The gamma reference voltages VH and VL include a high potential gamma reference voltage VH and a low potential gamma reference voltage VL, and each gray level analog to be expressed by a voltage divider circuit not shown in the data driver 22. It is divided by gamma voltage. The data driver 22 selects each analog gamma voltage divided by the gamma reference voltages VH and VL according to the digital video data. The data driver 22 supplies the analog gamma voltage selected according to the digital video data to the data lines DL1 to DLm as the pixel data voltage.

The gate driver 23 generates a scan pulse SC synchronized with data in response to the control signal GDC from the timing controller 21, and sequentially sequentially scans the scan pulse SC to the gate lines GL1 to GLn. Selects a horizontal line of the display panel 20 to which a data signal is supplied.

The timing controller 21 supplies digital video data RGB to the data driver 22 and controls signals DDC, for controlling the gate driver 23 and the data driver 22 using the synchronization signal and the main clock. GDC, Ven_pre, V_gate).

However, in the conventional organic electroluminescent display, since gamma reference voltages VH and VL are fixed, it is difficult to optimize the gamma voltage differently depending on the color temperature characteristics or the display panel characteristics. In other words, in order to change the analog gamma voltage according to the color temperature characteristics or the display panel characteristics, the gamma reference voltage VHL must be different. However, in the conventional organic electroluminescent display, the gamma reference voltage VHL is fixed and the analog gamma voltage is fixed. Cannot be changed as needed.

Accordingly, an object of the present invention is to provide an organic light emitting display device capable of correcting a gamma voltage as necessary.

In order to achieve the above object, the organic electroluminescent display device according to the present invention comprises a control unit for generating first and second selection signals; The high potential gamma reference is performed by dividing the first high potential source voltage and the first low potential source voltage by using a first voltage divider circuit including a plurality of voltage divider nodes, and controlling the output paths of the voltages divided in response to the first selection signal. A first reference voltage generator for generating a voltage; The low potential gamma reference is performed by dividing the second high potential source voltage and the second low potential source voltage using a second voltage divider circuit including a plurality of voltage divider nodes, and controlling the output paths of the voltages divided in response to the second selection signal. A second reference voltage generator which generates a voltage; And a gamma voltage generator configured to divide the high potential gamma reference voltage and the low potential gamma reference voltage to generate analog gamma voltages for each gray level.

Each of the first and second reference voltage generators includes a plurality of switch elements for switching the output path between the divided nodes and the output terminal of the reference voltage generator according to the bit of the selection signal.

The organic electroluminescent display includes a first resistor connected between an external first source voltage and the first high potential source voltage to adjust the first high potential source voltage; A second resistor connected between an external second source voltage and the first low potential source voltage to adjust the first low potential source voltage; A third resistor connected between an external third source voltage and the second high potential source voltage to adjust the second high potential source voltage; And a fourth resistor connected between an external fourth source voltage and the second low potential source voltage to adjust the second low potential source voltage.

The organic electroluminescent display includes a display panel in which a plurality of data lines and a plurality of gate lines intersect and a plurality of pixels are formed; A data driver converting digital video data into analog gray level gamma voltages to generate pixel data voltages and supply the pixel data voltages to the data lines; A gate driver may be further configured to sequentially supply scan pulses to the gate lines.

Each of the pixels includes an organic light emitting diode device; A switch TFT that is turned on in response to a scan voltage from the gate line to conduct a current path between its source and drain terminals; A source terminal connected to a driving voltage source, a drain terminal connected to the organic light emitting diode element, and a gate terminal connected to the switch TFT, respectively, for controlling a current supplied to the organic light emitting diode element in response to a voltage from the switch thin film transistor A thin film TFT; And a storage capacitor connected between the gate terminal of the driving thin film TFT and the driving voltage source.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 7.

5 illustrates a data driver 50 in an organic electroluminescent display according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the data driver 50 of the organic electroluminescent display according to the exemplary embodiment of the present invention may include a shift register 54, a latch 55, and a digital-to-analog converter (hereinafter, referred to as “DAC”). 53, first and second reference voltage generators 51A and 51B, and gamma voltage generator 52. Since the display panel and the gate driver of the organic electroluminescent display are substantially the same as those shown in FIG. 2, a detailed description thereof will be omitted.

The shift register 54 sequentially shifts the digital video data RGB supplied from the timing controller 56 and simultaneously outputs one line of data under the control of the timing controller 56.

The latch 54 latches the digital video data RGB supplied from the shift register 54 and then supplies the latched digital video data RGB to the DAC 53 under the control of the timing controller 56.

The DAC 53 converts the gray level of the digital video data from the latch 55 into an analog gamma voltage from the gamma voltage generator 52 and passes through the data lines DL1 to DLm through an output buffer (not shown) as the pixel data voltage. Supplies).

The first reference voltage generator 51A uses a first high potential voltage VH1 and a first low potential voltage VL1 supplied from the outside to control the high potential gamma, which is variable in voltage by the timing controller 56. Generate the reference voltage MVH. The first high potential voltage VH1 and the first low potential voltage VL1 are pull-up connected between the first and second voltage supply terminals P1 and P2 and the high potential / low potential source voltages Vdd and Vss. The voltage is adjusted according to the resistance values of the resistor R1 and the pulldown resistor R2.

The second reference voltage generator 51B uses the second high potential voltage VH2 and the second low potential voltage VL2 supplied from the outside to control the low potential gamma of which the voltage is variable by the control of the timing controller 56. Generate the reference voltage MVL. The second high potential voltage VH2 and the second low potential voltage VL2 are pull-ups connected between the third and fourth voltage supply terminals P3 and P4 and the high potential / low potential source voltages Vdd and Vss. The voltage is adjusted according to the resistance values of the resistor R3 and the pulldown resistor R4.

When the gamma voltage is required to be adjusted according to the color temperature characteristics or the display panel characteristics, the present invention adjusts the resistance values of the resistors R1 and R2 connected to the voltage supply terminals P1 to P4 of the data driver 50. The high potential voltages VH1 and VH2 and the low potential voltages VL1 and VL2 are adjusted. When the high potential voltages VH1 and VH2 and the first low potential voltages VL1 and VL2 are adjusted, the high potential / low potential gamma reference voltages MVH and MVL generated by the voltages are supplied to the DAC 53. The gray level analog gamma reference voltage is adjusted.

The gamma voltage generator 52 divides the high potential reference voltage MVH from the first reference voltage generator 51A and the high potential reference voltage MVL from the second reference voltage generator 51B into a voltage divider circuit. Thus, gray level analog gamma voltages having different voltage levels as determined by the number of bits of the digital video data are generated, and the gray level analog gamma voltages are supplied to the DAC 53.

The timing controller 56 generates control signals DDC and GDC for controlling the data driver 50 and the gate driver 23, as well as a gamma selection signal for controlling the gamma reference voltages MVH and MVL. (SH, SL) is generated. The gamma selection signals SH and SL are n bits to control the voltage levels of each of the high potential gamma reference voltage MVH and the low potential gamma reference voltage MVH between n (where n is an integer of 2 or more). It includes.

The data driver 50 is integrated with the timing controller 56 in one chip.

6 and 7 show examples of the first and second reference voltage generators 51A and 51B controlled by the 4-bit select signals SH and SL.

6 and 7, each of the first and second reference voltage generators 51A and 51B is connected in series between the high potential voltages VH1 and VL1 and the low potential voltages VL1 and VL2. Resistors RH1 to RH5, RL1 to RL5, and a plurality of switch elements S1 to S8 connected to the divided node between the resistors. Each of the switch elements S1 to S8 may be implemented as an N type or a P type MOS-FET.

Each of the switches S1 to S8 is turned on / off in response to each bit SHb1 to SHb4 and SLb1 to SLb4 of the selection signals SH and SL to connect the selected divided node to the output terminal. Accordingly, the switches S1 to S8 serve to adjust the high potential / low potential gamma reference voltages MVH and MVL according to the selection signals SH and SL. For example, when the first selection signal SH is "1010", the first and third switch elements S1 and S3 are turned on to select the divided voltages selected through the first and third switch elements S1 and S3. The sum voltage from the nodes is selected as the high potential gamma reference voltage MVH. In addition, when the first selection signal SH is "0001", the fourth switch element S4 is turned on so that the voltage from the divided node selected through the fourth switch element S4 becomes the high potential gamma reference voltage MVH. ) Is selected.

On the other hand, although the gamma voltage adjusting device according to the present invention has been described with reference to the organic electroluminescent display in the embodiment, it is applicable to any flat panel display device, for example, a liquid crystal display device, in which the gamma voltage is used.

As described above, the organic electroluminescent display device according to the present invention adjusts the high potential / low potential voltage by adjusting the resistance value of the resistors connected between the high potential / low potential source voltage and the reference voltage generator, and the high potential By dividing the low potential voltage, the high potential low potential gamma reference voltage is adjusted to a selection signal including a plurality of bits so that the gamma reference voltage can be optimally adjusted according to color temperature characteristics or panel characteristics.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (5)

A controller for generating first and second selection signals; The high potential gamma reference is performed by dividing the first high potential source voltage and the first low potential source voltage by using a first voltage divider circuit including a plurality of voltage divider nodes, and controlling the output paths of the voltages divided in response to the first selection signal. A first reference voltage generator for generating a voltage; The low potential gamma reference is performed by dividing the second high potential source voltage and the second low potential source voltage using a second voltage divider circuit including a plurality of voltage divider nodes, and controlling the output paths of the voltages divided in response to the second selection signal. A second reference voltage generator which generates a voltage; And a gamma voltage generator for generating analog gamma voltages for each gray level by dividing the high potential gamma reference voltage and the low potential gamma reference voltage. The method of claim 1, Each of the first and second reference voltage generators, And a plurality of switch elements for switching the output path between the divided nodes and an output terminal of the reference voltage generator according to the bit of the selection signal. The method of claim 1, A first resistor connected between an external first source voltage and the first high potential source voltage to adjust the first high potential source voltage; A second resistor connected between an external second source voltage and the first low potential source voltage to adjust the first low potential source voltage; A third resistor connected between an external third source voltage and the second high potential source voltage to adjust the second high potential source voltage; And a fourth resistor connected between an external fourth source voltage and the second low potential source voltage to adjust the second low potential source voltage. The method of claim 1, A display panel in which a plurality of data lines and a plurality of gate lines cross each other and a plurality of pixels are formed; A data driver converting digital video data into analog gray level gamma voltages to generate pixel data voltages and supply the pixel data voltages to the data lines; And a gate driver for sequentially supplying scan pulses to the gate lines. The method of claim 4, wherein Each of the pixels, An organic light emitting diode device; A switch thin film transistor which is turned on in response to a scan voltage from the gate line to conduct a current path between its source terminal and the drain terminal; A source terminal connected to a driving voltage source, a drain terminal connected to the organic light emitting diode device, and a gate terminal connected to the switch thin film transistor, respectively, to control a current supplied to the organic light emitting diode device in response to a voltage from the switch thin film transistor. A driving thin film transistor; And a storage capacitor connected between the gate terminal of the driving thin film transistor and the driving voltage source.

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