KR100612820B1 - Unipolar and bipolar pulse generator - Google Patents

Abstract

TECHNICAL FIELD The present invention relates to a pulse generator, and in particular, by adding a logic unit including a simple change switch to the hardware structure of a conventional bi-polar pulse generator, selectively bi-polar or uni-polar (uni) It relates to a monopolar and bipolar pulse generator capable of generating a pulse signal of -polar).

A constituent means for forming a monopole and bipolar pulse generator of the present invention includes a drive signal pattern generator for generating four different predetermined pulses having a delay time from each other, and a pulse signal generated by the drive signal pattern generator. And a pulse signal output unit for outputting a pulse signal of a single pole or a positive pole using four pulses output from the logic unit as an input signal.

Unipolar, Bipolar, Pulse, Generator

Description

Unipolar and Bipolar Pulse Generators {unipolar and bipolar pulse generator}

1 is a hardware structural diagram of a conventional pulse generator for generating a monopole pulse.

FIG. 2 is a timing diagram of a drive signal and an output signal of the pulse generator shown in FIG. 1.

3 is a hardware structural diagram of a conventional pulse generator for generating a bipolar pulse.

4 is a timing diagram of a drive signal and an output signal of the pulse generator illustrated in FIG. 3.

Fig. 5 is a block diagram of a pulse generator for a single pole and a positive pole according to the present invention.

6 is a timing diagram of a pulse signal generated by a drive signal pattern generator that is a component of the present invention.

7 is a configuration diagram of a logic unit that is a component of the present invention.

8 is a timing diagram of a pulse signal output by the logic unit of FIG. 7.

9 is a configuration diagram of a pulse signal output unit that is a component of the present invention.

Explanation of symbols on the main parts of the drawings

100: drive signal pattern generator 200: logic unit

210: first end gate 220: second end gate

230: third endgate 240: fourth endgate

250: changeover switch 260: transistor

300: pulse signal output unit 310, 330, 350, 370: MOSFET

320, 340, 360, 380: Diode 390: DC voltage source

TECHNICAL FIELD The present invention relates to a pulse generator, and in particular, by adding a logic unit including a simple change switch to the hardware structure of a conventional bi-polar pulse generator, selectively bi-polar or uni-polar (uni) It relates to a monopolar and bipolar pulse generator capable of generating a pulse signal of -polar).

Conventional pulse generators have been used separately from a monopolar pulse generator for generating a pulse of a single pole and a bipolar pulse generator for generating a pulse of a positive pole. That is, the unipolar pulse generator and the bipolar pulse generator are used separately by the respective hardware and driving signals.

1 is a hardware structure of a conventional pulse generator for generating a monopole pulse, and FIG. 2 is a timing diagram of a drive signal and an output signal of the pulse generator shown in FIG.

As shown in FIG. 1, the conventional pulse generator 10 for generating a single-pole pulse is composed of two switch sections S1 and S2, and each of the switch sections S1 and S2 includes a MOSFET transistor 11, 15) and diodes 13 and 17, and are powered by the DC voltage source 19. In this case, the output pulse signal of the single pole is the voltage V _AB between A and B shown in FIG. 1.

The driving signal input to the gate terminal of the MOSFET transistor 11 of the first switch unit S1 of the switch units S1 and S2 is in the form of a pulse S1 _IN drawn on the uppermost side in FIG. 2, and the second switch unit. The driving signal input to the gate terminal of the MOSFET transistor 15 of S2 is in the form of a pulse S2 _IN drawn in the center of FIG. 2.

When the pulse signal of the above type is applied to the switch sections S1 and S2, when the S1 switch section is in the ON state and the S2 switch section is in the OFF state, the output voltage V _AB is a direct current. voltage of the voltage source (19) appears as a voltage (V _DC), S1 switch portion off (oFF) when they become on (oN) in a state added on S2 switch, and the output voltage (V _AB) is a DC voltage source (19) of ( V _DC ) does not appear and becomes "0".

That is, when the S1 switch is in the ON state and the S2 switch is in the OFF state, the S1 switch is turned on, the S2 switch is in the open state, and the output voltage V _AB is a DC voltage source. When the voltage (V _DC ) of (19) is displayed, and the S1 switch part is in the OFF state and the S2 switch part is in the ON state, the S1 switch is in the open state, and the S2 switch is turned off. In this state, the output voltage V _AB does not appear as the voltage V _DC of the DC voltage source 19 and becomes "0".

3 is a hardware structure of a conventional pulse generator for generating a positive pulse, and FIG. 4 is a timing diagram of a drive signal and an output signal of the pulse generator shown in FIG.

As shown in FIG. 3, a conventional pulse generator 20 for generating a bipolar pulse is composed of four switch units S1, S2, S3, S4, and each of the switch units S1, S2, S3, S4 is composed of MOSFET transistors 21, 23, 25, 27 and diodes 22, 24, 26, 28, and is powered by the DC voltage source 29. In this case, the output pulse signal of the positive pole is the voltage V _AB between A and B shown in FIG. 3.

The driving signal input to the gate terminal of the MOSFET transistor 21 of the first switch unit S1 among the switch units S1, S2, S3, and S4 is in the form of a pulse S1 _IN drawn on the uppermost side in FIG. 4, The driving signal input to the gate terminal of the MOSFET transistor 23 of the second switch unit S2 is in the form of the pulse S2 _IN shown in FIG. 4, and the MOSFET transistor 25 of the third switch unit S3 is formed. The driving signal input to the gate terminal is in the form of the pulse S3 _IN drawn in the third in FIG. 4, and the driving signal input to the gate terminal of the MOSFET transistor 27 of the fourth switch unit S4 is the lowest in FIG. 4. It is in the form of a pulse (S4 _IN ).

When the pulse signal of the above type is applied to the switch parts S1, S2, S3, and S4, when only the S2 switch and the S3 switch part are in the ON state, the output voltage V _AB is a DC voltage source. When the voltage (+ V _DC ) of 29 is expressed and only the S1 switch portion and the S4 switch portion are in the ON state, the output voltage V _AB is equal to the voltage V _DC of the DC voltage source 29. The inverted voltage (-V _DC ) is shown, and the rest of the output voltage (V _AB ) is shown as "0".

That is, when only the S2 switch portion and the S3 switch portion are in the ON state, only the DC voltage source 29 and the two diodes 22 and 28 are connected in parallel to each other, and the point "A" and the "B""The voltage V _AB applied between the points becomes equal to the voltage V _DC of the DC voltage source 29. When only the S1 switch and the S4 switch are in the ON state, the voltage V _AB between the DC voltage source 29 the diodes 24 and 26 only becomes connected in parallel with each other, "a" point, and the voltage (V _AB) applied between the "B" point is the voltage (V _DC) of a DC voltage source 29 is reverse voltage ( -V _DC ).

According to the conventional pulse generator described above, in order to generate a pulse of a single pole, a pulse generator of a single pole must be used, and a pulse generator of a positive pole must be used in order to generate a pulse of a positive pole. There was a problem that single-pole (positive) pulses cannot be generated by using the hardware of the pulse generator as it is.

As a result, it is urgently needed in the present situation to be able to generate monopole pulses and bipolar pulses under one hardware structure.

The present invention was devised to solve the above problems of the prior art, and by adding a logic unit including a change switch to the pulse generator of the conventional anode, it is possible to easily generate not only the anode but also the pulse of a single pole in one hardware structure. It is an object of the present invention to provide a single-pole and a bipolar pulse generator.

In order to solve the above technical problem, the constituent means of the present invention, which is a monopole and bipolar pulse generator, generates four different predetermined pulses having a delay time in the monopole and bipolar pulse generator. A driving signal pattern generation unit, a logic unit outputting each pulse generated by the driving signal pattern generation unit as it is, or outputting a modified signal, and four pulses output from the logic unit as input signals. And a pulse signal output unit for outputting a pulse signal.

The logic unit may further include four AND gates configured to input four pulses generated by the driving signal pattern generator, and a switch for switching a connection between an input terminal of the first AND gate and ground among the four AND gates. A gate terminal is connected through a switch, an input terminal of the first end gate, and a resistor, an emitter terminal is connected to an output terminal of a second one of the four end gates, and a collector terminal is a third of the four end gates. And a transistor connected to one input terminal of the AND gate.

The output terminal of the third AND gate may be configured to output a signal by a logical product of a pulse input to one terminal connected to the collector terminal of the transistor and a pulse input from the driving signal pattern generator.

In addition, the pulse signal output unit, the four pulses output from the logic unit as the input signal, the conducting or open (four) switch, a pair connected in series is connected in parallel with the other pair and the switch, the switch Characterized in that it comprises a DC voltage source for supplying power to the unit.

The first switch unit of the four switch units may be connected to the output terminal of the first end gate, and the second switch unit connected in series with the first switch unit may be connected to the output terminal of the second end gate. The third switch unit connected in parallel with the first and second switch units is connected to the output terminal of the third end gate, and the fourth switch unit connected in series with the third switch unit is connected to the output terminal of the fourth end gate. It is characterized by.

Each of the four switch units may include a MOSFET transistor having a gate terminal connected to the four AND gate output terminals, and a diode connected in parallel with each of the MOSFET transistors.

The voltage applied between the connection point of the third and fourth switch units and the connection point of the first and second switch units may be output as a single pole or a bipolar pulse.

Hereinafter, with reference to the accompanying drawings will be described in detail the operation and the preferred embodiment of the pulse generator of the present invention consisting of a single pole and a positive pole consisting of the above configuration means.

Fig. 5 is a block diagram of a pulse generator for a single pole and a positive pole according to the present invention.

As shown in FIG. 5, the pulse generator 400 of the present invention, which is a single pole and a positive pole, includes a drive signal pattern generator 100 generating a predetermined pulse in a predetermined pattern, and the drive signal pattern generator 100. A logic unit 200 for outputting the generated pulse as it is or applying a modification, and a pulse signal output unit for outputting the pulse signal output from the logic unit 200 as a monopole or bipolar pulse signal It consists of 300.

The driving signal pattern generator 100 generates and outputs pulse signals S1 _IN , S2 _IN , S3 _IN , and S4 _IN of four different waveforms, as shown in FIG. 6. The four pulse signals are generated and output with a delay time from each other.

Four pulse signals S1 _IN , S2 _IN , S3 _IN , and S4 _IN generated from the driving signal pattern generator 100 are transferred to the logic unit 200 illustrated in FIG. 7 to operate as input signals.

As shown in FIG. 7, the logic unit 200 includes four end gates (first end 210, second end gate 220, third end gate 230, and fourth end gate 240). ), And a change switch 250 for switching a connection between an input terminal of the first end gate 210 and a ground, and an emitter terminal respectively at the second end gate 220 and the third end gate 230. And a transistor 260 to which the collector terminal is connected.

The two input terminals of the first AND gate 210 are tied to a common line to receive an S1 _IN pulse signal among four pulse signals generated by the driving signal pattern generator 100, and the first AND gate ( The output terminal of 210 outputs an output signal S1 ' _{IN obtained} by performing a logical AND operation on the signals of two input terminals.

Meanwhile, the common line which bundles the input terminals of the first end gate 210 is connected to the change switch 250. The changeover switch 250 controls the connection between the input terminal of the first end gate 210 and the ground by operating from the outside. As will be described later, when the change switch 250 is OFF, four pulse signals S1 _IN , S2 _IN , S3 _IN , and S4 _IN input to the four AND gates 210, 220, 230, and 240. ) Are output as output signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN to the output terminals of the four AND gates 210, 220, 230, and 240 as they are.

The two input terminals of the second AND gate 220 are bundled with a common line to receive an S2 _IN pulse signal among four pulse signals generated by the driving signal pattern generator 100, and the second AND gate ( The output terminal 220 outputs an output signal S2 ' _{IN obtained} by performing a logical AND operation on the signals of the two input terminals.

One of the two input terminals of the third AND gate 230 receives an S3 _IN pulse signal among the four pulse signals generated by the driving signal pattern generator 100, and the other input terminal is the transistor 260. It is connected to the collector terminal of. The output terminal of the third AND gate 230 outputs an output signal S3 ' _{IN obtained} by performing a logical AND operation on the signals of the two input terminals.

The emitter terminal of the transistor 260, in which the collector terminal is connected to one of the input terminals of the third and gate 230, is connected to the output terminal of the second and gate 220, and the gate terminal is connected to a resistor ( It is connected to the input terminal of the first end gate 210 through R).

In the transistor 260, the above-described change switch 250 is turned on so that an input terminal of the first end gate 210 is connected to a ground, and a gate terminal is connected to the first end gate through a resistor R. When connected to an input of 210; As the transistor 260 conducts as described above, the third gate terminal 230 is a pulse signal S2 ′ _IN outputted to the output terminal of the second gate terminal 220 and the driving signal pattern generation unit ( The S3 _IN pulse signal is input by the input terminal among the four pulse signals generated in 100), and the output signal S3 ' _IN is output through the output terminal by performing an AND operation on the two signals.

On the other hand, when the change switch 250 is turned off, the transistor 260 is also turned off, so that the third end gate 230 is inputted from the driving signal pattern generator 100. Among the four generated pulse signals, the S3 _IN pulse signal is output as the output signal S3 ' _IN .

Finally, the two input terminals of the fourth end gate 240 are tied to a common line to receive the S4 _IN pulse signal among the four pulse signals generated by the driving signal pattern generator 100, and the fourth end The output terminal of the gate 240 outputs the output signal S4 ' _{IN obtained} by performing a logical AND operation on the signals of the two input terminals.

In summary, the operation of the logic unit 200 described above, the four AND gates (210, 220, 230, 240) are four pulse signals (S1 _IN , S2 _IN , ...) generated by the drive signal pattern generator 100 S3 _IN , S4 _IN ) is input as an input signal.

However, only the third end gate 230 of the four end gates 210, 220, 230, and 240 separates two input terminals and receives another input signal. That is, the first, second, and fourth end gates 210, 220, and 240 have two input terminals tied to a common line, but the input terminals of the third end gate 230 are separated into two, and these two The result of logical multiplication on the input signal coming through the input terminal of is output to the output terminal.

The overall operation of the logic unit 200 having the above structure depends on whether the change switch 250 is switched. That is, as the change switch 250 is turned on or off, the output signals S1 ' _IN , S2' _IN , S3 ' _IN , and the four AND gates 210, 220, 230, and 240 are used. S4 ' _IN ) is different.

When the change switch 250 is OFF, since the input terminal of the first AND gate 210 is not connected to the ground, and the transistor 260 is not electrically connected, FIG. As shown in FIG. 4, the four AND gates 210, 220, 230, and 240 may output the input pulse signals S1 _IN , S2 _IN , S3 _IN , and S4 _IN as output signals S1 ' _IN and S2' _IN. , S3 ' _IN , S4' _IN ).

Meanwhile, since an “0” signal is input through a terminal connected to the collector terminal of the transistor 260 among the input terminals of the third and gate 230, an output signal of the third and gate 230 is output. (S3 _'iN) is also an input pulse signal (S3 _iN) as an output signal (S3' and outputs it to the _iN).

As will be described later, in this case, the pulse signal of the anode is finally output by the pulse signal output unit 300 to be described later.

Next, when the change switch 250 is turned on, since the input terminal of the first end gate 210 and the ground are connected, the output is output through the output terminal of the first end gate 210. The signal S1 ' _IN becomes "0" as shown in Fig. 8B.

The second AND gate 220 and the fourth AND gate 240 respectively output the pulse signals S2 _IN and S4 _IN input through the input terminal through the output terminals S2 ' _IN and S4' _IN. Output as That is, the second and fourth end gates 220 and 240 always operate constantly regardless of whether the change switch 250 is operated. Output signals S2 ' _IN and S4' _IN shown in FIG. 8B Is the input signal S2 _IN shown in FIG. It can be seen that the same as and S4 _IN .

On the other hand, when the change switch 250 is turned on (ON), since the transistor 260 is turned on, the third end gate 230 is a pulse signal transmitted from the driving signal pattern generator 100 ( S3 _IN and an output signal S2 ' _IN of the second AND gate 220 input through the collector terminal of the transistor 260. = S2 _IN ) and the result of the logical AND operation to the output signal (S3 ' _IN ). The output signal S3 ' _IN of the third AND gate 230 is a pulse signal obtained by performing an AND operation on the input signals S2 _IN and S3 _IN of FIG. 6, as shown in FIG. 8B. Able to know.

As will be described later, in this case, the pulse signal of the single pole is finally output by the pulse signal output unit 300 to be described later.

A pulse signal for finally outputting a pulse signal of a single pole or a positive pole using four pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN output from the logic unit 200 described above as an input signal. The configuration of the output unit 300 is shown in FIG.

As shown in FIG. 9, the pulse signal output unit 300 receives four pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN output from the logic unit 200. Four switch portions (first switch portion S1 ', second switch portion S2', third switch portion S3 ', fourth switch portion S4') that are turned on or open; And a DC voltage source (V _DC ) 390 for supplying power to the switch units S1 ', S2', S3 ', and S4'.

The four switch units S1 ', S2', S3 ', and S4' are connected in series by two pairs, and are connected in parallel with other pairs. That is, the first switch part S1 'and the second switch part S2' are connected in series, and the third switch part S3 'and the fourth switch part S4' are connected in series. And the serially connected pairs are connected in parallel with each other.

As described above, the first switch S1 ′ of the switch units S1 ′, S2 ′, S3 ′, and S4 ′ connected to each other may be connected to an output terminal of the first end gate 210 included in the logic unit 200. The second switch unit S2 'connected to the first switch unit S1' in series is connected to an output terminal of the second end gate 220 included in the logic unit 200. The third switch unit S3 ′ connected in parallel with the first and second switch units S1 ′ and S2 ′ may be connected to an output terminal of the third end gate 230 included in the logic unit 200. The fourth switch unit S4 ′ connected to the third switch unit S3 ′ in series is connected to an output terminal of the fourth end gate 240 included in the logic unit 200.

Accordingly, the S1 ' _IN pulse signal output from the logic unit 200 is input to the first switch unit, the S2' _IN pulse signal is input to the second switch unit, and the S3 ' _IN pulse signal is input to the third switch unit. Input, S4 ' _IN The pulse signal is input to the fourth switch unit.

Each of the switch units may include MOSFET transistors 310, 330, 350, and 370 having gate terminals connected to output terminals of four end gates 210, 220, 230, and 240 included in the logic unit 200, respectively. And the diodes 320, 340, 360, and 380 connected in parallel with the respective MOSFET transistors 310, 330, 350, and 370.

A process of finally generating a monopole or bipolar pulse signal by the pulse signal output unit 300 having the above configuration will be described below.

First, when the change switch 250 included in the above-described logic unit 200 is turned off, the four end gates 210, 220, 230, and 240 are included in the logic unit 200. The output pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN are as shown in FIG. 8A. When the pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN are applied to the switch units S1 ', S2', S3 ', and S4', respectively, the pulse signal output unit ( 300 finally outputs the pulse signal of the anode.

The pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN are applied to the switch units S1 ', S2', S3 ', and S4', respectively, so that the S2 'switch and the S3' switch unit are applied. When only the ON state is in the ON state, the output voltage V _AB is represented by the voltage of the DC voltage source 390 (+ V _DC ), and only the S1 'switch portion and the S4' switch portion are in the ON state. If so, the output voltage (V _AB) appears as a voltage (V _DC) of a DC voltage source 390 is reverse voltage (-V _DC), the output voltage (V _AB) of the other case is shown as "0".

That is, when only the S2 'switch unit and the S3' switch unit are in an ON state, only the DC voltage source 390 and the two diodes 320 and 380 are connected to each other in parallel, and the "A" point and The voltage V _AB applied between the points "B" becomes equal to the voltage V _DC of the DC voltage source 390. When only the S1 'switch and the S4' switch are in the ON state, the DC voltage source ( 390) and two diodes (340, 360) only been connected in parallel with each other, "a" point, and the voltage (V _DC voltage (V _AB) applied between the "B" point is a DC voltage source 390) the It is the inverted voltage (-V _DC ). As a result, the voltage V _AB applied between the point "A" (connection point of the third and fourth switch parts) and point "B" (connection point of the first and second switch parts) is shown in FIG. As shown, these appear as bipolar pulses.

Next, when the change switch 250 included in the above-described logic unit 200 is turned on, the four end gates 210, 220, 230, and 240 output terminals included in the logic unit 200 are provided. The pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , and S4' _IN output through are as described above with reference to FIG. 8B. When the pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN are applied to the switch units S1 ', S2', S3 ', and S4', respectively, the pulse signal output unit ( 300 finally outputs a unipolar pulse signal.

The pulse signals S1 ' _IN , S2' _IN , S3 ' _IN , S4' _IN are applied to the switch units S1 ', S2', S3 ', and S4', respectively, so that the S2 'switch and the S3' switch unit are applied. When only the ON state is in the ON state, the output voltage V _AB is represented by the voltage (+ V _DC ) of the _DC voltage source 390, and the output voltage V _{AB in the} other cases is represented by “0”.

That is, when only the S2 'switch unit and the S3' switch unit are in an ON state, only the DC voltage source 390 and the two diodes 320 and 380 are connected to each other in parallel, and the "A" point and The voltage V _AB applied between the points “B” becomes equal to the voltage V _DC of the DC voltage source 390, and in all cases, the voltage V applied between the points “A” and “B” in any other case. _AB ) is always "0".

As a result, the voltage V _AB applied between the point "A" (connection point of the third and fourth switch parts) and the point "B" (connection point of the first and second switch parts) is shown in FIG. As shown, it is represented by a monopole pulse.

In such a case, since the pulse input to the first switch portion is "0", the first switch portion is always in an open state.

According to the unipolar and bipolar pulse generator of the present invention having the above-described configuration and operation and preferred embodiments, since the unipolar pulse can be generated using most of the hardware structure of the pulse generator of the bipolar, it is not necessary to generate a unipolar pulse. The advantage is that a single-pole pulse generator with no hardware is required. Therefore, there is an effect that the overall cost for generating a pulse of monopolar or bipolar is reduced.

In addition, when it is used to generate a bipolar pulse and needs to generate a monopolar pulse, it is convenient for use because it can generate a monopolar pulse by simply operating a simple change switch without replacing it with a separate monopolar pulse generator. Has the effect of providing.

Claims (5)

In the pulse generator for both monopolar and bipolar, A driving signal pattern generator for generating four different predetermined pulses having a delay time from each other; A logic unit for outputting each pulse generated by the driving signal pattern generator as it is or by applying a modification; And a pulse signal output unit configured to output a pulse signal of a single pole or a positive pole using the four pulses output from the logic unit as an input signal. The method of claim 1, wherein the logic unit, Four AND gates for inputting four pulses generated by the driving signal pattern generator, a change switch for switching a connection between an input terminal of a first AND gate and ground among the four AND gates, and the first switch; A gate terminal is connected through an input terminal and a resistance of an AND gate, and an emitter terminal is connected to an output terminal of a second AND gate of the four AND gates, and a collector terminal is an input terminal of one of the third AND gates of the four AND gates. A monopole and bipolar pulse generator comprising a transistor connected to. The method according to claim 2, The output terminal of the third end gate is a single pole and a positive pole, characterized in that the output signal by the logical product of the pulse input to one terminal connected to the collector terminal of the transistor and the pulse input from the driving signal pattern generator Combined pulse generator. The method of claim 3, wherein the pulse signal output unit, Four pulses outputted from the logic unit as the input signal, conducting or opening (open), four pairs connected in series with the other pair in parallel, DC voltage source for supplying power to the switch unit Unipolar and bipolar pulse generator, characterized in that consisting of. The method according to claim 4, A first switch unit of the four switch units is connected to an output terminal of the first end gate, and a second switch unit connected in series with the first switch unit is connected to an output terminal of the second end gate. The third switch unit connected in parallel with the second switch unit is connected to the output terminal of the third end gate, and the fourth switch unit connected in series with the third switch unit is connected to the output terminal of the fourth end gate. Single and dual pulse generators.

Images