KR100521324B1 - Computer system with key lock function - Google Patents

Abstract

The computer system of the present invention includes a key lock switch in the computer main body to prevent unauthorized use of the computer, and uses the XD bus pin 7 of the I / O controller as the XD bus pin and the key lock signal detection pin. The user switches the keylock switch to enable / disable data input from the input device. When the keylock switch is turned on, the I / O controller prevents data from input devices from entering the computer. Therefore, unauthorized use of the computer can be prevented.

Description

COMPUTER SYSTEM WITH KEY LOCK FUNCTION}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system having a keylock function, and more particularly to a computer system provided with a key lock switch in a computer system to prevent unauthorized use of a computer.

The use of computer systems is becoming commonplace today, and the demand is exploding. In personal computers or computer systems shared among several people, there is a need for a device for restricting the use of certain programs or information from unauthorized users. In particular, computer systems used by government agencies and certain organizations need to limit the scope of users. There are a number of methods and devices used to prevent computer access from unauthorized users. An example of an access control method is a method of providing a password in computer software. However, this method has a disadvantage in that the user may lose the password or leak the password. Another method is to include a key lock switch in the computer main body to prevent data input from input devices by turning on the key lock switch.

1 is a diagram illustrating a conventional computer system.

As shown in the figure, the computer system includes a computer 10 and a monitor 10 connected thereto, for receiving and displaying display data provided from the computer main body 20, and an input associated with the computer main body 20. The device comprises a keyboard 30 and a mouse 40. In addition, although not shown in the drawings, the printer may further include a printer, a plotter, a joystick as a input device, a light pen, and the like as an additional output device.

FIG. 2 is a block diagram showing the circuit configuration of the computer system shown in FIG.

Referring to FIG. 2, the computer body 20 includes a central processing unit (CPU) 110, a cache memory 120, a system controller 130, a memory 140, and a PCI / ISA. The bridge 150, the video interface 160, the BIOS memory 170, and the I / O controller 180 are configured. The CD-ROM drive 24 is connected to the PCI / ISA bridge 150, and the keyboard 30 is connected to the I / O controller 180. The I / O controller 180 and a basic input / output system (BIOS) memory 170 transmit and receive data via an XD bus.

Conventionally, a keyboard controller for controlling data transmission between the computer body 20 and the keyboard 30 and a peripheral interface such as a pointing interface for performing an interface with a pointing device such as a mouse 40 may be used. The controllers were separated and configured inside a computer system. However, most computer systems today have a super input / output controller with on-chip keyboard controllers, pointing interfaces, and the like.

The keyboard controller (not shown) embedded in the I / O controller 180 has a key lock signal detecting pin KLOCK #, and is designed to perform a key lock function. However, the key lock signal detection pin (KLOCK #) is not separately configured in the I / O controller 180, and is designed as a single pin to selectively use the same function with pin 7 of the XD bus signal pin. It is.

In a conventional computer system, the pin is designed to be used only as an XD bus pin, not as a key lock signal sensing pin. Therefore, there is a problem in that the keyboard lock function cannot be performed in the conventional computer system.

Accordingly, it is an object of the present invention to provide a computer system having a keylock function by enabling the XD bus pin of an I / O controller to be used as a keylock sense pin.

According to a feature of the present invention for achieving the object of the present invention as described above, a computer system comprises: a BIOS memory; An I / O controller having a key lock control function; A bus for transferring data between the BIOS memory and the I / O controller; Key lock signal generating means for generating a key lock signal; Switch means connected between the key lock signal generating means and the I / O controller and turned on / off in response to a predetermined control signal; When the program stored in the BIOS memory sets the key lock allowance to the I / O controller, the control signal is generated so that the key lock signal from the key lock signal generating means is transferred to the I / O controller through the switch means and the bus. Switch control means for delivery.

Also, if a program stored in the BIOS memory does not set the key lock allowance to the I / O controller, the transmission of the key lock signal via the bus is not allowed.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 and 4.

The novel computer system of the present invention includes a key lock switch on the computer main body to prevent unauthorized use of the computer, and uses the XD bus pin 7 of the I / O controller as the XD bus pin and the key lock signal detection pin. . The user switches the keylock switch to enable / disable data input from the input device. If data transfer from the input device is disabled, the I / O controller prevents data from the input devices from entering the computer. Therefore, unauthorized use of the computer can be prevented.

3 is a diagram showing a computer system having a keylock function according to a preferred embodiment of the present invention.

As shown in the figure, the computer system of the present invention further comprises a key lock switch 26 in the computer system shown in FIG. The key lock switch 26 is set to an on / off (key lock on / off) state by the user. When the user turns on the power switch 24 of the computer, the key lock detection routine detects whether the key lock switch is turned on or off during the booting process of the computer system. When the keylock switch is turned on, that is, the keylock is set, the computer system stops booting and no longer operates. Thus, the computer becomes unusable. Normal booting is performed when the key lock switch 26 is turned off, that is, when the key lock is not set.

When the keylock switch is turned on while the computer is operating, data transmission between the input device and the computer is disabled. In the disabled state, even if data is input from input devices such as the keyboard 30 or the mouse 40, the computer system cannot recognize this. A more detailed description of the key lock function will be described with reference to FIG. 4.

FIG. 4 is a block diagram showing the circuit configuration of the computer system shown in FIG. In FIG. 4, the same reference numerals as those in FIG. 2 are denoted by the same components as those of the conventional components.

Referring to the drawings, the computer system of the present invention includes a central processing unit (CPU) 110, a cache memory 120, a system controller 130, and a memory 140. And a PCI / ISA bridge 150, a video interface 160, a BIOS memory 170, and an I / O controller 180, and further comprising a keylock signal generating means. The keyboard 30 and the mouse 40 are connected to the I / O controller 180.

The CPU 110 is connected to a host bus to perform a data processing function. In addition, the system controller 130 controls data transmission between the host bus and the PCI bus. The system controller 130 also controls access to the cache memory 120 and the memory 140. To the PCI bus is connected, for example, a predetermined video interface 160 which enables display of video data on the monitor 10. PCI / ISA bridge 150 controls the data transfer between the PCI bus and the ISA bus. In addition, the PCI / ISA bridge 150 controls data transmission between the hard disk drive 152 and the CD-ROM drive 24. The ISA bus is connected to an I / O controller 180 that controls the transfer of data between the computer system and the peripherals. The I / O controller 180 has a built-in keyboard controller (not shown) that controls data transfer between the keyboard 30 and the computer system. The I / O controller 180 is connected to a basic input / output system (BIOS) memory 170 by an XD bus.

The XD bus, which is a data transfer bus between the I / O controller 180 and the BIOS memory 170, is an 8-bit bus. The XD bus is used only when transferring a program stored in the BIOS memory 170 to the memory 140, and when upgrading a program of the BIOS memory 170. Accordingly, the eighth line of the XD bus may be used as the key lock signal transmission line in the state except for the case described above. The eighth pin (XD [7]) among the XD bus pins of the I / O controller 180 is set as the key lock signal sensing pin or the XD bus signal pin by the BIOS program.

The key lock signal generating means is composed of a key lock switch 26, an inverter IV1, a three-state buffer B1, and a pullup resistor R1. When the key lock switch 26 is turned off, a high level signal is input to the tri-state buffer B1 through a pull-up resistor, and when it is turned on, a low level signal is input to the tri-state buffer B1. do. The tri-state buffer B1 is turned on when a low level signal is output from the GPIO terminal of the PCI / ISA bridge and high is input through the inverter IV1. Output the signal.

When the user turns on the power switch 24 of the computer while the power is off, the XD bus pin 7 of the I / O controller 180 is set as the XD bus signal pin. The program stored in the BIOS memory 170 is transmitted to the I / O controller 180 through the XD bus and stored in the memory 140. When the transmission is completed, pin 7 of the XD bus is set as a key lock signal sensing pin, and a general purpose input output (GPIO) terminal of the PCI / ISA bridge 150 outputs a low level signal. The signal is converted to a high level by the inverter IV1 and output, thereby conducting the buffer B1. As the buffer B1 is turned on, the signal according to the on / off of the key lock switch 26 is input to the XD bus No. 7 pin (XD [7]) of the I / O controller 180 through the buffer B1. In the state in which the key lock switch 26 is turned off, a high level signal is input to the XD bus pin 7 of the I / O controller 180 through the pull-up resistor, and in the on state, a low level signal is input. The I / O controller 180 detects a level of a signal input to pin 7 of the XD bus and performs a key lock function.

When the I / O controller 180 detects an on state of the key lock switch, that is, a state in which the key lock is set, the booting of the computer system is stopped and no longer operates. Thus, the computer becomes unusable. Normal booting is performed when the key lock switch 26 is turned off, that is, when the key lock is not set.

If the keylock switch is turned on while the XD bus No. 7 pin (XD [7]) of the I / O controller 180 is set to the key lock signal detection pin, the I / O controller may be configured such as the keyboard 30 and the mouse 40. The data input from the input device is not transmitted to the CPU 110. Therefore, when the user is away for a while, turning on the key lock switch without turning off the power of the computer system can prevent others from using the computer.

When the program of the BIOS memory 170 needs to be upgraded, the XD bus No. 7 pin of the I / O controller 180 is set as the XD bus signal pin, and the GPIO terminal of the PCI / ISA bridge 150 is high. Outputs a level signal. The signal is converted to a low level at the inverter IV1 and output, thereby blocking the buffer B1. As a result, a signal according to the switching of the key lock switch 26 is not carried on the XD bus.

The buffer (B1) is a high or low level signal from the pull-up resistor to the pin when the XD bus pin 7 (XD [7]) of the I / O controller 180 is set to the bus signal pin Prevent input

According to the present invention as described above, the XD7 pin of the I / O controller can be used as the XD bus pin and the key lock detection pin. Thus, the computer system can prevent unauthorized use of the computer by performing the keylock function.

1 is a perspective view showing a conventional computer system;

FIG. 2 is a block diagram showing the circuit configuration of the computer system shown in FIG.

3 is a perspective view showing a computer system having a keylock function according to a preferred embodiment of the present invention; And,

FIG. 4 is a block diagram showing the circuit configuration of the computer system shown in FIG.

* Description of the symbols for the main parts of the drawings *

10: monitor 20, 100: computer body

22: power switch 24: CD-ROM drive

26: key lock switch 30: keyboard

40: mouse 110: CPU

120: cache memory 130: system controller

140: memory 150: PCI / ISA bridge

152: hard disk drive 160: video controller

170: BIOS 180: I / O controller

185: key lock signal generating means 190: ISA device

Claims (2)

In a computer system, BIOS memory; An I / O controller having a key lock control function; A bus for transferring data between the BIOS memory and the I / O controller; Key lock signal generating means for generating a key lock signal; Switch means connected between the key lock signal generating means and the I / O controller and turned on / off in response to a predetermined control signal; When a program stored in the BIOS memory sets key lock permission to the I / O controller, the control signal is generated so that the key lock signal from the key lock signal generating means is transferred to the I / O controller through the switch means and the bus. Computer control system comprising switch control means for delivery. The method of claim 1, Transfer of the keylock signal over the bus is not permitted unless a program stored in the BIOS memory has set a keylock permit on the I / O controller.