KR100508859B1 - A manufacturing method of semiconductor device - Google Patents
A manufacturing method of semiconductor device Download PDFInfo
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- KR100508859B1 KR100508859B1 KR10-2003-0006312A KR20030006312A KR100508859B1 KR 100508859 B1 KR100508859 B1 KR 100508859B1 KR 20030006312 A KR20030006312 A KR 20030006312A KR 100508859 B1 KR100508859 B1 KR 100508859B1
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- Prior art keywords
- metal thin
- thin film
- film
- oxide protective
- protective film
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000010408 film Substances 0.000 claims abstract description 66
- 239000010409 thin film Substances 0.000 claims abstract description 54
- 229910052751 metal Inorganic materials 0.000 claims abstract description 49
- 239000002184 metal Substances 0.000 claims abstract description 49
- 230000001681 protective effect Effects 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 150000004767 nitrides Chemical group 0.000 description 2
- 239000008358 core component Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
Abstract
본 발명은 공기에 노출된 금속박막을 보호하도록 하여 반사율이 저하되는 것을 방지할 수 있도록 기판 구조물 위에 절연막을 형성하고, 그 절연막 위에 증착된 금속박막의 표면에 산화보호막을 증착하여 반도체 소자를 형성한다.The present invention forms an insulating film on the substrate structure to protect the metal thin film exposed to the air to prevent the reflectance from falling, and deposits an oxide protective film on the surface of the metal thin film deposited on the insulating film to form a semiconductor device. .
Description
본 발명은 반도체 소자의 제조방법에 관한 것으로서, 더욱 상세하게는 빛을 반사하는 반사막을 가진 디스플레이 장치 등에 사용되는 반도체 소자의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device for use in a display device having a reflective film that reflects light.
최근들어 디스플레이장치들이 아날로그 방식에서 디지털 방식으로 전환되면서 디스플레이장치의 핵심부품으로 반도체 소자가 다수개 형성된 기판이 유용하게 사용되고 있다.Recently, as display apparatuses are switched from analog to digital, a substrate in which a plurality of semiconductor elements are formed as a core component of the display apparatus is being used.
상기한 기판을 제조하는 과정에서 디스플레이로 입사되는 빛을 반사시키는 박막을 형성하는 공정을 필수적으로 거치게 되며, 이때 화학 기상 증착 방법이나 스퍼터링 방법이 사용되고 있다.In the process of manufacturing the substrate, a process of forming a thin film that reflects light incident to a display is essentially required, and at this time, a chemical vapor deposition method or a sputtering method is used.
이러한 반도체 제조방법을 통해 제작되는 디스플레이 중에서 대표적인 것이 액정 표시 장치인데, 액정 표시 장치는 특정 광원인 백나이트(backlight)에 의해 발광된 빛을 액정 패널에 투과시켜 화상을 표시하는 투과형 모드와 자연광을 포함하는 외부광을 액정 패널의 화소 전극인 반사막에 반사시켜 화상을 표시하는 반사형 모드로 나눌 수 있다.Among the displays manufactured through the semiconductor manufacturing method, a representative liquid crystal display is a liquid crystal display, which includes a transmissive mode and natural light that transmits light emitted by a specific light source, a backlight, to the liquid crystal panel to display an image. The external light can be divided into a reflective mode in which an image is displayed by reflecting an external light onto a reflective film that is a pixel electrode of a liquid crystal panel.
이러한 액정 표시 장치에서 박막 트랜지스터가 형성되어 있는 기판을 박막 트랜지스터 기판이라고 하며, 이는 박막 트랜지스터에 신호를 전달하기 위한 배선, 화소 전압이 전달되는 화소 전극, 절연막을 패터닝하기 위한 사진 식각 공정 등을 통하여 제조된다.In the liquid crystal display, the substrate on which the thin film transistor is formed is called a thin film transistor substrate, which is manufactured through a wiring for transmitting a signal to the thin film transistor, a pixel electrode through which the pixel voltage is transmitted, and a photolithography process for patterning an insulating layer. do.
반사형 액정 표시 장치용 박막 트랜지스터 기판 제조 공정 중에는, 반사막의 반사 효율을 극대화하기 위해 반사막의 하부에 위치하는 절연막 상부 표면에 요철을 형성한다.During the manufacturing process of the thin film transistor substrate for the reflective liquid crystal display device, in order to maximize the reflection efficiency of the reflective film, irregularities are formed on the upper surface of the insulating film positioned below the reflective film.
도 1a 내지 도 1c는 종래의 기술에 따른 반도체 소자의 제조방법을 도시한 도면이다.1A to 1C are diagrams illustrating a method of manufacturing a semiconductor device according to the related art.
도 1a에 도시한 바와 같이, 통상의 반도체 제조공정으로 기판의 위에 기판 구조물(1)을 형성하고, 그 위에 절연막(3)을 형성한 후, 화학 기계적 연마 방법을 이용하여 절연막을 평탄화시킨다. 그리고 평탄화된 절연막의 위에 알루미늄으로 된 금속박막(5)을 증착시킨다.As shown in FIG. 1A, the substrate structure 1 is formed on the substrate by a conventional semiconductor manufacturing process, and the insulating film 3 is formed thereon, and then the insulating film is planarized using a chemical mechanical polishing method. Then, a metal thin film 5 made of aluminum is deposited on the planarized insulating film.
이렇게 금속박막(5)이 증착된 후, 그 위에 도 1b에 도시한 바와 같이, 감광막 패턴(7)을 형성하고, 다음에 도 1c에 도시한 바와 같이 감광막 패턴(7)을 마스크로 하여 식각을 진행한 후 감광막 패턴(7)을 제거한다.After the metal thin film 5 is deposited in this way, as shown in FIG. 1B, a photoresist pattern 7 is formed thereon, and as shown in FIG. 1C, etching is performed using the photoresist pattern 7 as a mask. After proceeding, the photoresist pattern 7 is removed.
이와 같이 금속박막(5)이 형성된 기판은 다음 공정을 진행하기 위해서 공기에 노출된 상태로 이동하여 다른 조립 라인으로 이송하게 된다.In this way, the substrate on which the metal thin film 5 is formed is moved to the state exposed to the air in order to proceed to the next process is transferred to another assembly line.
그런데 알루미늄으로 된 금속박막(5)이 공기에 노출된 상태로 이송하게 되면 알루미늄이 산화되어 그 조성에 변화가 발생되고, 반사도를 최대로 유지해야 할 금속박막의 반사율을 떨어뜨리는 결과를 초래한다.However, when the metal thin film 5 made of aluminum is transported in a state of being exposed to air, aluminum is oxidized to cause a change in its composition, resulting in a decrease in the reflectance of the metal thin film to maintain the maximum reflectivity.
본 발명은 이와 같은 종래의 문제점을 해결하기 제안된 것으로, 공기에 노출된 금속박막을 보호하도록 하여 반사율이 저하되는 것을 방지할 수 있도록 한 반도체 소자의 제조방법을 제공하는 데 있다.The present invention has been proposed to solve such a conventional problem, and to provide a method for manufacturing a semiconductor device to prevent the reduction of the reflectance by protecting the metal thin film exposed to air.
상술한 기술적 과제를 달성하기 위하여 본 발명의 제조방법은 기판 구조물 위에 절연막을 형성하고, 그 절연막 위에 증착된 금속박막의 표면에 산화보호막을 증착하여 반도체 소자를 형성한다.In order to achieve the above technical problem, the manufacturing method of the present invention forms an insulating film on a substrate structure, and forms a semiconductor device by depositing an oxide protective film on the surface of the metal thin film deposited on the insulating film.
그리고 본 발명의 다른 제조방법은 기판 구조물 위에 금속박막을 증착하고, 식각하여 요철을 형성한 후에 금속박막 전체에 산화보호막을 증착하여 반도체 소자를 형성한다.In another manufacturing method of the present invention, a metal thin film is deposited on the substrate structure and etched to form irregularities, and then an oxide protective film is deposited on the entire metal thin film to form a semiconductor device.
이하 첨부한 도면을 참조하여 본 발명에 따른 바람직한 실시예들을 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2d는 본 발명에 따른 반도체 소자의 제조방법을 도시한 단면도이고,2A to 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the present invention.
도 2a에 도시한 바와 같이, 반도체 제조공정을 통해 반도체 기판 위에 통상의 반도체 동작을 위한 복층 구조로 된 기판 구조물(11)을 형성하고, 그 위에 절연막(13)을 형성한다. 그리고, 화학 기계적 연마 방법을 이용하여 절연막(13)을 평탄화시킨 다음, 평탄화된 절연막(13)의 위에 알루미늄으로 된 금속박막(15)을 증착시킨다.As shown in FIG. 2A, a substrate structure 11 having a multilayer structure for normal semiconductor operation is formed on a semiconductor substrate through a semiconductor manufacturing process, and an insulating film 13 is formed thereon. Then, the insulating film 13 is planarized using a chemical mechanical polishing method, and then a metal thin film 15 made of aluminum is deposited on the planarized insulating film 13.
증착된 금속박막(15) 위에는 본 발명의 특징에 따라 산화보호막(17)을 증착한다. 이 때, 산화보호막(17)의 증착은 화학기상증착법이나 스퍼터링법을 이용하여 증착하고, 그 두께는 300 내지 500Å이 되도록 증착한다.On the deposited metal thin film 15 is deposited an oxide protective film 17 according to the features of the present invention. At this time, the oxide protective film 17 is deposited by chemical vapor deposition or sputtering, and deposited so as to have a thickness of 300 to 500 kPa.
이러한 산화보호막(17)은 질화막 또는 폴리를 이용한 폴리산화막으로 대체하여도 된다.The oxide protective film 17 may be replaced with a nitride film or a polyoxide film using poly.
산화보호막(17)의 증착이 종료되면, 도 2b에 도시한 바와 같이, 금속박막(15)의 반사효율을 극대화하기 위해서 금속박막(15) 위에 요철을 형성하게 되는 데, 이를 위하여 산화보호막(17) 위에 감광막 패턴을 형성한다. 감광막 패턴의 형성은 통상적인 반도체 제조 공정에서 이용되는 노광 및 현상 공정을 통해 형성한다.When the deposition of the oxide protective film 17 is completed, as shown in FIG. 2B, irregularities are formed on the metal thin film 15 in order to maximize the reflection efficiency of the metal thin film 15. ) To form a photoresist pattern. The photosensitive film pattern is formed through an exposure and development process used in a conventional semiconductor manufacturing process.
이렇게 감광막 패턴이 형성된 후, 도 2c에 도시한 바와 같이, 감광막 패턴을 마스크로 하여 식각을 실시한다. 식각시 과식각을 진행하여 금속박막 하부의 절연막(13)이 약간 식각될 때까지 식각을 진행한다. 식각이 종료되면 감광막 패턴을 제거한다.After the photoresist pattern is formed in this manner, as shown in FIG. 2C, etching is performed using the photoresist pattern as a mask. During etching, etching is performed until the insulating layer 13 under the metal thin film is slightly etched. When etching is finished, the photoresist pattern is removed.
그리고 후속되는 공정에서 금속박막(15) 위에 다른 막을 형성하기 전까지 금속박막 위에 형성된 산화보호막(17)을 그대로 잔존시킴으로써 공기 중에서 금속박막(15)의 표면이 노출되는 것을 방지한다.In the subsequent process, the oxide protective film 17 formed on the metal thin film remains as it is until the other film is formed on the metal thin film 15, thereby preventing the surface of the metal thin film 15 from being exposed in the air.
마지막으로 도 2d에 도시한 바와 같이, 후속공정을 진행하고자 할 경우 금속박막(15) 위에 증착된 산화보호막(17)을 식각하여 제거한다.Finally, as shown in FIG. 2D, when the subsequent process is to be performed, the oxide protective film 17 deposited on the metal thin film 15 is etched and removed.
한편, 본 발명에 따른 다른 실시예를 도 3a 내지 도 3d를 참조하여 설명하면 다음과 같다.Meanwhile, another embodiment according to the present invention will be described with reference to FIGS. 3A to 3D.
먼저 도 3a에 도시한 바와 같이, 반도체 제조공정을 통해 반도체 기판 위에 통상의 반도체 동작을 위한 복층 구조로 된 기판 구조물(21)을 형성하고, 그 위에 절연막(23)을 형성한다. 그리고, 화학 기계적 연마 방법을 이용하여 절연막(23)을 평탄화시킨 다음, 평탄화된 절연막(23)의 위에 알루미늄으로 된 금속박막(25)을 증착시킨다.First, as shown in FIG. 3A, a substrate structure 21 having a multilayer structure for normal semiconductor operation is formed on a semiconductor substrate through a semiconductor manufacturing process, and an insulating film 23 is formed thereon. Then, the insulating film 23 is planarized using a chemical mechanical polishing method, and then a metal thin film 25 made of aluminum is deposited on the planarized insulating film 23.
그리고 증착된 금속박막(25) 위에는 금속박막의 반사효율을 극대화하기 위해서 금속박막(25) 위에 요철을 형성하게 되는 데, 이를 위하여 금속박막(25) 위에 감광막 패턴(27)을 형성한다. 감광막 패턴(27)의 형성은 통상적인 반도체 제조 공정에서 이용되는 노광 및 현상 공정을 통해 형성한다.In order to maximize the reflection efficiency of the metal thin film 25, the unevenness is formed on the metal thin film 25. For this purpose, the photoresist pattern 27 is formed on the metal thin film 25. The photosensitive film pattern 27 is formed through an exposure and development process used in a conventional semiconductor manufacturing process.
이렇게 감광막 패턴(27)이 형성된 후, 도 3b에 도시한 바와 같이, 감광막 패턴(27)을 마스크로 하여 식각을 실시한다. 식각시 과식각을 진행하여 금속박막(25) 하부의 절연막(23)이 약간 식각될 때까지 식각을 진행한다. 식각이 종료되면 패턴(27)된 감광막을 제거한다.After the photosensitive film pattern 27 is formed in this manner, as shown in FIG. 3B, etching is performed using the photosensitive film pattern 27 as a mask. During etching, etching is performed until the insulating film 23 under the metal thin film 25 is slightly etched. When the etching is completed, the photosensitive film having the pattern 27 is removed.
감광막 패턴(27)이 제거되면, 도 3c에 도시한 바와 같이, 본 발명의 특징에 따라 금속박막(25)의 전체에 산화보호막(29)을 증착한다. 이 때, 산화보호막(29)의 증착은 화학기상증착법이나 스퍼터링법을 이용하여 증착하고, 그 두께는 300 내지 500Å이 되도록 증착한다. 이에 따라 금속박막(25)의 표면 뿐만 아니라 식각된 홀의 측벽과 저면에도 산화보호막(29)이 증착된다.When the photosensitive film pattern 27 is removed, as shown in FIG. 3C, the oxide protective film 29 is deposited on the entire metal thin film 25 in accordance with the characteristics of the present invention. At this time, the oxide protective film 29 is deposited by chemical vapor deposition or sputtering, and deposited to have a thickness of 300 to 500 kPa. Accordingly, the oxide protective film 29 is deposited not only on the surface of the metal thin film 25 but also on the sidewalls and bottom surfaces of the etched holes.
이러한 산화보호막(29)은 질화막 또는 폴리를 이용한 폴리산화막으로 대체하여도 된다.The oxide protective film 29 may be replaced with a nitride film or a polyoxide film using poly.
산화보호막(29)의 증착이 종료되면, 후속되는 공정에서 금속박막(25) 위에 다른 막을 형성하기 전까지 금속박막(25) 위에 형성된 산화보호막(29)을 그대로 잔존시킴으로써 공기 중에서 금속박막(25)의 표면이 노출되는 것을 방지한다.After the deposition of the oxide protective film 29 is finished, the oxide protective film 29 formed on the metal thin film 25 remains as it is until the other film is formed on the metal thin film 25 in a subsequent process. Prevent surface exposure.
마지막으로 도 3d에 도시한 바와 같이, 후속공정을 진행하고자 할 경우 금속박막(25) 위에 증착된 산화보호막(29)을 식각하여 제거한다. 이때 금속박막(25) 표면이 노출되어 들어날 때까지를 식각정지점으로 하여 식각을 진행하게 되면 도 3d에 도시한 바와 같이 홀의 내측에는 증착된 산화보호막(29)의 일부가 그대로 남아 있게 된다.Finally, as shown in FIG. 3D, the oxide protective film 29 deposited on the metal thin film 25 is etched and removed to proceed to the subsequent process. In this case, when the etching process is performed until the surface of the metal thin film 25 is exposed to the etch stop point, as shown in FIG. 3D, a part of the deposited oxide protective film 29 remains inside the hole.
이상에서 살펴본 바와 같이 본 발명에 의하면, 후속공정이 진행되기 전까지 금속박막의 표면이 노출되는 것을 방지할 수 있는 산화보호막을 그대로 유지함으로써 금속박막이 공기중에 노출되어 반사효율이 떨어지는 것을 방지할 수 있게 된다. As described above, according to the present invention, by maintaining the oxide protective film that can prevent the surface of the metal thin film from being exposed until the subsequent process, the metal thin film is exposed to air to prevent the reflection efficiency from falling. do.
따라서 제품에 대한 신뢰도가 향상되고 생산수율이 향상되는 효과가 나타난다.Therefore, the reliability of the product is improved and the production yield is improved.
도 1a 내지 도 1c는 종래의 기술에 따른 반도체 소자의 제조방법을 도시한 도면이고,1A to 1C illustrate a method of manufacturing a semiconductor device according to the related art.
도 2a 내지 도 2d는 본 발명에 따른 반도체 소자의 제조방법을 도시한 단면도이고,2A to 2D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the present invention.
도 3a 내지 도 3d는 본 발명에 따른 다른 실시예를 도시한 단면도이다.3A to 3D are cross-sectional views showing another embodiment according to the present invention.
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