KR100482740B1 - Method of embedding oxide film in device isolation trench of semiconductor device - Google Patents

Method of embedding oxide film in device isolation trench of semiconductor device Download PDF

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KR100482740B1
KR100482740B1 KR1019970075072A KR19970075072A KR100482740B1 KR 100482740 B1 KR100482740 B1 KR 100482740B1 KR 1019970075072 A KR1019970075072 A KR 1019970075072A KR 19970075072 A KR19970075072 A KR 19970075072A KR 100482740 B1 KR100482740 B1 KR 100482740B1
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oxide film
trench
silicon oxide
excess
sih
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KR19990055160A (en
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김시범
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주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
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    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
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Abstract

본 발명은, 소자 분리 기술에 적용되고 있는 트렌치 아이솔레이션 형성에 있어서 우수한 갭필링을 실현할 수 있는 트렌치내의 산화막 매립 방법을 제공하는데 그 목적이 있다. 따라서, 본 발명은 트렌치내의 산화막 증착시 증착 조건을 변경한다. 즉, Si이 풍부(rich)한 상태의 실리콘 산화막, 즉 SiO2에서 SiO2-x(x>0)의 상태의 실리콘 산화막을 증착 시키고 산화분위기에서 열처리하여 실리콘 산화막내에 산소와 결합되어 있지 않은 Si을 SiO2로 산화시킴으로써, 갭필링 특성이 우수한 트렌치 리필(refill) 산화막을 형성한다. 이와 같은 방법은 Si의 산화 과정에서 동반하는 부피 팽창과 막의 치밀화 현상을 이용한 것으로, 종래의 방법에 비해 전체적인 공정 수의 증가는 일어나지 않는다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method of filling oxide films in trenches that can realize excellent gap filling in trench isolation formation applied to device isolation techniques. Thus, the present invention changes the deposition conditions upon deposition of oxide films in the trenches. That is, Si Si is not combined with oxygen in a rich (rich) state of the silicon oxide film, that is, silicon oxide film by depositing a silicon oxide film of the state of the SiO 2-x (x> 0 ) in the SiO 2 was heat treated in an oxidizing atmosphere, Is oxidized to SiO 2 to form a trench refill oxide film having excellent gap filling characteristics. This method uses the volume expansion and film densification that accompany the oxidation of Si, and does not increase the overall number of processes compared to the conventional method.

Description

반도체 소자의 소자분리용 트렌치내에 산화막을 매립하는 방법Method of embedding oxide film in device isolation trench of semiconductor device

본 발명은 반도체 소자 제조 방법에 관한 것으로, 특히 아이솔레이션을 위한 트렌치내에 산화막을 매립하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of embedding an oxide film in a trench for isolation.

일반적으로, 얕은 깊이의 트렌치 아이솔레이션(shallow trench isolation; STI)공정은 다음과 같은 공정의 순서로 진행된다.In general, shallow trench isolation (STI) processes proceed in the following order.

즉, 도1에 도시된 바와 같이, 실리콘 기판(1) 상에 패드 산화막(2) 및 질화막(3)을 도포하고, 아이솔레이션 영역을 디파인 하는 식각 마스크를 형성한 후 상기 실리콘 기판을 식각하여 트렌치를 형성한다. 이렇게 하여 일차적으로 트렌치가 형성된 상태에서, 희생산화막을 트렌치내의 형성하고 이를 다시 제거하여 트렌치내부의 손상된 실리콘층을 제거한 후, 트렌치내에 얇은 산화막(4)을 형성한다. 계속하여, 트렌치내부를 산화막으로 매립(filling)한후 산화막의 조직을 치밀(densification)하게 하는 열처리를 수행한후 CMP (chemical mechanical polishing)을 수행하여 트렌치아이솔레이션을 형성하여 왔다.In other words, as shown in FIG. 1, a pad oxide film 2 and a nitride film 3 are coated on the silicon substrate 1, an etching mask for defining an isolation region is formed, and the silicon substrate is etched to form a trench. Form. In this way, in the state where the trench is formed first, a sacrificial oxide film is formed in the trench and removed again to remove the damaged silicon layer in the trench, and then a thin oxide film 4 is formed in the trench. Subsequently, trench isolation has been formed by filling the trench with an oxide film, performing a heat treatment to densify the structure of the oxide film, and then performing chemical mechanical polishing (CMP).

통상적으로, 상기 트렌치 매립에 사용되는 산화막으로는 LPCVD(low pressure CVD) 산화막, 갭필링 특성과 평탄화 특성이 우수한 O3-TEOS(Tetraethoxysilane) APCVD(atmospheric pressure CVD) 산화막 또는 고밀도플라즈마 CVD 산화막이 주로 사용되어 왔다.In general, the oxide film used in the trench filling is mainly a low pressure CVD (LPCVD) oxide film, an O 3 -TEOS (Tetraethoxysilane) atmospheric pressure CVD (APCVD) film or a high density plasma CVD oxide film having excellent gap peeling and planarization characteristics. Has been.

그러나, LPCVD 산화막과 O3-TEOS산화막을 사용한 트렌치 매립은 그 증착 특성으로 인하여 트렌치 중앙에 틈(seam)이 형성되게 된다. 이러한 틈은 후속 공정, 즉 불산(HF)을 포함하는 세척 용액에 의한 세정공정시 매립된 산화막이 손상받게 하는 되는 문제점을 안고 있다. 따라서 트렌치간 거리가 0.25㎛ 이하로 설계되는 256M DRAM 급 이상의 소자에서는 적용할 수 없다.However, in the trench filling using the LPCVD oxide film and the O 3 -TEOS oxide film, a gap is formed in the center of the trench due to its deposition characteristics. This gap has a problem that the buried oxide film is damaged during the subsequent process, that is, the cleaning process by the cleaning solution containing hydrofluoric acid (HF). Therefore, it is not applicable to devices of 256M DRAM class or more designed with a trench-to-trench distance of 0.25 mu m or less.

한편, HDP(high density plasma)-CVD 산화막은 O3-TEOS산화막보다는 갭필링 특성이 우수하나, 0.15㎛ 이하로 트렌치 간격이 좁아지게 되는 1G DRAM급 이상의 트렌치에 대하여는 그 신뢰성이 충분치 못한 상황이다. 또한, HDP-CVD 증착 과정중에 동반되는 스퍼터링 작용에 의하여 패턴의 모서리가 식각되는 현상이 증착 조건에 따라서 발생할 수 있으며, 이에 의하여 소자의 절연 특성과 누설 전류 특성이 불량해지는 문제점이 있다. 더욱이, O3-TEOS와 HDP-CVD 증착 방법은 SiO2 증착 방법으로 통상적으로 사용되어온 PECVD 증착방법과 비교하여 공정 단가가 높아, 결국 소자의 제조단가를 높이는 문제점이 있었다.On the other hand, HDP (high density plasma) -CVD oxide film has better gap filling characteristics than O 3 -TEOS oxide film, but its reliability is not sufficient for trenches of 1G DRAM or more, where the trench gap is narrowed to 0.15 μm or less. In addition, a phenomenon in which the edge of the pattern is etched by the sputtering action accompanied during the HDP-CVD deposition process may occur depending on the deposition conditions, thereby resulting in poor insulation and leakage current characteristics of the device. Moreover, the O 3 -TEOS and HDP-CVD deposition methods have a higher process cost compared to the PECVD deposition method which is commonly used as a SiO 2 deposition method, resulting in a problem of increasing the manufacturing cost of the device.

상기 문제점을 해결하기 위하여 안출된 본 발명은, 소자 분리 기술에 적용되고 있는 트렌치 아이솔레이션 형성에 있어서 우수한 갭필링을 실현할 수 있는 트렌치내의 산화막 매립 방법을 제공하는데 그 목적이 있다.Disclosure of Invention The present invention devised to solve the above problems has an object to provide a method for filling oxides in trenches that can realize excellent gap filling in trench isolation formation applied to device isolation techniques.

본 발명은, 반도체 소자의 트렌치내에 필링되는 소자분리막 형성방법에 있어서, 실리콘 기판에 트렌치를 형성하는 단계; 상기 트렌치내에 산소와 결합되지 않은 과잉 Si원자를 포함하는 실리콘 산화막을 매립하는 단계; 및 상기 실리콘 산화막을 산소 분위기에서 열처리하여 상기 과잉 Si를 산화시키는 단계를 포함하여 이루어지는 것을 특징으로 한다.According to an aspect of the present invention, there is provided a method of forming a device isolation film to be filled in a trench of a semiconductor device, the method comprising: forming a trench in a silicon substrate; Burying a silicon oxide film containing excess Si atoms not bonded to oxygen in the trench; And oxidizing the excess Si by heat-treating the silicon oxide film in an oxygen atmosphere.

또한, 본 발명은, 반도체 소자의 트렌치내를 필링되는 소자분리막 형성방법에 있어서, 반도체 기판에 트렌치를 형성하는 단계; 상기 트렌치내에 산소와 결합되지 않은 과잉 Si원자를 포함하는 실리콘 산화막을 매립하는 단계; 상기 실리콘 산화막을 산소 분위기에서 열처리하여 상기 과잉 Si를 산화시키는 단계; 및 상기 실리콘 산화막을 질소 분위기에서 열처리하는 단계를 포함하여 이루어지는 것을 특징으로 한다.The present invention also provides a device isolation film forming method for filling a trench in a semiconductor device, the method comprising: forming a trench in a semiconductor substrate; Burying a silicon oxide film containing excess Si atoms not bonded to oxygen in the trench; Heat treating the silicon oxide film in an oxygen atmosphere to oxidize the excess Si; And heat treating the silicon oxide film in a nitrogen atmosphere.

이하, 본 발명을 상세히 살펴보면 다음과 같다. Hereinafter, the present invention will be described in detail.

먼저, 본 발명은 트렌치내의 산화막 증착시 증착 조건을 변경한다. 즉, Si이 풍부(rich)한 상태의 실리콘 산화막, 즉 SiO2에서 SiO2-x(x>0)의 상태의 실리콘 산화막을 증착 시키고 산화분위기에서 열처리하여 실리콘 산화막내에 산소와 결합되어 있지 않은 Si을 SiO2로 산화시킴으로써, 갭필링 특성이 우수한 트렌치 리필(refill) 산화막을 형성한다.First, the present invention changes the deposition conditions when depositing an oxide film in a trench. That is, Si Si is not combined with oxygen in a rich (rich) state of the silicon oxide film, that is, silicon oxide film by depositing a silicon oxide film of the state of the SiO 2-x (x> 0 ) in the SiO 2 was heat treated in an oxidizing atmosphere, Is oxidized to SiO 2 to form a trench refill oxide film having excellent gap filling characteristics.

이와 같은 방법은 Si의 산화 과정에서 동반하는 부피 팽창과 막의 치밀화 현상을 이용한 것으로, 아래에 설명한 바와 같이 종래의 방법에 비해 전체적인 공정 수의 증가는 일어나지 않는다. 도2는 본 발명에 다른 트렌치 필링 방법에 의해 형성된 소자분리막의 단면도로서, 도1과 동일부호는 동일 구성요소를 나타내고 있다. 도2에 도시된 바와 같이, 트렌치내부가 산화막으로 완전히 필링되어 있는 보습을 보여주고 있다. This method uses the volume expansion and film densification that accompany the oxidation of Si. As described below, the increase in the overall number of processes does not occur as compared with the conventional method. FIG. 2 is a cross-sectional view of an isolation layer formed by a trench filling method according to the present invention, and the same reference numerals as in FIG. 1 denote the same components. As shown in Fig. 2, the inside of the trench shows the moisturizing completely filled with the oxide film.

종래의 방법: 트렌치 형성 → 트렌치 리필용 산화막 증착→치밀화 열처리 →CMPConventional method: trench formation → deposition of oxide film for trench refilling → densification heat treatment → CMP

본 발명의 방법: 트렌치 형성 →트렌치 리필용 Si-rich 산화막 증착 →산화/열처리 →CMPMethod of the Invention: Trench Formation → Si-rich Oxide Deposition for Trench Refill → Oxidation / Heat Treatment → CMP

<제1 실시예><First Embodiment>

본 발명에 다른 제1 실시예에 의한 트렌치 산화막 형성 방법은, 1) 실리콘 기판상에 패드 산화막 및 질화막 증착; 2) 식각 마스크형성; 3) 트렌치형성; 4) Si-rich조건하에서 실리콘 산화막을 이용한 트렌치 매립→5)산화막의 치밀화 열처리 →6)CMP (chemical mechanical polishing)→6)질화막 제거의 순으로 이루어진다. A trench oxide film forming method according to a first embodiment of the present invention includes: 1) depositing a pad oxide film and a nitride film on a silicon substrate; 2) etching mask formation; 3) trench formation; 4) Under the Si-rich condition, trench filling using silicon oxide → 5) Densification heat treatment of oxide → 6) CMP (chemical mechanical polishing) → 6) removal of nitride.

상기와 같이 Si-rich증착조건을 설정하면, 종래의 트렌치 매립방법에서 야기되었던 트렌치 중앙의 틈(seam) 발생 없이 PECVD(plasma enhanced CVD) 또는 HDP-CVD(high density plasma CVD)의 두 가지 증착방법 모두를 사용할 수 있다.When the Si-rich deposition conditions are set as described above, two deposition methods such as plasma enhanced CVD (PECVD) or high density plasma CVD (HDP-CVD) are performed without the occurrence of a gap in the trench center caused by the conventional trench filling method. You can use both.

이때, PECVD 방법을 사용하는 경우는, 통상적으로 SiH4/N2O/N2의 반응기체를 사용하는데, Si-rich한 상태로 증착시키기 위하여는 SiH4/N2O 유량비를 통상의 조건과 비교하여 SiH4 양을 증가시키거나 N2O 유량을 감소시키고, 또는 이 두가지를 조합하여 Si-rich한 상태에서 실리콘 산화막을 증착시킨다. 바람직한 실시예에서는 SiH4/N2O의 유량비를 1∼10의 범위로 한다.In this case, in the case of using the PECVD method, a SiH 4 / N 2 O / N 2 reactor is usually used. In order to deposit in a Si-rich state, the SiH 4 / N 2 O flow rate ratio is set to a normal condition. In comparison, the amount of SiH 4 is increased or the N 2 O flow rate is decreased, or a combination thereof is used to deposit a silicon oxide film in a Si-rich state. In a preferred embodiment, the flow rate ratio of SiH 4 / N 2 O is in the range of 1 to 10.

또한, HDP-CVD 방법을 사용하는 경우는, SiH4/O2/Ar 의 반응 기체를 사용하는데, Si-rich한 상태로 증착시키기 위하여는 SiH4/O2의 유량비를 1 이하로 하고, 증착에 대한 식각률(etch to deposition ratio)은 0.15∼0.25 범위로 한다.In the case of using the HDP-CVD method, a reaction gas of SiH 4 / O 2 / Ar is used. In order to deposit in a Si-rich state, the flow rate ratio of SiH 4 / O 2 is set to 1 or less, and vapor deposition is performed. The etch to deposition ratio for is in the range of 0.15 to 0.25.

각각의 경우에서 Si-rich 정도에 따라 산화 열처리시 동반하는 부피 팽창 정도가 다르므로 필링하고자 하는 트렌치 간격을 고려하여 증착 조건을 설정하여야 한다. 여기서 Si-rich산화막은 산소와 결합되지 않은 Si(Free Si)과 SiO2의 혼합물로 구성된 형태인데, 아래에 정의된 Si 과잉도가 1%∼30%범위로 되는 공정 조건을 사용하는 것이 바람직하다.In each case, the degree of volume expansion accompanying oxidative heat treatment differs depending on the Si-rich level, and thus the deposition conditions should be set in consideration of the trench spacing to be filled. Here, the Si-rich oxide film is composed of a mixture of Si (free Si) and SiO 2 which are not bonded to oxygen, and it is preferable to use process conditions in which the Si excess defined below is in the range of 1% to 30%. .

Si 과잉도(%)=Free Si / (free Si+SiO2)×100Si excess (%) = Free Si / (free Si + SiO 2 ) × 100

Si 과잉도가 30% 이상으로 큰 경우는, 산화시 동반되는 부피 팽창이 크기 때문에, 이에 따른 스트레스(stress) 유발 문제로 막 내의 균열 발생과 소자의 절연 특성이 열화되는 문제점이 있게 됨으로 적합하게 선택되어야 한다. 계속하여, Si-rich상태로 증착된 트렌치 필링 산화막을 산화 분위기에서 열처리하여 과잉된 Si을 SiO2 상태로 변화시키면 치밀화과정이 일어나 막이 치밀하게 되어 습식식각 속도가 감소하게 된다.If the Si excess is greater than 30%, since the volume expansion accompanied by oxidation is large, there is a problem of cracking in the film and deterioration of the insulation properties of the device due to stress causing problems. Should be. Subsequently, when the trench filling oxide film deposited in the Si-rich state is heat-treated in an oxidizing atmosphere and the excess Si is changed to the SiO 2 state, a densification process occurs and the film becomes dense, thereby reducing the wet etching rate.

산화열처리 조건은 건식 또는 습식 산화방법을 사용한다. 이때 주의하여야 할 점은, 과도한 산화열처리 과정에 의하여 Si-rich 산화막뿐만 아니라 실리콘 기판도 산화될 가능성이 크기 때문에 열처리 온도/시간을 엄격하게 조절하여야 한다. 바람직한 실시예에서, 건식 산화시는 950℃∼1050℃에서 10분-60분 범위에서 시행하며, 습식 산화시에는 950℃∼1050℃에서 5분∼60분 범위로 한다.Oxidative heat treatment conditions use dry or wet oxidation methods. In this case, it should be noted that the silicon oxide substrate as well as the Si-rich oxide film may be oxidized by the excessive oxidation heat treatment process, so the heat treatment temperature / time should be strictly controlled. In a preferred embodiment, dry oxidation is carried out at 950 ° C. to 1050 ° C. for 10 minutes to 60 minutes, and wet oxidation is at 950 ° C. to 1050 ° C. for 5 to 60 minutes.

한편, 산화 열처리 과정 후 막의 치밀도가 충분치 않아서 습식식각속도가 큰 경우는 산화열처리를 두 단계로 나누어 제1단계에서 산화 열처리를 시행한 후, 제2단계에서는 질소분위기에서 1000℃∼1050℃ 범위에서 30분에서 60분 동안 열처리하여 치밀화 공정을 수행한다. 이후 CMP(chemical mechanical polishing) 공정 등의 후속 공정을 진행하여 본 발명에 다른 아이솔레이션 공정을 완성한다.On the other hand, when the wet etching rate is large because the film has insufficient density after the oxidizing heat treatment, the oxidative heat treatment is divided into two stages, followed by oxidative heat treatment in the first stage, and in the second stage, in the nitrogen atmosphere, in the range of 1000 ° C. to 1050 ° C. The densification process is performed by heat treatment at 30 to 60 minutes at. Thereafter, a subsequent process such as a chemical mechanical polishing (CMP) process is performed to complete the isolation process according to the present invention.

<제2 실시예>Second Embodiment

본 발명에 다른 제2 실시예에 의한 트렌치 산화막 형성 방법은, 1) 실리콘 기판상에 패드 산화막 및 질화막 증착; 2) 식각 마스크형성; 3) 트렌치형성; 4) 트렌치내의 희생산화막 형성 및 제거; 5) 트렌치내에 얇은 산화막 형성; 6) Si-rich조건하에서 실리콘 산화막을 이용한 트렌치 매립→7) 산화막의 치밀화 열처리 →8) CMP (*chemical mechanical polishing)→9) 질화막 제거의 순으로 이루어진다.A trench oxide film forming method according to a second embodiment of the present invention includes: 1) depositing a pad oxide film and a nitride film on a silicon substrate; 2) etching mask formation; 3) trench formation; 4) formation and removal of sacrificial oxide films in trenches; 5) thin oxide film formation in the trench; 6) Trench filling using silicon oxide film under Si-rich condition → 7) Densification heat treatment of oxide film → 8) CMP (* chemical mechanical polishing) → 9) Nitriding film removal.

상기 희생산화막은 종래의 희생산화막과 동일한 기능을 수행하는 산화막으로, 트렌치 식각 과정중에 Si 기판에 유발된 식각 손상부위를 제거하기 위한 산화막이다. 상기 희생산화막을 희석된 HF 용액을 사용하여 제거한 후, 다시 트렌치내에 얇은 산화막을 성장시키는데, 이 얇은 산화막은 Si/SiO2 계면의 결함을 최소화시키기 위하여 적용되는 막이다.The sacrificial oxide film is an oxide film that performs the same function as a conventional sacrificial oxide film, and is an oxide film for removing an etching damage site caused by a Si substrate during a trench etching process. After the sacrificial oxide film is removed using a diluted HF solution, a thin oxide film is further grown in the trench, which is applied to minimize defects at the Si / SiO 2 interface.

그런데, 본 발명의 방법을 적용하면 다음과 같은 공정 순서에 의하여 상기 얇은 산화막 형성공정을 생략할 수 있다. 즉, Si-rich 실리콘 산화막의 산화 과정중에 Si 기판을 약간 산화시킴으로써 이 막을 대체할 수 있게 된다.However, if the method of the present invention is applied, the thin oxide film forming process may be omitted by the following process sequence. That is, it is possible to replace this film by slightly oxidizing the Si substrate during the oxidation process of the Si-rich silicon oxide film.

상기와 같이 이루어지는 본 발명은 PECVD 방법을 사용하여 0.25㎛ 이하의 좁은 트렌치에 대한 갭필링을 가능하게 하고, HDP-CVD 공정의 트렌치 갭필링 능력을 향상키며, 트렌치 아이솔레이션 공정에서 Si/SiO2 계면 결함을 제어하기 위한 트렌치내의 얇은 산화막 형성공정을 생략할 수 있어 소자의 신뢰도 및 공정단가를 낮출 수 있는 효과가 있다.The present invention made as described above enables the gap filling of narrow trenches of 0.25 μm or less by using the PECVD method, improves the trench gap filling capability of the HDP-CVD process, and Si / SiO 2 interface defects in the trench isolation process. The process of forming a thin oxide film in the trench for controlling can be omitted, thereby reducing the reliability and the process cost of the device.

도1은 종래의 트렌치 필링 방법에 의해 형성된 소자분리막의 단면도.1 is a cross-sectional view of a device isolation film formed by a conventional trench filling method.

도2는 본 발명에 따른 트렌치 필링 방법에 의해 형성된 소자분리막의 단면도.2 is a cross-sectional view of a device isolation film formed by a trench filling method according to the present invention.

*도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1: 실리콘 기판 2: 패드 산화막1: silicon substrate 2: pad oxide film

3: 질화막 4: 산화막 3: nitride film 4: oxide film

Claims (12)

반도체 소자의 트렌치내에 필링되는 소자분리막 형성방법에 있어서,In the device isolation film forming method to be filled in the trench of the semiconductor device, 실리콘 기판에 트렌치를 형성하는 단계;Forming a trench in the silicon substrate; 상기 트렌치 내에 희생산화막을 형성하는 단계;Forming a sacrificial oxide film in the trench; 상기 희생산화막을 제거하는 단계;Removing the sacrificial oxide film; 상기 트렌치 내에 산소와 결합되지 않은 과잉 Si원자를 포함하는 실리콘 산화막을 매립하는 단계; Burying a silicon oxide film containing excess Si atoms not bonded to oxygen in the trench; 상기 과잉 Si원자를 포함하는 실리콘 산화막을 산화 분위기에서 열처리하여 상기 과잉 Si를 산화시키는 단계;Oxidizing the excess Si by heat-treating the silicon oxide film including the excess Si atoms in an oxidizing atmosphere; 상기 실리콘 산화막을 질소 분위기에서 열처리하여 치밀화하는 단계;Densifying the silicon oxide film by heat treatment in a nitrogen atmosphere; 를 포함하여 이루어지는 것을 특징으로 하는 방법.Method comprising a. 제 1 항에 있어서,The method of claim 1, 상기 실리콘 산화막내에 산소와 결합되지 않는 상기 과잉 Si원자의 과잉도는 1%~30%인 것을 특징으로 하는 방법.And the excess Si of the excess Si atoms not bonded to oxygen in the silicon oxide film is 1% to 30%. 제 1 항에 있어서,The method of claim 1, 상기 실리콘 산화막은 PECVD(plasma enhanced CVD)에 의해 증착되는 것을 특징으로 하는 방법.The silicon oxide film is deposited by plasma enhanced CVD (PECVD). 제 1 항에 있어서,The method of claim 1, 상기 실리콘 산화막은 HDP-CVD(high density plasma CVD)에 의해 증착되는 것을 특징으로 하는 방법.And the silicon oxide film is deposited by high density plasma CVD (HDP-CVD). 제 3 항에 있어서,The method of claim 3, wherein 상기 실리콘 산화막은 SiH4 및 N2O 가스에 의해 형성되고,The silicon oxide film is formed of SiH 4 and N 2 O gas, 상기 과잉 Si원자는 상기 SiH4 유량을 증가시키거나 N2O 유량을 감소시키고, 또는 이 두가지를 조합에 의해 이루어지는 것을 특징으로 하는 방법.Wherein the excess Si atoms are increased by increasing the SiH 4 flow rate or decreasing the N 2 O flow rate, or a combination of both. 제 5 항에 있어서,The method of claim 5, wherein 상기 SiH4/N2O의 유량비를 1∼10인 것을 특징으로 하는 방법.A flow rate ratio of said SiH 4 / N 2 O is 1 to 10, characterized in that. 제 2 항에 있어서,The method of claim 2, 상기 실리콘 산화막은 SiH4, O2 및 Ar 가스에 의해 형성되고, 상기 과잉 Si원자는 상기 SiH4 유량을 다른 소스가스보다 상대적으로 증가시킴으로써 이루어지는 것을 특징으로 하는 방법.Wherein said silicon oxide film is formed by SiH 4 , O 2, and Ar gas, wherein the excess Si atoms are made by increasing the SiH 4 flow rate relative to other source gases. 제 7 항에 있어서,The method of claim 7, wherein 상기 SiH4/O2의 유량비는 1이하인 것을 특징으로 하는 방법.The flow rate ratio of the SiH 4 / O 2 is characterized in that 1 or less. 제 1 항에 있어서,The method of claim 1, 상기 산소 분위기에서의 열처리는 950℃∼1050℃에서 10분 내지 60분 동안 이루어지는 건식 산화공정인 것을 특징으로 하는 방법.The heat treatment in the oxygen atmosphere is a dry oxidation process that is carried out for 10 to 60 minutes at 950 ℃ to 1050 ℃. 제 1 항에 있어서,The method of claim 1, 상기 산소 분위기에서의 열처리는 950℃∼1050℃에서 5분 내지 60분 동안 이루어지는 습식 산화공정인 것을 특징으로 하는 방법.The heat treatment in the oxygen atmosphere is a wet oxidation process which is carried out for 5 to 60 minutes at 950 ℃ to 1050 ℃. 제 1 항에 있어서,The method of claim 1, 상기 산소 분위기에서의 열처리하여 상기 과잉 Si를 산화시키는 단계는 실리콘 기판의 표면 상부를 산화시키는 것을 특징으로 하는 방법.Oxidizing the excess Si by heat treatment in the oxygen atmosphere, oxidizing the upper surface of the silicon substrate. 제 1 항에 있어서,The method of claim 1, 상기 질소 분위기에서 열처리하는 단계 1000℃∼1050℃에서 30분 내지 60분 동안 이루어지는 것을 특징으로 하는 방법.Heat-treating in the nitrogen atmosphere, characterized in that the method for 30 to 60 minutes at 1000 ℃ to 1050 ℃.
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