KR100482333B1 - Apparatus And Method For Controlling Gray Scale Of Plasma Display Panel - Google Patents

Abstract

The present invention relates to a gradation control apparatus and method for a plasma display panel which can improve image quality and express all gradations with a small number of subfields in a two-electrode opposing discharge type plasma display panel.

In the plasma display panel according to the present invention, discharge cells for gray scale expression are formed, and the discharge cells are provided with two or more sub discharge cells for gray scale expression of any one value.

According to an embodiment of the present invention, a method of driving a plasma display panel in which one discharge cell representing gray scales includes two or more sub discharge cells is performed in which a discharge occurs among the two or more sub discharge cells in order to express the gray levels of the discharge cells. Expressing the gradation spatially by varying the number

An apparatus for driving a plasma display panel in which one discharge cell according to the present invention includes two or more sub discharge cells in order to express one gray scale value of each of the n sub discharge cells included in the discharge cell is provided. N scan drivers for simultaneously applying negative scan pulses having different voltage values to the scan electrodes, and simultaneously applying positive data pulses having different voltage values to the scan electrodes of each of the sub-discharge cells included in the discharge cell An address driver is provided.

Description

Gray scale control device and method of plasma display panel {Apparatus And Method For Controlling Gray Scale Of Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to an apparatus and method for controlling a gradation of a plasma display panel in which image quality can be improved and a small number of subfields can be expressed in a two-electrode opposing discharge plasma display panel. .

Plasma Display Panel (hereinafter referred to as "PDP") is used to excite and emit phosphors by using ultraviolet rays generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is discharged. Will be displayed. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP has a scan electrode (Y) and a sustain electrode (Z), and an address electrode (X) orthogonal to the scan electrode (Y) and the sustain electrode (Z). It is provided.

At the intersection of the scan electrode Y, the sustain electrode Z and the address electrode X, a cell 1 for displaying any one of red, green and blue is formed. The scan electrode Y and the sustain electrode Z are formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrode X is formed on the lower substrate (not shown). On the lower substrate, partition walls are formed to prevent optical and electrical interference between horizontally adjacent cells. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period and the number of sustain pulses allocated thereto are 2 ⁿ (n = 0,1,2,3,4,5,6) in each subfield. , 7).

3 shows driving waveforms of a PDP supplied to two subfields.

Referring to FIG. 3, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the setup period SU. This rising ramp waveform (Ramp-up) causes a discharge in the cells of the full screen. By this setup discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y. After the rising ramp waveform Ramp-up is supplied in the set-down period SD, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes ( Is simultaneously applied to Y). Ramp-down causes a slight erase discharge in the cells, thereby partially erasing the excessively formed wall charge. This set-down discharge causes the wall charges to be uniformly retained in the cells so that the address discharge can be stably generated.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X in synchronization with the scan pulse scan. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated during the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when a sustain voltage is applied.

The sustain electrode Z is supplied with a positive DC voltage Zdc during the set down period and the address period.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. The cell selected by the address discharge has a sustain discharge, that is, a display discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse sus is applied as the wall voltage and the sustain pulse sus are added. This will happen.

After the sustain discharge is completed, ramp waveforms having a small pulse width and a low voltage level are supplied to the sustain electrode Z to erase wall charges remaining in the cells of the full screen.

However, the three-electrode surface discharge type PDP as described above has a limitation in reducing the discharge cell size because two sustain electrode pairs exist on the upper substrate to maintain an appropriate interval.

4 is a plan view schematically showing an electrode arrangement of a conventional two-electrode alternating current counter discharge type plasma display panel.

Referring to FIG. 4, the discharge cell of the PDP according to the related art has a two-electrode alternating current counter discharge type structure including a scan electrode Y and an address electrode X orthogonal to the scan electrode Y.

At the intersection of the scan electrode Y and the address electrode X, a cell 31 for displaying any one of red, green and blue is formed. The scan electrode Y is formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrode X is formed on the lower substrate (not shown). On the lower substrate, partition walls are formed to prevent optical and electrical interference between horizontally adjacent cells. The partition wall is formed in a stripe form or alternately formed in a well form to alternate with the address electrode X. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate. As described above, in the PDP configuration, the discharge cell can reduce the cell area and increase the resolution by using opposite discharge instead of surface discharge.

In order to realize the gray level of an image, the PDP is time-divisionally driven by dividing one frame into several subfields having different emission counts as shown in FIG. Each subfield is divided into an erasing period for initializing the entire screen or erasing residual wall charges, and an address and sustain period for selecting a scan line, selecting a cell from the selected scan line, or implementing gray levels according to the number of discharges.

However, even in the conventional two-electrode counter-discharge type PDP, the address period takes the longest during one frame, and thus the addressing driving time becomes long. For this reason, the driving method of the PDP according to the related art has a disadvantage in that the number of subfields is limited during one frame, which causes a deterioration in image quality.

Accordingly, it is an object of the present invention to provide an apparatus and method for controlling a gradation of a PDP in which two or more discharge cells are divided in a two-electrode opposing discharge type PDP.

Another object of the present invention is to provide a PDP gray scale control apparatus and method for dividing and driving a divided discharge cell to reduce the number of subfields.

Another object of the present invention is to provide a gradation control apparatus and method for a PDP that can increase the number of gradation representations by dividing the divided discharge cells.

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In order to achieve the above object, the gray scale control apparatus of the PDP according to the present invention includes a scan electrode formed on the upper plate, an address electrode formed on the lower plate to face the scan electrode, and an RGB cell formed at a point where the scan electrode and the address electrode cross each other. And a plurality of sub-discharge cells, wherein each of the RGB cells comprises: a scan driver configured to simultaneously apply scan voltages having the same number of sub-discharge cells and having different voltage values to the sub-discharge cells; Wow; And a data driver configured to apply data voltages equal to the number of scan voltages and having different voltage values to the sub discharge cells. The gray scale control method of the PDP according to the present invention includes a scan electrode formed on the upper plate, an address electrode formed on the lower plate to face the scan electrode, and RGB cells formed at a point where the scan electrode and the address electrode intersect, the RGB cells A method of driving a PDP, each of which includes two or more sub discharge cells, comprising: simultaneously applying scan voltages having the same voltage to the sub discharge cells and having different voltages to the sub discharge cells; And applying a data voltage equal to the number of scan voltages and having a different voltage value to the sub discharge cells. Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 9.

5 schematically illustrates a PDP according to an embodiment of the present invention.

Referring to FIG. 5, a discharge cell of a PDP according to an embodiment of the present invention includes scan electrodes S1 to Sm and address electrodes X1 to Xn orthogonal to the scan electrodes S1 to Sm. It has a two-electrode alternating current opposite discharge type structure. In the present invention, in order to increase the number of gray scale expressions, each of the scan electrodes S1 to Sm is divided into two equal parts or more, so that one discharge cell 31 of the related art shown in FIG. 4 is composed of two or more discharge cells. Done. In the case of FIG. 5, one scan electrode S is divided into three (S11, S12, S13,...), And one discharge cell is composed of three sub discharge cells.

As described above, a cell 41 for displaying any one of red, green, and blue is formed at the intersection of the scan electrodes S1 to Sm and the address electrodes X1 to Xn, and one cell ( 41, a sub for displaying one of red, green, and blue of the first divided scan electrode Sm1, the second divided scan electrode Sm2, the third divided scan electrode Sm3, and the address electrode X; Discharge cells are formed. These scan electrodes S1 to Sm are formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrodes X1 to Xn are formed on the lower substrate (not shown). On the lower substrate, partition walls 52 are formed to prevent optical and electrical interference between horizontally and vertically adjacent cells. The partition wall 52 has a well shape; The horizontal partition wall 52A is formed in parallel with the divided scan electrodes Sm1, Sm2, and Sm3, and the vertical partition wall 52B is formed in parallel with the address electrodes X. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate. The two-electrode opposing discharge type PDP configured as described above can increase the number of gray scale expressions by subdividing one discharge cell 41. That is, when one discharge cell 41 is divided into three sub discharge cells, four gray levels can be expressed. As a result, even if the number of two subfields decreases in time, all 256 gray levels can be expressed.

In the case of the present invention, since the number of scan electrode lines S is increased three times, the PDP is driven as shown in FIG. 6 to solve the problem of three times the address time.

Referring to FIG. 6, the driving of the PDP shown in FIG. 5 will be described. In order to realize gradation of an image, the PDP according to the present invention is time-division driven by dividing one frame into several subfields having different emission counts as in FIG. 5. Done. Each subfield includes an initialization period (not shown) for initializing the entire screen or erasing residual wall charges, an address period for selecting a scan electrode line and selecting a cell to be discharged from the selected scan electrode line. It is divided into a sustain period (not shown) that implements gradation according to the number of discharges.

In the initialization period, a reset pulse is applied in the form of a square wave or a ramp pulse to initialize the entire screen. As an example, when the ramp pulse is applied, the rising ramp waveform is simultaneously applied to all the scan electrodes S1 to Sm during the setup period. This rising ramp waveform causes discharge to occur in the cells of the full screen. Due to this setup discharge, positive wall charges are accumulated on the address electrode X, and negative wall charges are accumulated on the scan electrodes S1 to Sm. During the set down period, the rising ramp waveform is supplied, and then the falling ramp waveform falling at the positive voltage lower than the peak voltage of the rising ramp waveform is simultaneously applied to the scan electrodes S1 to Sm. The falling ramp waveform causes some of the overcharged wall charges by causing a slight erase discharge in the cells. This set-down discharge causes the wall charges to be uniformly retained in the cells so that the address discharge can be stably generated.

In the address period shown in FIG. 6, the negative scan pulse SP is sequentially applied to the scan electrodes S1 to Sm, and at the same time, the positive scan pulse SP is positive to the address electrodes X1 to Xn in synchronization with the scan pulse SP. The data pulse DP is applied. In the present invention, the scan electrodes S1 to Sm are composed of a plurality of split scan electrodes Sm1, Sm2, and Sm3, so that the scan pulse SP is simultaneously applied to the split scan electrodes Sm1, Sm2, and Sm3. Is approved. That is, the timings of the scan pulses SPm1, SPm2, and SPm3 applied to the divided scan electrodes Sm1, Sm2, and Sm3 are the same. However, scan voltages V1, V2, and V3 applied to the divided scan electrodes Sm1, Sm2, and Sm3 are different from each other. In the case of FIG. 6, the voltage magnitude has the same magnitude relationship as in Equation 1.

V1> V2> V3

In this case, the voltage relationship may vary depending on the gray scale representation. In addition, data pulses having three voltage levels Vd1, Vd2, and Vd3 are synchronized to the address electrodes X1 to Xn so as to be synchronized with scan voltages V1, V2, and V3 that are simultaneously applied differently to express gray scales. DP) is applied. That is, the address discharge is performed by selecting four data voltages Vd including 0 according to the gray level.

Therefore, when the data pulse Dp having a data voltage of 0 V is selected, all the sub discharge cells are not selected because no address discharge is performed between the data pulse DP and each of the divided scan pulses SP. No display discharge occurs and the display is turned off.

When the low data voltage representing the gray level 1, that is, the first data voltage Vd1 is selected, only the discharge cells including the first divided scan electrode S11, which is a sub discharge cell that receives the highest scan voltage V1, are selected to display discharge. This will happen.

Next, when the second data voltage Vd2 representing the gray level 2 is selected, the sub discharge cells receiving the first and second scan voltages V1 and V2, that is, the first and second divided scan electrodes S11 and S12. Discharge cells including are selected to cause display discharge.

Finally, when the third data voltage Vd3 representing the gray level 3 is selected, all the sub discharge cells applying the first, second, and third scan voltages V1, V2, and V3 are selected to display all of the discharge cells. Will cause a discharge.

When driving the two-electrode opposing discharge type PDP as described above, the number of scan electrode lines increases more than two times, thereby increasing spatial resolution by simultaneously scanning the divided scan electrode lines.

In addition, since a part of the address period is shortened as compared to the ADS method of the prior art, it is possible to save time and to use it in other parts such as the sustain period, thereby reducing power consumption and improving luminous luminance.

FIG. 7 is a diagram schematically illustrating a driving apparatus of the two-electrode alternating current counter discharge type PDP shown in FIG. 5, in which one scan electrode is divided into three.

Referring to FIG. 7, the driving apparatus of the PDP is orthogonal to the divided scan electrode lines Sm1, Sm2, and Sm3 divided into three scan electrode lines S1 to Sm and the scan electrode lines S1 to Sm. A first scan driver 44A for driving the PDP 48 in which the address electrodes X1 to Xn are arranged and the first divided scan electrode lines Sm1 among the divided scan electrode lines Sm1, Sm2, and Sm3. ), A second scan driver 44B for driving the second divided scan electrode lines Sm2, a third scan driver 44B for driving the third divided scan electrode lines Sm3, and An address driver 46 is provided to drive the address electrodes X1 to Xn.

In addition, as described above, sub cells are formed to display one of the red, green, and blue colors of each of the divided scan electrode lines Sm1, Sm2, and Sm3 and the address electrode line X, and to express one gray scale. Three subcells are collected to form one discharge cell 41.

The first scan driver 44A supplies the reset pulse in the initialization period in each subfield to initialize the full screen, and supplies the first scan pulse SPm1 to the first divided scan electrode lines Sm1 in the address period. Done. At this time, the first scan pulse SPm1 is sequentially supplied to the first divided scan electrode lines Sm1 at every subfield or every frame. In addition, the first scan driver 44A supplies sustain pulses in the subfield to cause sustain discharge.

The second scan driver 44B supplies a reset pulse in an initialization period in each subfield to initialize the full screen, and supplies a second scan pulse SPm2 to the second divided scan electrode lines Sm2 in an address period. Done. In this case, the second scan pulse SPm2 is supplied to the first divided scan electrode lines Sm2 sequentially in every subfield or every frame. In addition, the second scan driver 44B supplies sustain pulses in the subfield to cause sustain discharge.

The third scan driver 44C supplies a reset pulse in the initialization period in each subfield to initialize the full screen and supplies the third scan pulse SPm3 to the third divided scan electrode lines Sm3 in the address period. Done. In this case, the third scan pulse SPm3 is supplied to the third divided scan electrode lines Sm3 sequentially in every subfield or every frame. In addition, the third scan driver 44C supplies sustain pulses in the subfield to cause sustain discharge.

Scan pulses applied to the divided scan electrode lines of the panel from the first to third scan drivers 44A to 44C are input at the same timing.

The address driver 46 selects one voltage level among three voltage levels of the address electrode line X to be synchronized with the scan pulses SPm1, SPm2, and SPm3 applied at the same timing, to the data pulse DP. Supply.

FIG. 8 is a view schematically showing another driving device of the two-electrode alternating current opposite discharge type PDP shown in FIG. 5, showing a case where one scan electrode is divided into three. FIG. 9 is a view schematically illustrating an apparatus for supplying different scan voltages to the divided scan electrode lines from the scan driver shown in FIG. 8.

8 and 9, the driving apparatus of the PDP includes the divided scan electrode lines Sm1, Sm2, and Sm3 divided into three scan electrode lines S1 to Sm and the scan electrode lines S1 to Sm. A PDP 48 in which address electrodes X1 to Xn are orthogonal to each other, a three scan driver 50 for supplying different scan voltages to the divided scan electrode lines Sm1, Sm2, and Sm3, and an address; An address driver 46 is provided to drive the electrodes X1 to Xn.

In addition, as described above, sub cells are formed to display one of the red, green, and blue colors of each of the divided scan electrode lines Sm1, Sm2, and Sm3 and the address electrode line X, and to express one gray scale. Three subcells are collected to form one discharge cell 41.

The three-scan driver 50 initializes the full screen by supplying a reset pulse in an initialization period in each subfield, and divides the first to third scan pulses SPm1, SPm2, and SPm3 into first to third divisions in an address period. The scan electrode lines Sm1, Sm2, and Sm3 are simultaneously applied. At this time, the first to third scan pulses SPm1, SPm2, and SPm3 are sequentially supplied to the first to third divided scan electrode lines Sm1, Sm2, and Sm3 at every subfield or every frame. The scan voltages of the first to third scan pulses SPm1, SPm2, and SPm3 are simultaneously input to the scan electrodes of the panel by the switch SW as shown in FIG. 9 so as to have different voltages. In addition, the three scan driver 50 supplies sustain pulses in the subfield to cause sustain discharge.

The address driver 46 selects one voltage level among three voltage levels of the address electrode line X to be synchronized with the scan pulses SPm1, SPm2, and SPm3 applied at the same timing, to the data pulse DP. Supply.

As described above, the subfield is reduced in expressing the same gray level when the PDP is driven. When the reduced subfield area is utilized for sustain discharge of another subfield, higher luminance can be obtained. In addition, when the width of the address pulse is increased due to the reduced subfield area, the driving margin is increased to reduce the jitter problem.

As described above, the gradation control apparatus and method of the PDP according to the present invention arranges the scan electrodes on the upper plate and the address electrodes on the lower plate in a matrix form, divides one scan electrode into two or more, and divides the divided scan electrodes. Scan simultaneously and perform address discharge. Therefore, the gray scale control apparatus and method of the PDP according to the present invention can reduce the number of subfields in representing the same gray scale. As a result, the present invention can obtain high luminance when the time to be reduced in one frame is used for sustain discharge, and further, it is possible to express various gray levels by performing the divided scan driving, thereby improving image quality. It will be appreciated that various changes and modifications can be made without departing from the spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

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1 is a plan view schematically showing an electrode arrangement of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a diagram illustrating a frame configuration of an 8-bit default code for implementing 256 gray levels.

3 is a waveform diagram showing driving waveforms for driving a conventional plasma display panel.

4 is a plan view schematically showing an electrode arrangement of a conventional two-electrode alternating current counter discharge type plasma display panel.

5 is a schematic view of a plasma display panel according to an embodiment of the present invention.

FIG. 6 is a view illustrating waveforms for driving the two-electrode counter discharge plasma display panel shown in FIG. 5.

FIG. 7 is a view schematically showing a driving apparatus of the two-electrode alternating current counter discharge type plasma display panel shown in FIG. 5.

FIG. 8 is a view schematically showing another driving device of the two-electrode alternating current opposite discharge type plasma display panel shown in FIG. 5.

FIG. 9 is a view schematically illustrating an apparatus for supplying different scan voltages to the divided scan electrode lines from the scan driver shown in FIG. 8.

Claims (6)

A scan electrode formed on the upper plate, an address electrode formed on the lower plate so as to face the scan electrode, and RGB cells formed at the intersection of the scan electrode and the address electrode, each of the RGB cells including two or more sub discharge cells; In the plasma display panel, A scan driver which simultaneously applies scan voltages having a different voltage value to the sub discharge cells to be equal to the number of sub discharge cells; And a data driver for applying a data voltage equal to the number of scan voltages and having a different voltage value to the sub-discharge cells. delete delete A scan electrode formed on the upper plate, an address electrode formed on the lower plate so as to face the scan electrode, and RGB cells formed at the intersection of the scan electrode and the address electrode, each of the RGB cells including two or more sub discharge cells; In the method of driving a plasma display panel, Simultaneously applying scan voltages equal to the number of sub discharge cells and having different voltages to the sub discharge cells; And applying a data voltage equal to the number of scan voltages and having a different voltage value to the sub-discharge cells. delete delete