KR100476571B1 - The Multi board using liquid crystal display equipment - Google Patents

The Multi board using liquid crystal display equipment Download PDF

Info

Publication number
KR100476571B1
KR100476571B1 KR10-2002-0017962A KR20020017962A KR100476571B1 KR 100476571 B1 KR100476571 B1 KR 100476571B1 KR 20020017962 A KR20020017962 A KR 20020017962A KR 100476571 B1 KR100476571 B1 KR 100476571B1
Authority
KR
South Korea
Prior art keywords
lcd
signal
input
display board
lcd display
Prior art date
Application number
KR10-2002-0017962A
Other languages
Korean (ko)
Other versions
KR20030004015A (en
Inventor
조건진
Original Assignee
(주)엘포트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주)엘포트 filed Critical (주)엘포트
Priority to KR10-2002-0017962A priority Critical patent/KR100476571B1/en
Publication of KR20030004015A publication Critical patent/KR20030004015A/en
Priority to PCT/KR2003/000651 priority patent/WO2003083808A1/en
Priority to AU2003225358A priority patent/AU2003225358A1/en
Application granted granted Critical
Publication of KR100476571B1 publication Critical patent/KR100476571B1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1431—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using a single graphics controller
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/12—Picture reproducers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0414—Vertical resolution change
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0421—Horizontal resolution change
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005—Adapting incoming signals to the display format of the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal

Abstract

본 발명은 엘씨디 전광판에 관한 것으로, 특히 엘씨디 전광판의 화면 이동시 프레임 스킵 현상을 배제하여 엘씨디 전광판의 품질을 향상시키고, 여러 영상을 동시에 표현함에 있어 영상 시나리오 가능성을 배가 시키며, 엘씨디 전광판의 영상을 표출하기 위한 시스템 구성을 간단화 하여 제조단가의 저렴화를 도모하는 것이다. The present invention relates to an LCD display board, in particular, to improve the quality of the LCD display board by eliminating the frame skipping phenomenon when moving the LCD display board, multiply the possibility of the image scenario in the simultaneous display of multiple images, to display the image of the LCD display board By simplifying the system configuration for the manufacturing cost reduction.

상기 목적을 위한 본 발명은 엘씨디 전광판을 구성하는 각 엘씨디 판넬 내에 화면 콘트롤 회로를 내장하되, NTSC 8채널 입력신호를 멀티 플렉서를 통해 각 엘씨디 판넬의 NTSC입력 단자에 공급하게 하고, 화면 콘트롤 회로를 구성하는 스케일러 내에 더블 버퍼링 기능을 가지는 프레임 저장 인터페이스와 별도의 SDRAM을 구비하여 구성함을 특징으로 한다. The present invention for the above purpose is to incorporate a screen control circuit in each of the LCD panel constituting the LCD display board, and to supply the NTSC 8-channel input signal to the NTSC input terminal of each LCD panel through a multiplexer, the screen control circuit It is characterized by comprising a frame storage interface having a double buffering function and a separate SDRAM in the constituting scaler.

Description

엘씨디 전광판{The Multi board using liquid crystal display equipment}LCD display board {The Multi board using liquid crystal display equipment}

본 발명은 엘씨디 전광판의 화면 이동시 프레임 스킵 현상을 배제하여 엘씨디 전광판의 품질을 향상시키고, 여러 영상을 동시에 표현함에 있어 영상 시나리오 가능성을 배가 시키며, 엘씨디 전광판의 영상을 표출하기 위한 시스템 구성을 간단화하여 제조단가의 저렴화를 도모하도록 하는 엘씨디 전광판에 관한 것이다.The present invention improves the quality of the LCD display board by eliminating the frame skipping phenomenon when the screen of the LCD display screen is moved, doubles the possibility of the image scenario in expressing several images at the same time, and simplifies the system configuration for displaying the image of the LCD display board. The present invention relates to an LCD display board to reduce the manufacturing cost.

일반적으로, 엘씨디 전광판은 실내 또는 실외에서 광고 등을 각 엘씨디 판넬(Cell)을 통해 각기 다른 화면 또는 전광판 전체에 동일한 화면을 동영상으로 표출하여 광고 등의 효과를 극대화 시키고 있다.In general, an LCD display board displays advertisements indoors or outdoors through each LCD panel (Cell) to maximize the effect of the advertisement by displaying the same screen as a video on different screens or the entire display board.

종래, 상기와 같은 엘씨디 전광판(100)은 도1에 도시한 바와 같이, 여러개의 엘씨디 판넬(Cell)(110)을 조합하여 엘씨디 전광판을 구성함에 있어, 각 엘씨디 판넬(110)별 화면을 MVP(멀티비젼 프로세서)(120)에서 분할하고, 나누어진 화면을 A/V매트릭스(130)를 통해 각각의 엘씨디 판넬(110)측으로 전송하는 구성으로 이루어져 있다. Conventionally, the LCD panel 100 as described above, as shown in Figure 1, in the combination of the LCD panel (Cell) 110 to configure the LCD display panel, each LCD panel 110 screen by MVP ( The multi-vision processor 120 is configured to transmit the divided screen to each LCD panel 110 through the A / V matrix 130.

이와 같은 종래의 엘씨디 전광판의 접속구조는 엘씨디 판넬(110)을 그대로 이용하되, 별도의 MVP(120) 및 A/V매트릭스(130)를 구비하여 영상신호를 각각의 엘씨디 판넬(110)에 입력시키는 구성이므로 여러영상을 동시에 표출하는데는 제한성을 가지게 된다. 즉, 전체 영상신호를 MVP(120)에서 받아 각 엘씨디 판넬(110)에 특정화면을 지정하여 표출하는 방법이므로 각 엘씨디 판넬에 표출하고 싶은 부분의 증감에 애로점이 있고, 전광판 전체를 이용하는데 한계성을 가진다. The conventional structure of the LCD display board uses the LCD panel 110 as it is, but is provided with a separate MVP (120) and A / V matrix 130 to input the video signal to each of the LCD panel (110) Because of the configuration, there is a limit to displaying multiple images at the same time. That is, since the entire video signal is received from the MVP 120 and a specific screen is assigned to each LCD panel 110 for display, it is difficult to increase or decrease the portion to be displayed on each LCD panel. Have

또한, 여러 영상을 동시에 표출하거나, 엘씨디 판넬 설치수를 증가시킬 경우에는 고가인 MVP(120)를 더 증설해야 하므로 전광판의 제조원가를 상승 시키는 요인이 지적될 뿐 아니라 엘씨디 판넬(110) 각자가 표현해야될 영역을 확대하거나 축소하여 표출할 수 없어 영상의 시나리오 작업에 매우 어려운점이 지적된다.In addition, when displaying multiple images at the same time or increasing the number of LCD panels installed, the expensive MVP 120 must be further increased, so that the factors that increase the manufacturing cost of the electronic display board are pointed out, and each of the LCD panels 110 must be expressed. It is pointed out that it is very difficult to work with the scenario of the image because the area to be enlarged or reduced cannot be expressed.

특히, 여러 영상기기로부터 입력되는 회선이 그대로 엘씨디 판넬(110)에 접속되는 구조이므로 회선수가 많고, 회선 연결에 복잡성이 있어 작업에 애로점이 지적되며, 엘씨디 판넬 수량이 많을 수록 더욱 회선수가 많아져 엘씨디 전광판이 요구하는 협소한 공간에서의 활용도에 적응 못하는 문제점이 지적되고 있다. In particular, since the lines input from various video devices are connected to the LCD panel 110 as it is, the number of lines is large, and the complexity of the line connection leads to difficulties in the work. It is pointed out that the problem of not adapting to the utilization in the narrow space required by the electronic display board is pointed out.

또한, 먼저 입력된 영상 신호를 처리하는 도중 다음의 영상 신호가 입력되어 먼저 입력된 영상 신호를 처리 못하고 다음 영상신호를 처리하는 경우가 발생되어 소위, 프레임 스킵 현상이 빈번하게 발생된다. 즉, 표출되는 그림이 이동될때 그림이 찢어지는 현상이 발생되어 엘씨디 전광판의 화면 품질을 크게 저하시키는 문제점이 지적된다. In addition, during the processing of the first input video signal, the next video signal is input to process the next video signal without processing the first input video signal, so that a so-called frame skipping phenomenon frequently occurs. In other words, it is pointed out that the picture is torn when the displayed picture is moved, which greatly reduces the screen quality of the LCD display board.

본 발명은 엘씨디 전광판의 접속 구성을 간단화하여 엘씨디 전광판의 제조원가의 저렴화를 도모하고, 엘씨디 전광판을 구성하는 각 엘씨디 판넬이 영상신호를 각각 전송시켜 엘씨디 판넬 각각이 표출하고 싶은 부분의 증감을 도모하게 하므로서 화면 편집의 편리성을 제공하며, 프레임 스킵 현상을 배제하여 전광판의 품질을 크게 향상시킴을 기술적 과제로 삼는다. The present invention simplifies the connection configuration of the LCD display board to reduce the manufacturing cost of the LCD display board, and each LCD panel constituting the LCD display board transmits a video signal, so that each of the LCD panels can increase or decrease the portion to be expressed. Therefore, the technical task is to provide convenience of screen editing and to greatly improve the quality of the display board by eliminating the frame skipping phenomenon.

상기 과제를 달성하기 위한 본 발명은 엘씨디 전광판을 구성하는 각 엘씨디 판넬내에 화면 콘트롤 회로를 내장하되, NTSC 8채널 입력신호를 멀티플렉서를 통해 각 엘씨디 판넬의 NTSC 입력단자에 공급하게 하고, 화면 콘트롤 회로를 구성하는 스케일러내에 더블 버퍼링 기능을 가지는 프레임 저장 인터페이스와 별도의 SDRAM을 구비하여 그성함을 특징으로 한다.In order to achieve the above object, the present invention incorporates a screen control circuit in each LCD panel constituting the LCD display panel, and supplies an NTSC 8-channel input signal to the NTSC input terminal of each LCD panel through a multiplexer. It is characterized by having a frame storage interface having a double buffering function and a separate SDRAM in the constituting scaler.

도 2는 본 발명의 전체 개략 구성도이고, 도 3은 본 발명의 구체적인 접속 구성도로서, 엘씨디 전광판(10) 내에 구비된 멀티플렉서(20)에 영상기기(30)로부터의 영상신호(NTSC/PAL8채널 방식)를 입력시켜 각각의 엘씨디 판넬(11)에 내장된 화면 콘트롤 회로(40)의 NTSC단자(41) 각각에 연결하고, 상기 화면 콘트롤 회로(40)를 구성하는 스케일러(40-1)내에 더블 버퍼링 기능을 가지는 프레임 저장 인터페이스(Fram Store Interface)(401)와 별도의 SDRAM(402)을 구비하여 구성한 것이다. 2 is an overall schematic configuration diagram of the present invention, and FIG. 3 is a detailed connection configuration diagram of the present invention, in which a multiplexer 20 provided in the LCD display panel 10 is used to output a video signal from the video device 30 (NTSC / PAL8). Channel type) to be connected to each of the NTSC terminals 41 of the screen control circuit 40 embedded in each LCD panel 11, and in the scaler 40-1 constituting the screen control circuit 40. A frame store interface 401 having a double buffering function and a separate SDRAM 402 are provided.

상기에 있어, 엘씨디 전광판(10) 내에는 RGB 분배기(50)가 설치되어 영상제어 컴퓨터(60)로 부터의 RGB 신호와 RS232 포트를 통한 통신신호를 받아 후술하는 메인보드(40A)에 분배하게 된다. In the above, the RGB splitter 50 is installed in the LCD display board 10 to receive the RGB signal from the image control computer 60 and the communication signal through the RS232 port to distribute to the motherboard 40A to be described later. .

그리고, 엘씨디 판넬(11)은 엘씨디 판넬 프레임 전면에 설치된 글라스(12)와 미도시한 백라이트 및 화면 콘트롤 회로(40)를 구성하는 메인 보드(40A) 및 인버터(70)가 내장되며, 상기 메인보드(40A)에는 NTSC 단자(41), RGB 신호 입출력 단자(42), RS232 입출력 단자(43), 전원 입력 단자(44) 및 딥 스위치(45)가 구비된다. 상기에 있어서, 인버터(70)는 DC12V를 AC600V로 변환시켜 미도시한 백라이트를 점등 시키게 되며, 인버터(70)와 메인보드(40A) 사이의 연결선은 전원선 및 백라이트 온/오프 제어선이다. 도면 중 80은 액정 콘넥터이다.In addition, the LCD panel 11 includes a main board 40A and an inverter 70 constituting the glass 12 installed on the front of the LCD panel frame and a backlight and screen control circuit 40 not shown. The 40A is provided with an NTSC terminal 41, an RGB signal input / output terminal 42, an RS232 input / output terminal 43, a power input terminal 44, and a dip switch 45. In the above, the inverter 70 converts DC12V into AC600V to turn on a backlight (not shown), and the connection line between the inverter 70 and the main board 40A is a power line and a backlight on / off control line. 80 in the figure is a liquid crystal connector.

도 5는 본 발명의 메인보드(40A)내의 화면 콘트롤 회로(40)의 블록도로서, 멀티플렉서(20)에 연결된 RGB 변환기(40-2)와, RGB 분배기(50)에 연결된 아나로그 RGB 회로부(40-3)를 마이크로 콘트롤러(40-4)에 의해 제어되는 스위치부(40-5)에 각각 연결하여 줌 스케일러(zoom scaler)(40-1)에 입력시키고, 상기 스케일러(40-1)의 출력단에 연결된 인터페이스(40-6)를 통해 엘씨디판넬(11)의 TFT 엘씨디(11')에 영상 신호를 전송하게 구성한다.FIG. 5 is a block diagram of the screen control circuit 40 in the main board 40A of the present invention, wherein the RGB converter 40-2 connected to the multiplexer 20 and the analog RGB circuit section connected to the RGB divider 50 ( 40-3 are connected to a switch unit 40-5 controlled by the microcontroller 40-4, respectively, and input to a zoom scaler 40-1. It is configured to transmit an image signal to the TFT LCD 11 'of the LCD panel 11 through the interface 40-6 connected to the output terminal.

상기 도면 중 40-7은 RS232 입력포트와 연결된 콘트롤 포트, 40-8은 버퍼, 40-9는 키패드이다.40-7 is a control port connected to an RS232 input port, 40-8 is a buffer, and 40-9 is a keypad.

상기 구성 중, 스위치부(40-5)는 마이크로 콘트롤러(40-4)의 제어에 의해 NTSC측 입력신호와 RGB 신호입력중 어느 하나를 선택하게 하여 스케일러(40-1)에 입력하게되며, 스케일러(40-1)는 줌 인/아웃 기능 및 프레임 비율 변환 기능을 가진다.In the above configuration, the switch unit 40-5 selects one of the NTSC input signal and the RGB signal input under the control of the microcontroller 40-4, and inputs it to the scaler 40-1. 40-1 has a zoom in / out function and a frame rate conversion function.

도 6은 도 5의 스케일러(40-1)의 상세 회로도로서, 스위치부(40-5)와 연결된 트리플 A/D컨버터(403)와, 상기 A/D컨버터(403)에 의해 변환된 디지털 신호를 이미지 캡쳐(404) 및 명암대비 밝기조절 회로(405)를 통해 프레임 비율 변환기(406)에 입력 시키되, 더블 버퍼링 기능을 가지는 프레임 저장 인터페이스(401)에 신호를 보내 SDRAM(402)에 일시 저장하고, 마이크로 프로세서(407)의 제어에 의해 상기 신호를 줄이고 늘리는 필터(408)를 통해 필터링하여 디스플레이 콘트롤 블록(409)으로 전송되게 구성한다.FIG. 6 is a detailed circuit diagram of the scaler 40-1 of FIG. 5. The triple A / D converter 403 connected to the switch unit 40-5 and the digital signal converted by the A / D converter 403 are shown in FIG. Input to the frame rate converter 406 through the image capture 404 and contrast control circuit 405, and sends a signal to the frame storage interface 401 having a double buffering function to temporarily store it in the SDRAM 402. In response to the control of the microprocessor 407, the signal is reduced and increased through a filter 408 to be transmitted to the display control block 409.

도면 중 410은 호스트 인터페이스이다.In the figure, 410 is a host interface.

상기에 있어서, 스케일러(40-1)는 더블 버퍼링 기능을 가지는 프레임저장 인터페이스(401)와, 이에 연결되는 SDRAM(402)을 구비하게 되므로, 먼저 입력된 영상신호를 완전히 처리한다음 다음 입력된 영상 신호를 처리하게 되어 화면상 그림이 이동될 때 찢어지는 현상을 배제하게 된다.In the above description, since the scaler 40-1 includes a frame storage interface 401 having a double buffering function and an SDRAM 402 connected thereto, the scaler 40-1 completely processes the first input image signal and then inputs the next input image. The signal is processed to eliminate tearing when the picture on the screen is moved.

이와같이 구성된 본 발명은 엘씨디 전광판(10)내에 멀티플렉서(20) 및 RGB 분배기(50)를 내장하고, 엘씨디판넬(11) 내부에 화면 콘트롤 회로(40)가 내장된 메인보드(40A)를 결합시키는 접속구조 이므로 엘씨디전광판(10) 외부에 영상입력 및 처리를 위한 시스템 구성이 매우 간단해지고, 멀티플렉서(20) 및 RGB분배기(50)와 메인보드(40A)에 형성된 각 단자와를 리드선으로 연결하는 수단을 제공하게 되므로 외부 영상기기로부터 각 엘씨디판넬(11)에 전송하는 케이블 회선수를 크게 줄일수 있게 되어 연결작업의 간단성 및 작업의 편리성을 제공하게된다.According to the present invention configured as described above, the multiplexer 20 and the RGB divider 50 are built in the LCD display panel 10 and the connection for coupling the main board 40A having the screen control circuit 40 inside the LCD panel 11 is coupled. Since the structure of the system for image input and processing outside the LCD panel 10 becomes very simple, the means for connecting the multiplexer 20, the RGB distributor 50, and the terminals formed on the main board 40A with lead wires is provided. Since it is possible to greatly reduce the number of cable lines transmitted from the external video device to each LCD panel 11 to provide the simplicity and convenience of the connection operation.

그리고, 상술한 바와 같이 각각의 엘씨디판넬(11) 내부에 화면 콘트롤 회로(40)가 내장된 메인보드(40A)를 구비하고 있어 각 영상기기로부터 입력되는 영상 신호를 각각의 엘씨디판넬(11)의 화면 콘트롤 회로(40)에 전송할 수 있어 각 엘씨디판넬(11)이 표현하고 싶은 부분을 자유롭게 제어할 수 있게된다.As described above, each of the LCD panels 11 includes a main board 40A in which the screen control circuit 40 is built in, so that the video signals input from the respective video devices can be inputted to each of the LCD panels 11. Transmission to the screen control circuit 40 allows each LCD panel 11 to freely control the portion to be expressed.

즉, 종전에는 전체 영상을 MVP에서 받은다음 각각의 엘씨디판넬에 특정부분을 지정해서 화면을 표출하는 제어방식이나, 본 발명은 엘씨디판넬(11) 각각이 표현해야될 영역을 확대하거나 줄이게하여 표출할 수 있게된다.That is, in the past, a control method of displaying a screen by designating a specific portion of each LCD panel after receiving the entire image from the MVP, but the present invention can be displayed by enlarging or reducing the area to be expressed by each of the LCD panel (11). Will be.

이와같은 작용은 본 발명의 화면 콘트롤 회로(40)내에 스케일러(40-1)를 구비하고 있어 영상신호의 줌 인/아웃 및 프레임 비율 변환 제어가 이루어지게 되어 가능한 것이다.Such a function is provided by the scaler 40-1 in the screen control circuit 40 of the present invention, which enables zoom in / out of the video signal and frame rate conversion control.

특히, 본 발명은 스케일러(40-1)내에 더블버퍼링 기능을 가지는 프레임 저장 인터페이스(401) 및 이와 연결된 SDRAM(402)을 구비하고 있어, 입력되는 영상신호를 두 번에 걸쳐 버퍼링하게 되므로 먼저 입력된 영상신호를 처리하되, 다음 입력되는 영상신호를 일시저장한 상태에서 처음 입력된 영상신호를 처리하고, 다음의 영상신호를 처리하게 된다. 따라서, 화면상 그림이 이동할 때 찢어지는 현상(그림과 그림이 어긋나게 되는 프레임 스킵현상)을 배제하게 되는 것이다. In particular, the present invention includes a frame storage interface 401 having a double buffering function and an SDRAM 402 connected thereto in the scaler 40-1, so that the input image signal is buffered twice. The video signal is processed, but the first input video signal is processed while the next input video signal is temporarily stored, and the next video signal is processed. Therefore, the phenomenon of tearing when the picture moves on the screen (frame skipping phenomenon where the picture is displaced) is excluded.

본 발명은 영상신호의 줌 기능 등을 구비한 화면 콘트롤 회로가 내장된 메인보드를 엘씨디판넬에 구비하여 엘씨디전광판 내부에 장착하고, 엘씨디 전광판을 구성하는 전체 프레임 내부에 멀티플렉서 및 RGB 분배기를 내장하여 영상 표출을 위한 각 구성을 콤펙트화 하므로서 엘씨디전광판 전체 구성의 간단화를 도모하고, 고가인 MVP의 사용을 배제하므로서 각 영상기기와의 연결 회선수를 대폭줄여 엘씨디전광판의 제조원가를 크게 줄임과 동시에 회선연결 작업의 편리성을 제공하게된다.According to the present invention, a main board having a built-in screen control circuit including a zoom function of a video signal is mounted on an LCD panel and mounted inside an LCD panel, and a multiplexer and an RGB splitter are built in an entire frame constituting the LCD panel. By making each component compact for display, the overall configuration of the LCD panel is simplified, and the use of expensive MVPs is greatly reduced, thereby greatly reducing the number of connection lines with each video device and greatly reducing the manufacturing cost of the LCD panel. Will provide convenience of operation.

특히, 본 발명은 각각의 엘씨디판넬이 각각의 영상신호를 각각 받아 처리하되, 영상의 줌(zoom) 및 줌인(zoom in)기능을 각각의 엘씨디판넬이 자유롭게 조정하게 되므로 각각의 엘씨디판넬이 표현하고자하는 영상부분을 스스로 선택하여 포출할 수 있게되어 영상 시나리오 편집에 매우 효과적이고, 프레임 스킵현상이 없어 엘씨디 전광판에 표출되는 영상의 품질이 고급화되는 효과를 가진다Particularly, in the present invention, each LCD panel receives and processes each image signal, but each LCD panel is free to adjust the zoom and zoom in functions of the image. It is very effective for editing video scenarios because it can select and export the video part by itself and has the effect of enhancing the quality of the image displayed on the LCD display board because there is no frame skip phenomenon.

도 1은 종래 엘씨디 전광판의 전체 구성도1 is an overall configuration diagram of a conventional LCD display board

도 2는 본 발명인 엘씨디 전광판의 전체구성도Figure 2 is an overall configuration of the present invention LCD display board

도 3은 본 발명인 엘씨디 전광판의 전체 접속 구성도3 is an overall connection configuration of the present invention LCD display board

도 4는 본 발명의 엘씨디 판넬 구성도Figure 4 is a LCD panel configuration of the present invention

도 5는 본 발명에 적용되는 화면 콘트롤 회로 블럭도5 is a block diagram of a screen control circuit applied to the present invention;

도 6은 본 발명의 스케일러 칩 상세 회로도6 is a detailed circuit diagram of a scaler chip of the present invention.

<도면의 주요 부분에 대한 부호 설명><Description of the symbols for the main parts of the drawings>

10 : 엘씨디 전광판 20 : 멀티 플렉서10: LCD Display Board 20: Multiplexer

30 : 영상기기 40 : 화면 콘트롤 회로 30: video device 40: screen control circuit

40-1 : 스케일러 40-2 : RGB 변환기40-1: Scaler 40-2: RGB Converter

40-4 : 마이크로 콘트롤러 40-5 : 스위치부40-4: micro controller 40-5: switch unit

40A : 메인 보드 41 : NTSC 단자 40A: Main board 41: NTSC terminal

42 : RGB 신호 입출력 단자 43 : RS232 입출력 단자 42: RGB signal input and output terminal 43: RS232 input and output terminal

50 : RGB 분배기 70 : 인버터 50: RGB Splitter 70: Inverter

401 : 프레임 저장 인터 페이스 402 : SDRAM 401: frame storage interface 402: SDRAM

Claims (2)

엘씨디 전광판(10)내에 구비된 멀티플렉서(20)에 영상기기(30)로 부터의 영상신호를 입력시키는 각각의 엘씨디판넬(11)에 별도 구비된 영상기기(30)의 영상신호(NTSC/PAL 8채널 방식)를 멀티플렉서(20)가 각각의 엘씨디 판넬(11)에 내장된 화면 콘트롤 회로(40)의 NTSC단자(41)에 공급하도록 된 엘씨디전광판(10)에 있어서, 상기 화면 콘트롤 회로(40)를 먼저 입력된 영상신호를 처리하고 다음 입력되는 영상신호를 일시 저장 후 다음에 연속적으로 영상신호를 처리할 수 있도록 프레임 저장 인터페이스(401) 및 SDRAM(402)과, 마이크로 콘트롤러(40-4)의 제어에 의해 NTSC측 입력신호와 RGB측 신호입력 중 어느 하나를 선택하게 하여 스케일러(40-1)에 입력시키도록 된 스위치부(40-5)와 연결된 트리플 A/D컨버터(403)와, 상기 A/D컨버터(403)에 의해 변환된 디지털 신호를 이미지 캡쳐(404) 및 명암대비 밝기조절 회로(405)를 통해 프레임 비율변환기(406)에 입력시키되, 더블 버퍼링 기능을 가지는 프레임 저장 인터페이스(401)에 신호를 보내 SDRAM(402)에 일시 저장하고, 마이크로 프로세서(407)의 제어에 의해 상기 신호를 줄이고 늘리는 필터(408)를 통해 필터링시켜 디스플레이 콘트롤 블록(409)으로 전송시키도록 스케일러(40-1)를 구성하고, 멀티플렉서(20)에 RGB 변환기(40-2)를 연결시키고, RGB 분배기(50)에 연결된 아나로그 RGB 회로부(40-3)를 마이크로 콘트롤러(40-4)에 의해 제어되는 스위치부(40-5)에 각각 연결시켜 스케일러(40-1)에 입력시키고, 상기 스케일러(40-1)의 출력단에 연결된 인터페이스(40-6)를 통해 엘씨디판넬(11)의 TFT 엘씨디(11')에 영상 신호를 전송시키도록 구성하여서 됨을 특징으로 하는 엘씨디 전광판.Image signal of NTSC / PAL 8 separately provided in each LCD panel 11 for inputting a video signal from the video device 30 to the multiplexer 20 provided in the LCD display board 10. In the LCD display panel 10, the multiplexer 20 is supplied to the NTSC terminal 41 of the screen control circuit 40 built in each LCD panel 11, the screen control circuit 40 Of the frame storage interface 401 and the SDRAM 402 and the microcontroller 40-4 so as to process the first input video signal, temporarily store the next input video signal, and then process the next video signal continuously. A triple A / D converter 403 connected to the switch unit 40-5 configured to select one of the NTSC side signal and the RGB side signal input by the control to be input to the scaler 40-1; Image capture (40) of the digital signal converted by the A / D converter (403) 4) and the contrast contrast control circuit 405 to the frame rate converter 406, and sends a signal to the frame storage interface 401 having a double buffering function to temporarily store in the SDRAM 402, the microprocessor ( The scaler 40-1 is configured to filter through the filter 408 which reduces and increases the signal by the control of 407 and transmits it to the display control block 409, and the RGB converter 40-2 to the multiplexer 20. ), And the analog RGB circuitry 40-3 connected to the RGB divider 50 is connected to the switch portion 40-5, which is controlled by the microcontroller 40-4, respectively to scaler 40-1. LCD display board, characterized in that configured to transmit the video signal to the TFT LCD 11 'of the LCD panel 11 through the interface (40-6) connected to the output terminal of the scaler (40-1) . 1항에 있어서, 엘씨디판넬(11)은 화면 콘트롤 회로(40)를 구성하는 메인보드(40A)를 구비하며, 상기 메인보드(40A)에는 NTSC단자(41), RGB신호 입출력 단자(42), RS232 입출력 단자(43), 전원 입력 단자(44) 및 딥 스위치(45)를 구비함을 특징으로 하는 엘씨디 전광판 The LCD panel 11 includes a main board 40A constituting the screen control circuit 40. The main board 40A includes an NTSC terminal 41, an RGB signal input / output terminal 42, LCD display board, comprising RS232 input / output terminal 43, power input terminal 44, and dip switch 45
KR10-2002-0017962A 2002-04-02 2002-04-02 The Multi board using liquid crystal display equipment KR100476571B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR10-2002-0017962A KR100476571B1 (en) 2002-04-02 2002-04-02 The Multi board using liquid crystal display equipment
PCT/KR2003/000651 WO2003083808A1 (en) 2002-04-02 2003-04-01 A multi board system using liquid crystal display
AU2003225358A AU2003225358A1 (en) 2002-04-02 2003-04-01 A multi board system using liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0017962A KR100476571B1 (en) 2002-04-02 2002-04-02 The Multi board using liquid crystal display equipment

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR2020020011234U Division KR200294656Y1 (en) 2002-04-15 2002-04-15 The Multi board using liquid crystal display equipment

Publications (2)

Publication Number Publication Date
KR20030004015A KR20030004015A (en) 2003-01-14
KR100476571B1 true KR100476571B1 (en) 2005-03-17

Family

ID=27725945

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2002-0017962A KR100476571B1 (en) 2002-04-02 2002-04-02 The Multi board using liquid crystal display equipment

Country Status (3)

Country Link
KR (1) KR100476571B1 (en)
AU (1) AU2003225358A1 (en)
WO (1) WO2003083808A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101958840B1 (en) 2018-08-16 2019-03-19 디아이디시스템 주식회사 System of Display Board For Outputting Information
KR102041537B1 (en) 2019-05-24 2019-11-07 디아이디시스템 주식회사 System That Controls Power Supplied To The Electric Signboard Depend On The Object Detection

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02213033A (en) * 1989-02-14 1990-08-24 Matsushita Electric Ind Co Ltd Image display device
JPH05145866A (en) * 1991-11-19 1993-06-11 Sanyo Electric Co Ltd Multi screen display device
JPH05191754A (en) * 1992-01-08 1993-07-30 Hitachi Ltd Multi-screen system
JPH0968687A (en) * 1995-08-31 1997-03-11 Sanyo Electric Co Ltd Liquid crystal display device
JPH10133167A (en) * 1996-10-31 1998-05-22 Optrex Corp Liquid crystal display module
JPH10161612A (en) * 1996-12-05 1998-06-19 Sony Corp Multiple image plane liquid crystal display unit
KR200257295Y1 (en) * 2001-09-29 2001-12-29 황정현 Multi functional image processor made by one board

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940004397B1 (en) * 1991-04-16 1994-05-25 주식회사 크로스엔지니어링 Led electric board system
JPH0856322A (en) * 1994-08-12 1996-02-27 Matsushita Electric Ind Co Ltd Liquid crystal display device
JPH08275092A (en) * 1995-03-31 1996-10-18 Matsushita Electric Ind Co Ltd Image display device
KR19980065862A (en) * 1997-01-15 1998-10-15 김광호 Apparatus for displaying image signal according to multi color system on LCD panel for NTSC
KR200180538Y1 (en) * 1999-11-23 2000-05-01 주식회사광인기업 Display apparatus for moving picture advertisement using tft-lcd

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02213033A (en) * 1989-02-14 1990-08-24 Matsushita Electric Ind Co Ltd Image display device
JPH05145866A (en) * 1991-11-19 1993-06-11 Sanyo Electric Co Ltd Multi screen display device
JPH05191754A (en) * 1992-01-08 1993-07-30 Hitachi Ltd Multi-screen system
JPH0968687A (en) * 1995-08-31 1997-03-11 Sanyo Electric Co Ltd Liquid crystal display device
JPH10133167A (en) * 1996-10-31 1998-05-22 Optrex Corp Liquid crystal display module
JPH10161612A (en) * 1996-12-05 1998-06-19 Sony Corp Multiple image plane liquid crystal display unit
KR200257295Y1 (en) * 2001-09-29 2001-12-29 황정현 Multi functional image processor made by one board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101958840B1 (en) 2018-08-16 2019-03-19 디아이디시스템 주식회사 System of Display Board For Outputting Information
KR102041537B1 (en) 2019-05-24 2019-11-07 디아이디시스템 주식회사 System That Controls Power Supplied To The Electric Signboard Depend On The Object Detection

Also Published As

Publication number Publication date
WO2003083808A1 (en) 2003-10-09
KR20030004015A (en) 2003-01-14
AU2003225358A1 (en) 2003-10-13

Similar Documents

Publication Publication Date Title
US8552952B2 (en) Display drive control circuit
CN109830204B (en) Time schedule controller, display driving method and display device
TWI471850B (en) Image display apparatus and electronic apparatus
CN102097050B (en) A kind of apparatus and method realizing display seamless switching
US20090213033A1 (en) Timing controller for reducing power consumption and display device having the same
US20070159444A1 (en) Display Array of Display Panel
EP0918278B1 (en) Circuit for simultaneous driving of liquid crystal display panel and television
CN105657291A (en) Video controller
US20080068323A1 (en) Integrated display panel
KR100476571B1 (en) The Multi board using liquid crystal display equipment
KR100556513B1 (en) Multi display apparatus with display control circuit for removing an afterimage of sub display and multi display control method for the same
KR200294656Y1 (en) The Multi board using liquid crystal display equipment
CN113903287B (en) Display driving board
US20070236566A1 (en) Liquid crystal display having matrix-converting circuit and method of transmitting signals therein
US6574684B1 (en) Monitor comprising two-way interface
CN204377068U (en) A kind of touch display unit of changeable broadcasting ultra high-definition image
JP2002313092A (en) Shift register, electrooptical device, driving circuit and electronic equipment
CN212461112U (en) Liquid crystal display chip
CN213339619U (en) Multi-screen display driving device
KR101151798B1 (en) Display Device and Driving Method Thereof
CN1170235C (en) Personal digital assistant device
KR200210747Y1 (en) Lcd monitor type integration having a split screen
KR100362423B1 (en) Lcd monitor type integration having a split screen
KR200249708Y1 (en) Digital display
CN114968151A (en) Multi-screen display system

Legal Events

Date Code Title Description
A201 Request for examination
G15R Request for early opening
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
O035 Opposition [patent]: request for opposition
O132 Decision on opposition [patent]
O074 Maintenance of registration after opposition [patent]: final registration of opposition
FPAY Annual fee payment

Payment date: 20110304

Year of fee payment: 7

LAPS Lapse due to unpaid annual fee