KR100456817B1 - Substrate for manufacturing semiconductor package and method for manufacturing semiconductor package using the substrate - Google Patents
Substrate for manufacturing semiconductor package and method for manufacturing semiconductor package using the substrate Download PDFInfo
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- KR100456817B1 KR100456817B1 KR10-2000-0032435A KR20000032435A KR100456817B1 KR 100456817 B1 KR100456817 B1 KR 100456817B1 KR 20000032435 A KR20000032435 A KR 20000032435A KR 100456817 B1 KR100456817 B1 KR 100456817B1
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- semiconductor package
- molding
- manufacturing
- region
- resin
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 54
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 title claims 3
- 238000000465 moulding Methods 0.000 claims abstract description 36
- 239000011347 resin Substances 0.000 claims abstract description 23
- 229920005989 resin Polymers 0.000 claims abstract description 23
- 230000000149 penetrating effect Effects 0.000 claims 1
- 238000005452 bending Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
본 발명은 반도체 패키지 제조용 부재와 이것을 이용한 반도체 패키지 제조방법에 관한 것으로서, 몰딩영역에 슬롯홀을 형성한 구조의 반도체 패키지 제조용 부재와; 몰딩공정시 상기 부재에 형성된 슬롯홀을 따라 부재의 저면까지 수지가 채워지게 함으로써, 부재의 저면에 몰딩된 수지가 부재의 자체 유연성을 흡수하며 강성을 유지하는 역할을 할 수 있도록 한 반도체 패키지 제조방법을 제공하고자 한 것이다.The present invention relates to a semiconductor package manufacturing member and a semiconductor package manufacturing method using the same, comprising: a semiconductor package manufacturing member having a structure in which a slot hole is formed in a molding region; A method of manufacturing a semiconductor package in which a resin is filled to the bottom of the member along the slot hole formed in the member during the molding process, so that the resin molded on the bottom of the member absorbs its own flexibility and maintains rigidity. It is intended to provide.
Description
본 발명은 반도체 패키지 제조용 부재와 이것을 이용한 반도체 패키지 제조방법에 관한 것으로서, 더욱 상세하게는 얇은 반도체 패키지 제조용 부재가 공정간에 휘어지는 등의 여러 외부적인 손상 요인을 받음에 따라, 결국 반도체 패키지의 불량을 유발하는 바, 이를 방지하기 위하여 몰딩공정과 동시에 부재의 저면에 강성수지부가 형성되도록 한 구조의 반도체 패키지 부재와 이것을 이용한 반도체 패키지 제조방법에 관한 것이다.The present invention relates to a member for manufacturing a semiconductor package and a method for manufacturing a semiconductor package using the same. More particularly, as the member for manufacturing a thin semiconductor package is subjected to various external damage factors such as bending between processes, the semiconductor package is defective. In order to prevent this, the present invention relates to a semiconductor package member having a structure in which a rigid resin portion is formed on a bottom surface of a member and a method of manufacturing a semiconductor package using the same in a molding process.
통상적으로, 각종 전자기기의 집약적 발달과 고집적화, 소형화, 고기능화의 추세에 병행하여, 칩탑재판의 저면이 외부로 노출되어 열방출 효과를 극대화시킨 구조의 EP(Exposed pad) 반도체 패키지, 솔더볼과 같은 인출단자를 갖도록 인쇄회로기판 부재를 이용한 반도체 패키지, 회로필름등의 부재를 이용한 반도체 패키지등 다양한 종류의 반도체 패키지가 경박단소화로 개발되어 왔고, 개발중에 있다.In general, in parallel with the trend of intensive development, high integration, miniaturization, and high functionality of various electronic devices, the bottom surface of the chip mounting board is exposed to the outside to maximize the heat dissipation effect. Various kinds of semiconductor packages, such as semiconductor packages using printed circuit board members and semiconductor packages using members such as circuit films, have been developed in light and short size and short in order to have lead-out terminals.
특히, 상기 반도체 패키지 제조를 위한 부재중에 그 두께가 매우 얇아 자중이나 외부요인에 의하여 충격을 받으면 쉽게 휘어지는 부재등도 있다.In particular, some of the members for manufacturing the semiconductor package is very thin and may be easily bent when subjected to impact by its own weight or external factors.
이렇게 얇은 부재를 사용하여 반도체 패키지를 제조하는 공정에서 다음과 같은 문제점이 발생하였다.The following problems occurred in the process of manufacturing a semiconductor package using such a thin member.
대개 반도체 패키지는 부재의 칩탑재영역에 반도체 칩이 실장되고, 반도체 칩의 본딩패드와 부재의 패턴화된 와이어 본딩영역간에 와이어 본딩이 된 후, 상기칩을 포함하는 부재의 상면을 수지로 몰딩하여 달성되는 바, 상기 부재가 얇기 때문에 부재 자체의 유연성에 의하여 휘어지게 되고, 더욱이 부재와 몰딩수지간의 열팽창계수로 인하여 부재가 더욱 휘어져, 몰딩수지와 부재간의 결합력이 떨어지는등 반도체 패키지의 불량을 초래하였다.In general, a semiconductor package includes a semiconductor chip mounted in a chip mounting region of a member, wire bonding between a bonding pad of the semiconductor chip and a patterned wire bonding region of the member, and then molding the upper surface of the member including the chip by resin. As a result, since the member is thin, the member is bent due to the flexibility of the member itself, and further, the member is bent due to the coefficient of thermal expansion between the member and the molding resin, resulting in a failure of the semiconductor package, such as a decrease in the bonding force between the molding resin and the member. .
좀 더 상세하게는, 몰딩공정후에 부재의 저면에 형성된 볼랜드에 솔더볼과 같은 인출단자를 부착하는 공정을 진행하는 바, 이때 부재가 휘어진 상태이기 때문에 인출단자의 부착이 제대로 이루어지지 않고, 마킹공정에 있어서도 부재가 휘어진 상태이기 때문에 제위치로 고정되지 못하여 마킹이 제대로 이루어지지 않으며, 심지어는 낱개의 반도체 패키지로 소잉하는 공정에서도 정확한 소잉이 되지 않는 문제점을 야기시켰다.More specifically, after the molding process, a process of attaching a lead-out terminal, such as solder balls, to a ball land formed on the bottom surface of the member is performed. At this time, since the member is bent, attachment of the lead-out terminal is not properly performed. Even though the member is bent, it is not fixed in place and marking is not performed properly, and even a process of sawing into individual semiconductor packages does not cause accurate sawing.
또한, 상기 부재는 기존의 메탈이나 두꺼운 부재에 비하여 상당히 얇기 때문에 외부적 충격에도 손상을 입는 바, 각 공정의 기기에서 잼밍(Jamming)이 일어나는 단점이 있었다.In addition, since the member is considerably thinner than the existing metal or thick member, it is also damaged by an external impact, and has a disadvantage in that jamming occurs in the apparatus of each process.
한편, 상기와 같이 얇은 부재 이외에도 다소 부재가 두껍더라도 면적이 넓은 부재인 경우에도 두께 대비 면적이 큼에 따라 휘어지는 정도가 얇은 부재와 유사하여 상술한 문제점이 야기되었다.On the other hand, in addition to the thin member as described above, even if the member is a little thick, even in the case of a large area, the degree of warpage is similar to the thin member with a large area to thickness, causing the above-mentioned problems.
이에따라, 상기 얇은 부재의 출렁거림과 같은 자체 유연성을 방지하고자 부재를 수납하여 다룰 수 있는 캐리어를 사용하였는 바, 오히려 캐리어의 제작비용과 추가적인 공정이 발생하는 단점이 있었다.Accordingly, in order to prevent self-flexibility, such as the slackness of the thin member, a carrier that can accommodate and handle the member was used. Rather, there was a disadvantage in that the manufacturing cost and additional process of the carrier occurred.
따라서, 본 발명은 상기와 같은 문제점을 해결하고자 반도체 패키지 제조용 부재의 몰딩영역 또는 몰딩영역밖에 슬롯홀을 형성한 구조의 반도체 패키지 제조용 부재와; 몰딩공정시 상기 부재에 형성된 슬롯홀을 따라 부재의 저면까지 수지가 채워지게 함으로써, 부재의 저면에 몰딩된 수지가 부재의 자체 유연성을 흡수하며 강성을 유지하는 역할을 할 수 있도록 한 반도체 패키지 제조방법을 제공하는데 그 목적이 있다.Accordingly, the present invention provides a semiconductor package manufacturing member having a structure in which a slot hole is formed outside the molding region or the molding region of the semiconductor package manufacturing member to solve the above problems; A method of manufacturing a semiconductor package in which a resin is filled to the bottom of the member along the slot hole formed in the member during the molding process, so that the resin molded on the bottom of the member absorbs its own flexibility and maintains rigidity. The purpose is to provide.
도 1은 본 발명에 따른 반도체 패키지 부재를 나타내는 사시도,1 is a perspective view showing a semiconductor package member according to the present invention,
도 2는 본 발명에 따른 반도체 패키지 부재를 사용하여 제조된 반도체 패키지를 나타내는 측단면도,2 is a side cross-sectional view showing a semiconductor package manufactured using the semiconductor package member according to the present invention;
도 3은 종래의 반도체 패키지 부재를 이용한 반도체 패키지를 나타내는 측단면도.3 is a side cross-sectional view showing a semiconductor package using a conventional semiconductor package member.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
10 : 반도체 패키지 12 : 수지10 semiconductor package 12 resin
14 : 부재 16 : 슬롯홀14 member 16 slot hole
18 : 강성유지용 수지부18: resin part for rigid maintenance
이하 본 발명을 첨부한 도면을 참조로 상세하게 설명하면 다음과 같다.Hereinafter, described in detail with reference to the accompanying drawings of the present invention.
본 발명은 다수의 반도체 패키지 영역을 갖는 반도체 패키지 제조용 부재에 있어서, 상기 부재(14)의 몰딩영역 또는 몰딩영역 밖의 영역에 관통된 슬롯홀(16)을 형성하여서 된 것을 특징으로 한다.The present invention is characterized in that in the semiconductor package manufacturing member having a plurality of semiconductor package regions, the slot holes 16 penetrated in the molding region or the region outside the molding region of the member 14 are formed.
본 발명의 반도체 패키지 제조방법은 부재(14)의 칩탑재영역에 칩을 부착하는 공정과, 칩의 본딩패드와 부재의 본딩영역간의 와이어 본딩공정과, 상기 칩과 와이어등을 외부로부터 보호하기 위하여 수지로 몰딩하는 공정으로 달성된 반도체 패키지 제조방법에 있어서, 상기 몰딩공정시 반도체 패키지 제조용 부재(14)의 몰딩영역 또는 몰딩영역 밖의 영역에 형성된 슬롯홀(16)을 수지가 관통되며 채워져 부재의 저면으로 돌출되게 몰딩되는 공정이 동시에 진행되는 것을 특징으로 한다.The semiconductor package manufacturing method of the present invention comprises the steps of attaching the chip to the chip mounting region of the member 14, a wire bonding process between the bonding pad of the chip and the bonding region of the member, and to protect the chip and the wire from the outside. In the method of manufacturing a semiconductor package achieved by molding with a resin, a resin penetrates and fills a slot hole 16 formed in a molding region or a region outside the molding region of the member 14 for manufacturing a semiconductor package during the molding process. It characterized in that the molding process to be protruded at the same time.
여기서 본 발명을 실시예로서, 첨부한 도면을 참조로 더욱 상세하세 설명하면 다음과 같다.Herein, the present invention will be described in more detail with reference to the accompanying drawings.
첨부한 도 1은 본 발명에 따른 반도체 패키지 부재와 이것을 이용한 반도체 패키지 제조용 부재를 나타내는 단면도로서, 도면부호 12는 슬롯홀이다.1 is a cross-sectional view showing a semiconductor package member and a member for manufacturing a semiconductor package using the same according to the present invention, and reference numeral 12 denotes a slot hole.
상기 슬롯홀(12)은 반도체 패키지 제조용 부재(10)의 몰딩영역 또는 몰딩영역 밖의 영역에 여러가지 형태로 관통되게 형성된다.The slot hole 12 is formed to penetrate through the molding region or the region outside the molding region of the semiconductor package manufacturing member 10 in various forms.
한편, 상기 부재(10)는 자중에 의하여 상하로 유연성이 큰 얇은 금속재 리드프레임, PCB등 제한되지 않으며, 자중 또는 외부요인에 의하여 유연성이 큰 부재를 말한다.On the other hand, the member 10 is not limited to a thin metal lead frame, PCB, etc., which has a high flexibility up and down by its own weight, and refers to a member having a high flexibility by its own weight or external factors.
여기서, 상기와 같이 슬롯홀(12)이 형성된 부재(14)를 사용하여 반도체 패키지를 제조하는 방법에 대하여 설명하면 다음과 같다.Here, a method of manufacturing a semiconductor package using the member 14 having the slot holes 12 as described above will be described.
상기 반도체 패키지 제조용 부재(14)의 칩탑재영역에 반도체 칩을 실장하는 공정과, 이 반도체 칩의 본딩패드와 부재의 와이어 본딩영역간에 와이어 본딩공정을 진행시킨 후, 몰딩다이에 올려 몰딩공정을 진행하게 된다.The semiconductor chip is mounted in the chip mounting region of the semiconductor package manufacturing member 14, the wire bonding process is performed between the bonding pad of the semiconductor chip and the wire bonding region of the member, and then the molding process is carried out on a molding die. Done.
이때, 상기 몰딩다이의 하형에 와이어 본딩 공정까지 완료된 부재(14)를 올려놓고, 와이어와 반도체 칩등을 포함하는 부재(14)의 몰딩영역에 수지를 공급하여 몰딩공정을 실시하는 바, 상기 부재의 슬롯홀(12)에도 몰딩수지가 채워지게 되고, 동시에 몰딩수지는 슬롯홀(12)을 관통하여 부재의 저면으로 돌출되며 몰딩된다.At this time, the member 14 completed by the wire bonding process is placed on the lower mold of the molding die, and resin is supplied to the molding region of the member 14 including the wire and the semiconductor chip to perform the molding process. The molding resin is also filled in the slot hole 12, and at the same time, the molding resin penetrates the slot hole 12 and protrudes to the bottom of the member and is molded.
상기 슬롯홀을 따라 부재의 저면으로 돌출된 부위는 강성유지용 수지부(18)로 형성되어, 자체 유연성으로 흐느적대거나 공정간의 외부 힘에 의한 휘어짐 현상을 상기 강성유지용 수지부(18)가 견고하게 잡아주게 된다.The portion protruding from the bottom surface of the member along the slot hole is formed of the rigid retaining resin portion 18, so that the rigid retaining resin portion 18 is rigid due to its own flexibility or bending due to external force between processes. I get hold of it.
따라서, 몰딩공정후에 PCB와 같은 부재의 저면에 형성된 볼랜드에 솔더볼과 같은 인출단자를 부착하는 공정을 진행할 때에도 상기 강성유지용 수지부(18)에 의하여 부재가 견고한 평행상태를 유지하게 되어 작업을 용이하게 실시할 수 있고, 몰딩면에 대한 마킹공정에 있어서도 부재가 견고한 고정상태를 유지하게 되어, 종래에 부재의 휘어짐에 의한 반도체 패키지의 불량을 방지할 수 있다.Therefore, even when the process of attaching the lead-out terminal, such as solder balls to the ball land formed on the bottom surface of the member such as PCB after the molding process, the member is maintained in a solid parallel state by the rigid retaining resin portion 18 to facilitate the operation In this case, the member is held in a firm fixed state even in the marking step on the molding surface, so that a defect in the semiconductor package due to the bending of the member can be prevented.
이상에서 본 바와 같이, 본 발명에 따른 반도체 패키지 제조용 부재와 이것을 이용한 반도체 패키지 제조방법에 의하면 부재의 일정부위에 몰딩공정시 수지가 채워져 강성유지용 수지부 역할을 하도록 슬롯홀을 형성함으로써, 종래에 자중이나 반도체 패키지의 공간간의 외부힘에 의하여 쉽게 휘어지는 성질을 방지할 수 있는 장점이 있다.As described above, according to the member for manufacturing a semiconductor package according to the present invention and the method for manufacturing the semiconductor package using the same, a slot hole is formed in a predetermined portion of the member to form a resin hole for stiffness retention during the molding process. There is an advantage that can be easily bent due to the external force between the space of the own weight or the semiconductor package.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940008065A (en) * | 1992-09-23 | 1994-04-28 | 김광호 | Leadframes for Semiconductor Devices |
| JPH08222654A (en) * | 1994-12-05 | 1996-08-30 | Motorola Inc | Substrate and method for multistrand for ball grid array assembly |
| US5773895A (en) * | 1996-04-03 | 1998-06-30 | Intel Corporation | Anchor provisions to prevent mold delamination in an overmolded plastic array package |
| KR19980044243A (en) * | 1996-12-06 | 1998-09-05 | 황인길 | Printed Circuit Board Strips for Semiconductor Packages |
| KR200245728Y1 (en) * | 1995-12-28 | 2001-12-17 | 마이클 디. 오브라이언 | Lead Frames for Semiconductor Packages |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940008065A (en) * | 1992-09-23 | 1994-04-28 | 김광호 | Leadframes for Semiconductor Devices |
| JPH08222654A (en) * | 1994-12-05 | 1996-08-30 | Motorola Inc | Substrate and method for multistrand for ball grid array assembly |
| KR200245728Y1 (en) * | 1995-12-28 | 2001-12-17 | 마이클 디. 오브라이언 | Lead Frames for Semiconductor Packages |
| US5773895A (en) * | 1996-04-03 | 1998-06-30 | Intel Corporation | Anchor provisions to prevent mold delamination in an overmolded plastic array package |
| KR19980044243A (en) * | 1996-12-06 | 1998-09-05 | 황인길 | Printed Circuit Board Strips for Semiconductor Packages |
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