KR100447395B1 - Round robin scheduler for memory access control - Google Patents

Abstract

SUMMARY OF THE INVENTION The present invention provides a round robin scheduler for memory access control which simply implements a round robin scheduler using a multiplexer to determine the order of extracting data from an ATM cell and transmitting it in a queue. A plurality of data storage media; Set the order of reading the data from each data storage medium, and if the transmission reject signal for any storage medium or a signal indicating that the data storage medium is empty, activate the data transmission according to the set order. Scheduling means for blocking access to the data storage medium in a state so that the data transmission order of the storage medium is skipped; It includes a multiplexing output stage for multiplexing the data read from each data storage medium in the order scheduled by the scheduling means.If a signal indicating that the transmission rejection signal and the queue is empty is generated, A simple hardware round robin scheduler can be implemented to block access, reducing manufacturing costs and increasing scheduler efficiency.

Description

Round robin scheduler for memory access control

The present invention relates to the scheduling of memory access, and more particularly, it is suitable to set the access order in each queue in a round robin manner when an ATM (Asynchronous Transfer Mode) cell is removed from a queue and transmitted. A round robin scheduler for memory access control.

Generally, a scheduler multiservice ATM network provides various services (video, voice, data, etc.) each having a different quality of service (QoS). These signals use the same switch node or link.

Therefore, signals that use switch nodes or links at the same time will cause collisions. To prevent this, a queue is needed to temporarily store ATM cells according to their QoS.

When the ATM cell is dequeued and transmitted, the round robin scheduler is called to dequeue the cell by accessing each queue in the same frame or period. That is, during one frame or period, each queue transmits the same cell regardless of its QoS.

When the ATM cell is dequeued and transmitted, the scheduler to which the cell is drawn by giving weight to each queue for one frame or period is called a weighted round robin scheduler. When this scheduler is applied, heavier cues in one frame or period will transmit more cells than smaller cues.

These schedulers are mainly used for the traffic control of ATM cells in the ATM layer of the ATM network. For example, it can be applied to optical subscriber equipment such as ATM-PON.

1 is a block diagram of an application of a round robin scheduler for memory access control according to the prior art, and FIG. 2 is a block diagram of a round robin scheduler for memory access control according to the prior art.

According to FIG. 1, a round robin scheduler 110 using a counter is conventionally designed to determine an order in which cells are transmitted from a plurality of queues 120.

The round robin scheduler 110 includes a plurality of serially connected schedule modules 210 as shown in FIG. Each schedule module 210 is output (o #, hereinafter '#' is any natural number), and these outputs (o #) are ORed on the OR gate 220 and then input to the selector 240. . In this case, initialization of each scheduler module 210 is achieved by applying an initialization signal to the AND gate 230. The selector 230 receives the output of the AND gate 230 and the output of the scheduler module 210 of the last stage to determine the cell from which the cell will exit from the current state among the plurality of queues.

Here, the scheduler module 210 outputs when a back pressure signal bp #, which is a transmission rejection signal distributed from an external switch, or an empty signal applied from the queue 120 is received. #) Is blocked. Here, the back pressure signal is a signal for forcibly blocking data transmission from the outside, and the empty signal is a signal for notifying that there is no data to be transmitted because it is empty in the queue itself.

The conventional round robin method assigns the same weight to all the queues in which the cells are stored so that cells read from each queue in one cycle have the same service opportunity. However, if a back pressure signal is applied from a switch to a specific queue for a period or the queue becomes empty, the queue loses the service opportunity.

Therefore, if you design the round robin scheduler as a general state machine that processes according to the state between the receiving side and the service providing side, there are too many input signals applied to the current state. Combination logic will be created, and the design will be complicated. In addition, as queues increase, the above problem will increase exponentially. Therefore, if the round robin scheduler is designed using a counter, the scheduler's performance is very poor because it attempts to serve the queue to which the back pressure signal is applied or to the queue with an empty state.

SUMMARY OF THE INVENTION The present invention was created to solve the above-mentioned conventional problems, and an object of the present invention is to simply implement a round robin scheduler using a multiplexer to determine the order of dequeuing and transmitting data such as ATM cells. It is to provide a round robin scheduler for access control.

The round robin scheduler for memory access control of the present invention for achieving the above object, in a plurality of scheduling control apparatus for controlling the input and output of data stored in a plurality of data storage medium, applied from the data storage medium assigned to itself A plurality of first to third logic operation units configured to logically perform a backpressure signal and an empty signal of the corresponding data storage medium to confirm the absence of these signals, and a predetermined access order to the data storage medium. A plurality of first and second multiplexing stages that receive an activation signal and a reference signal applied from a front end and select one of the inputs according to output signals of the first and second logic operation units; After latching one output, it outputs a signal indicating whether or not the corresponding data storage medium assigned to itself is activated. A lip-flop unit and an output signal for receiving an output signal of the flip-flop unit and the second multiplexer and multiplexing according to an output selection of the third logical operation unit to activate a scheduling means located at its next stage in the set order. A round robin scheduler for memory access control including a third multiplexing stage is provided.

1 is an application block diagram of a round robin scheduler for memory access control according to the prior art;

2 is a block diagram of a round robin scheduler for memory access control in accordance with the prior art;

Figure 3 is a block diagram of a round robin scheduler for memory access control in accordance with an embodiment of the present invention.

4 is a block diagram of a round robin scheduler module in FIG.

Explanation of symbols on the main parts of the drawings

310: queue 320: round robin scheduler

330: multiplexed output stage 410, 430, 440: multiplexed stage

411 and 441: NOR gate 420: flip-flop portion

431 OR gate

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

3 is a block diagram of a round robin scheduler for memory access control according to an embodiment of the present invention, and FIG. 4 is a block diagram of a round robin scheduler module in FIG.

In this embodiment, when transmitting data from the subscriber transmission equipment such as ADSL upward, it is intended to adjust the data transmission order of queues having subscriber-specific information. In other words, unlike the conventional round robin scheduler that accesses the empty queue every time because it uses a counter to access ATM queues and other information to the multiplexer, the signal that the queue is empty and next to the multiplexer The scheduler skips the access of the queue according to the back pressure signal, which is a transmission reject signal applied by a switch located at the stage. As such, the complicated process of designing a conventional round robin scheduler by hardware is eliminated, and a simpler hardware structure can be realized by using a multiplexer.

According to FIG. 3, the present embodiment is a queue 310 for receiving and temporarily storing ATM cells, a round robin scheduler 320, and a round robin scheduler for determining an order in which cells are removed from the queue 310 and transmitted. And a multiplexing output stage 330 for multiplexing and outputting cells extracted from each queue 310 in the order designated by 320.

The output of the queue 310 is controlled according to the back pressure signal bp # applied from an external switch. For example, the back pressure signal bp1 blocks the cell transmission of the cue 1, and otherwise controls the cell output of each cue 310 from the outside. On the other hand, the queue 310 outputs an empty signal (empty #) when it does not store the ATM cell, that is, the empty state. This empty signal is intended to cause the scheduler 320 to skip the queue when scheduling the order in which the ATM cells are pulled out. ATM cells to be withdrawn from each queue 310 are indicated by cell #.

The multiplexing stage 330 is to allow the cell # to be read from the queue 310 according to the output o # of the round robin scheduler 320 and finally output to an external device. The round robin scheduler As output o # of 320 is entered in a scheduled order, cell # is accessed from queue 310 in the same order. For example, if the output o1 of the round robin scheduler 320 is active in the current state, the cell cell1 is accessed from the queue 1 to be finally output, and the access to the other queues is in a standby state. When the output o2 is activated in the round robin scheduler 320 in the next state, the cell cell2 is accessed in the queue 2 and transmitted to the outside as the final output. Miscellaneous

When the round robin scheduler 320 is not in operation and remains in the initial mode and the initial mode is released, the scheduler is operated to set the access order for the queue 310 in a round robin scheduling manner.

As shown in FIG. 2, the round robin scheduler 320 in charge of scheduling is provided with the same number of scheduling modules as the queues 310 for scheduling of each queue 310. Each of the scheduling modules is configured as shown in FIG. 3, and includes first and second NOR gates 411 and 441 and first NOR gates 411 for checking the absence of an applied back pressure signal and an empty signal. The first multiplexing stage 410 for selecting input signals according to the output of the multiplier, the flip-flop unit 420 for latching the output of the first multiplexing stage 410 and applying it to the multiplexing output stage 330, OR gate 431 for confirming the presence of the back pressure signal and the empty signal, a second multiplexing stage 430 for selecting input signals according to the output of the OR gate 431, and a second NOR gate 441. And a third multiplexing stage 440 for selecting an output of the flip-flop unit 420 and the second multiplexing stage 430 to activate its next scheduling module according to the output of the. Here, since the first NOR gate 411 and the second NOR gate 441 are functionally identical, the first NOR gate 411 and the second NOR gate 441 may be implemented using a single NOR gate, which is illustrated separately for convenience of the accompanying drawings.

That is, the scheduling module includes a multiplexing stage 410, 430, 440 and a flip-flop unit 420 in the form of a shift register. This is used to create a route to service the next queue by skipping the back pressure signal from the switch or serving the queue 310 in the applied or empty state.

Therefore, the back pressure signal bp # or the empty signal empty # may be referred to as a characteristic signal of the queue 310 that determines whether to service each queue 310. Efficient round robin scheduling can be implemented by preventing access to a queue to which a back pressure signal is applied or an empty queue.

More specifically, the output according to the states of signals input to each scheduler module of the round robin scheduler 320 will be described. In FIG. 4, the first NOR gate 411 outputs an active signal when both the back pressure signal bp and the empty signal are absent so that the first input is selected in the first multiplexing stage 410. , In other cases, input 0 should be selected. The output of the first multiplexer 410 is latched by the flip-flop unit 420, output according to the clock clk, and applied to the third multiplexer 440. ) Is an output (o #) to indicate whether access is enabled for). The OR gate 431 outputs an active signal when a back pressure signal or an empty signal is present so that the first input is selected by the second multiplexer 430, and in other cases 0 Make sure the first input is selected. The third multiplexing stage 440 is controlled according to the output of the second NOR gate 441 to drive the scheduler module corresponding to the next order, where the second NOR gate 441 is a back pressure signal (bp) or When the empty signal is absent, the output of the flip-flop unit 420 is selected to be selected, and in other cases, the output of the second multiplexer 430 is selected to be selected.

Therefore, when n queues 310 such as Queue # 1, Queue # 2, ..., Queue # n are used, n back pressure signals (bp #) such as bp1, bp2, ..., bpn are received. An empty signal (empty #), such as empty1, empty2, ..., emptyty, which is applied to the 310 and the round robin scheduler 320, indicating that each queue 310 is empty, is sent to the round robin scheduler 320. It is applied, the round robin scheduler 320 delivers the output (o #), such as o1, o2, ..., on to the multiplexed output stage 330 for indicating whether or not to access each queue 310, the multiplexed output stage The order in which 330 transmits the cell ## of each queue 310 is determined so that the final output may be performed.

If the back pressure signal (bp #) and empty signal (empty #) are absent, the data is transmitted in the order of Queue # 1, Queue # 2, ..., Queue # n according to the round robin method. If set, the round robin scheduler 320 activates the output o # in the order of o1, o2, ..., on. Then, the data transmission order of the final output (celli) of the multiplexed output terminal 330 is cell1, cell2, ..., celln. In the case of the scheduler modules serially connected in the set order, after the operation of the previous scheduler module is completed, the active module receives the activation signal of the active high, and after the operation is completed, the active module outputs the activation signal of the active high. This will activate the scheduler module.

On the other hand, in the present state, if any one of the back pressure signal bp # and the empty signal empty # exists for a certain queue 310, the cell is not accessed from the queue. That is, if the back pressure signal bp3 for Queue # 3 is applied or no cell is stored, and the empty signal empty3 is applied, the round robin scheduler 320 does not activate the output o3 in the current state, so that o1, o2, o4,. The output (o #) activated in the order of .. on causes the final output (celli) to be equal to cell1, cell2, cell4, ..., celln, where o1 and o2 are output, and then the queue Queue # Since the signal of the active high, that is, '1' is applied at 2, the first NOR gate 411 is used in the scheduler module 3 which deactivates the output o3 which will activate the access to the queue Queue # 3 as shown in FIG. The output of is deactivated, and the output of '0' is output from the first multiplexer 410 and then latched by the flip-flop unit 420. The activation signal '1' of the module is selected and the output of the second NOR gate 441 is inactive The third output "1" of the second multi-flower bed 430 in a multi-flower bed 440 is selected to thereby enable the following single scheduler module 4. In this case, therefore, the output o3 is not active, so access to Queue # 3 is not made. In this way, the round robin scheduler can be efficiently scheduled by preventing access to unnecessary queues.

Subsequently, assume that the output o # of the round robin scheduler 320 is as shown in Table 1 below.

o1 o2 o3 o4 State 1 One 0 0 0 State 2 0 One 0 0 State 3 0 0 0 One

Table 1 shows that the four outputs o1, o2, o3, and o4 change according to four states.In state 1, the output of o1 is activated and cell1 is transmitted, and in state 2, o2 is activated and cell2 is transmitted. . State 3 shows that back pressure signal bp3 is applied or queue is empty for queue Queue # 3. Queue # 3 enables o4 by enabling Queue # 4 with o3 disabled. By doing so, immediately after cell2 is transmitted, cell3 is not transmitted, but cell4 is transmitted. Other cases not illustrated work in this way.

The round robin scheduler presented in this embodiment can be used for scheduling subscriber equipment such as ADSL, ATM-PON, and the like, and round robin scheduling is performed for the access order of each hardware in equipment using relatively few hardware. Can be applied to perform.

The embodiments described above are within the scope of various changes, modifications, and equivalents of the present invention. Therefore, the present invention is not limited to the description of the examples.

According to the round robin scheduler for memory access control of the present invention, when a transmission rejection signal and a signal indicating that the queue is empty are generated, a simple hardware round robin scheduler can be implemented to selectively block access to the queue. This reduces manufacturing costs and increases the efficiency of the scheduler.

Claims (2)

A plurality of scheduling control apparatus for controlling the input and output of data stored in a plurality of data storage media, A plurality of first to third logic operation units configured to logically perform a backpressure signal applied from the data storage medium assigned to the storage medium and an empty signal of the data storage medium to confirm the absence of these signals; , A plurality of first and first input signals for receiving an activation signal and a reference signal applied from a front end according to a predetermined approach order to the data storage medium and selecting one of the inputs according to output signals of the first and second logic operators; 2 multiplexer, A flip-flop unit which latches an output of one side of the first multiplexer and outputs a signal indicating whether to activate the corresponding data storage medium assigned to the first multiplexer; A third multiplex that receives the output signals of the flip-flop unit and the second multiplexer and multiplexes according to the output selection of the third logical operation unit and outputs an output signal for activating scheduling means located at its next stage in the set order; Round robin scheduler for memory access control comprising a flower bed. delete