KR100437674B1 - Apparatus for control of Pulse Code Modulation data and method for control thereof - Google Patents

Abstract

The present invention relates to an apparatus and a method for controlling a PC data in audio / video using an external memory. By using an external memory to directly access the PC data, the use of the internal memory is reduced to reduce chip area and power consumption. Provided are a PCM data control apparatus and a control method thereof.

Thus, by using an external memory to directly access the PC data in a system having an audio / video decoder, the use of the internal memory can be reduced, thereby reducing chip area and power of the entire system.

Description

Apparatus for control of Pulse Code Modulation data and method for control

The present invention relates to a decoder used in a digital TV or a DVD (Digital Video Disk) and a multimedia system (Multimedia system), and more particularly, PCM (Pulse Code Modulation) in an audio / video decoder using an external memory A data control device and a control method thereof.

Currently, an audio / video decoder is more important than a normal state in which an error handling capability of an input bitstream is important.

On the other hand, the increase in chip area and the power consumption according to the increase in the capacity of the actual internal memory is also a problem that causes the performance of the entire system.

The present invention has been proposed to solve the above-mentioned problems, and the PCM data control apparatus that can reduce the use of the internal memory using the external memory, thereby reducing the chip area and the overall power consumption; The purpose is to provide a control method.

1 is a block diagram showing the structure of an audio / video decoder system according to the present invention;

2 is a flowchart illustrating an audio decoding method according to FIG. 1;

3 is a block diagram illustrating a structure of an external memory shown in FIG.

4 is a block diagram showing the structure of an audio decoder according to FIG. 1;

5 is a flowchart illustrating a method of decoding PCM data according to FIG. 4;

6 is a block diagram illustrating a structure of an external memory interface unit according to FIG. 4;

FIG. 7 is a flowchart illustrating a write operation of PC data according to FIG. 6;

8 is a flowchart illustrating an operation of reading PC data according to FIG. 6;

FIG. 9 is a block diagram illustrating a structure of an outer packing part and an unpacking part in FIG. 6.

* Description of the main parts of the drawing

40: bitstream buffer memory section

41: decoding core part

42: buffer memory section

42a: first buffer memory section

42b: second buffer memory section

43: external memory interface

44: external memory

45: digital analog converter

The present invention for achieving the above object, the external memory unit; A bitstream buffer memory unit for storing an audio bitstream; A decoding core unit for reading and decoding a bitstream of the bitstream buffer memory unit by a decoding start signal from an audio decoder; A buffer memory unit for storing data parsed by the decoding core unit; An external memory interface unit for directly accessing the PC data of the buffer memory unit to the external memory unit by a control signal of the decoding core unit; And a digital-to-analog converter for converting and playing PC data of the external memory unit from the external memory interface unit, wherein the buffer memory unit includes: a first buffer memory unit for storing temporary data necessary for decoding coefficients and operations; A second buffer memory unit for storing M data, wherein the digital analog converter includes a digital analog conversion interface for transferring PC data of the external memory unit, and a converter for converting and playing the PC data; The external memory interface unit may include a PC buffer memory unit, a PC buffer data input / output unit for controlling input / output of data of the PC buffer memory unit, an external memory unit, and an external memory for controlling input / output of data of the external memory. A data input / output unit and the external memory A digital analog conversion interface for reading and playing the data, a decoding core unit for outputting a control signal informing that the PCM data is decoded and ready for transmission, and receiving the control signal. An internal control unit for reading the PCM data from the PCM buffer memory unit through a buffer data input / output unit, and packing the read PCM data to compare the bus width of the read PCM data with the bus width of the external memory unit. A data format unit configured to control each control signal according to a read / write state by inputting a packing unit, a correlation between the data compared by the internal control unit, and the external memory unit and the PCM. If the width of the data is different, the unpacked digital analog It provides an unpacking unit for transmitting to the ring interface unit, and a multiplexing unit for multiplexing the output of the packing unit or the external memory data input and output unit.

In addition, the present invention to achieve the above object, the first step of storing the audio bitstream in the bitstream buffer memory unit; A second step of reading and decoding a bitstream of the bitstream buffer memory unit if audio decoding is declared; Re-parsing the decoded bitstream, and storing temporary data and PCM data generated through various processes using decoding coefficients and the coefficients in a buffer memory unit; A fourth step of sending a control signal to an external memory interface unit for transmission of the PCM data from the decoding core unit to an external memory unit when the predetermined amount of the PCM data decoded according to the decoding capability of the decoding core unit is reached; A fifth step of decoding the next frame of the audio bitstream for skipping, repeating, or normal decoding after confirming synchronization when the audio decoder finishes decoding each frame that is a decoding unit of the audio bitstream as described above; A sixth step of reading the PC data from the external memory unit and sending it to the digital analog converter if the PCM is to be played according to a corresponding state during the fifth step; Determining a quantity of PCM data to be read from the external memory interface according to the processing capability of the digital analog converter; And an eighth step of processing the predetermined amount of PCM data sent from the external memory interface unit by the digital analog converter, and then requesting PCM data from the external memory interface unit again. The method may further include storing temporary data necessary for the decoding coefficient and the calculation in a first buffer memory unit, storing the PCM data in a second buffer memory unit, and deciding the size of the second buffer memory unit in the decoding core unit. Provided is a PCM data control method characterized in that it varies according to units.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

1 is a block diagram showing the structure of an audio / video decoder according to an embodiment of the present invention.

Referring to FIG. 1, the audio / video decoder, for example, in the case of a digital TV, has a transport stream (hereinafter referred to as TS) data that has undergone RF demodulation and channel decoding. In the case of Video Disk (hereinafter referred to as DVD), the PS and TS are parsed by inputting program decoded program stream data (hereinafter referred to as PS), and an audio stream and a video stream ( A demultiplexer (DMUX) 11 for outputting a video stream and a system clock reference (hereinafter referred to as an SCR), and an STC generator for outputting an STC (System Time Clock) by inputting an SCR (17). ), An audio decoder 12 for receiving the audio stream and the STC, decoding the audio stream, and outputting the audio output PCM data, and receiving the video stream and the STC. A video decoder 13 for coding and outputting picture data which is a video output; an external memory 14 for storing PCM data, image data and system data in other blocks; And a phase locked loop (PLL) 16 which provides a central processing unit (CPU) 15 for controlling the entire system and a system clock source.

Here, in the audio / video decoder, in the case of the audio decoder, the video decoder 13 can be omitted, and vice versa. Hereinafter, the operation of the audio / video decoder having the above configuration will be described.

The input of the system is divided into an audio bitstream which is parsed into TS / PS via the demultiplexer 11 and becomes the input of the audio decoder 12, and a video bitstream which becomes the input of the video decoder 13. The audio decoder unit 12 and the video decoder unit 13 respectively enter.

The coded bitstream introduced into the audio decoder unit 12 and the video decoder unit 13 is decoded and stored in the external memory unit 14, where PCM data for audio and image data for video are stored. Stored.

As described above, the audio / video data stored in the external memory unit 14 is respectively played in accordance with a presentation time stamp (hereinafter referred to as PTS).

FIG. 2 is a flowchart illustrating the operation of the audio / video decoder according to FIG. 1.

Referring to FIG. 2, when the decoding start of the audio decoder is declared by the CPU 20, the audio decoder parses the bitstream.

Since the present invention relates to the use and control of an external memory related to the storage and play of PCM data after decoding, it is assumed that the bitstream coming into the input of the audio decoder assumes an elementary stream (ES), and the audio decoder is a PES. It does not matter even if it decodes (Packetized Elementary Stream).

The type of bitstream, the sampling frequency used when the bitstream is encoded, the parameters necessary for decoding are extracted by parsing, and the extracted result is stored in the internal memory (22). Before the start, the STC and the PTS are compared for the synchronization (23). Here, when the STC parses the TS / PS in the demultiplexer of FIG. 1, the STC is generated based on the SCR. You will create an STC.

Referring to the series of processes shown as '24' to '26', the PTS is included in the head of the audio PES and video PES resulting from the parsing of the demultiplexer, and the audio and video PES is demultiplexed. It doesn't matter whether you parse it again at or at each decoder.

In other words, if the PTS is parsed after generating the PTS using PCR (Program Clock Reference) by checking the PES, and the PTS is fast, it is a future bitstream, so the PCM data that has been decoded in the past is repeatedly played. When the STC is increased and the PTS is reviewed again, the bitstream to be currently decoded is performed. Then, normal decoding is performed to transfer the resulting PCM data to the external memory unit and play each PCM sample.

If the PTS is late (b), since the current bitstream is present, the bitstream is quickly skipped to find the current bitstream to be decoded.

3 is a block diagram showing the structure of an external memory unit.

Referring to FIG. 3, the external memory unit 30 includes a system and video data storage unit 31 and an audio PCM data storage unit 32, and the audio PCM data storage unit 32 again stores old PCM data. Section 32a and the current PCM data storage section 32b.

Specifically, the external memory unit 30 stores not only PCM data of audio but also image data of video and system data used in the remaining units.

In addition, the audio PCM data storage unit 32 stores PCM data previously decoded and currently being played, and also stores PCM data to be played in the near future. This is to facilitate the repetition in the decoder, and it is possible to play only the PCM data of the external memory unit 30 repeatedly without the need to decode the past bitstream unnecessarily.

4 is a block diagram illustrating operations of an audio decoder and an external memory unit.

Referring to FIG. 4, the bitstream of the bitstream buffer memory section 40 is provided by the external memory section 44, the bitstream buffer memory section 40 storing the audio bitstream, and the decoding start signal from the audio decoder. A decoding core unit 41 for reading and decoding the data, a buffer memory unit 42 for storing data parsed by the decoding core unit 41, and a buffer memory unit 42 by the control signal of the decoding core unit 41. The PCM data of the external memory interface unit 43 directly accesses and transmits the PCM data of the external memory unit 44 to the external memory unit 44, and the PCM data of the external memory unit 44 is converted and played. A digital analog converter (DAC) unit 45 is shown.

In addition, the buffer memory unit 42 includes a first buffer memory unit 42a for storing decoding coefficients and temporary data required for calculation, and a second buffer memory unit 42b for storing PCM data, and the DAC unit 45. ) Includes a DAC interface unit 45a for transferring the PCM data of the external memory unit 44 and a converter unit 45b for converting and playing the PCM data.

The operation of the audio decoder including the external memory having the above configuration will be described in detail.

The audio bitstream is stored in the bitstream buffer memory unit 40. When audio decoding is declared, the decoding core unit 41 reads and decodes the bitstream from the bitstream buffer memory unit 40.

The decoded bitstream is parsed again, and temporary data and PCM data generated through various processes using decoding coefficients are stored in the buffer memory unit 42. At this time, the temporary data necessary for the decoding coefficient and the calculation are stored in the first buffer memory section 42a, and the PCM data is stored in the second buffer memory section 42b.

Here, the size of the second buffer memory section 42b in the buffer memory section 42 may vary depending on the decoding processing unit of the decoding core section 41.

When the decoded PCM data reaches a certain amount according to the decoding capability of the decoding core unit 41, the control unit controls the external memory interface unit 43 to transfer the PCM data from the decoding core unit 41 to the external memory unit 44. Will send a signal. That is, when the control signal such as the address of the external memory unit 44 and the number of times of transmission of the PCM data is transmitted to the current PCM data storage unit in the external memory unit structure of FIG. 3, the external memory interface unit 43 buffers the buffer. The PCM data in the memory unit 42 is directly accessed and sent to the external memory unit 44. The play order at this time and the storage order of the PCM data after decoding are as shown in FIG.

When the audio decoder finishes decoding each frame that is the decoding unit of the audio bitstream as described above, the next frame of the audio bitstream is decoded for skipping, repeating, or normal decoding after checking synchronization.

At this time, if the situation is to play the PCM according to the corresponding state, the external memory interface unit 43 reads the PCM data from the external memory unit 44 and sends it to the DAC unit 45, DAC unit 45 The amount of PCM data to be read from the external memory interface unit 43 is determined according to the processing capacity of the external memory interface unit 43, and the DAC unit 45 receives a predetermined amount of PCM data sent from the external memory interface unit 43. After processing, the PCM data is requested to the external memory interface 43 again.

Here, the width of the audio PCM data and the width of the bus Bus at the time of reading / writing of the external memory unit 44 will be described.

Almost all audio decoder's PCM data processing method is one of 16 bit, 18 bit, 20 bit and 24 bit, and the external memory unit 44 is 8 bit, 16 bit, 32 bit, 64 which is almost multiple of 8 Since it has a bus width of bits, 128 bits, etc., it may be necessary to adjust the bus widths of the PCM data processed by the audio decoder and the external memory unit 44, which will be described with reference to FIG. 6 below.

6 is a block diagram showing the structure of the external memory interface unit. Referring to FIG. 6, the external memory interface unit controls the input / output of the data of the PCM buffer memory unit 604 and the PCM buffer memory unit 604. Read and play data from the data input / output unit 605, the external memory unit 608, the external memory data input / output unit 607, which controls the input / output of the data of the external memory unit 608, and the external memory unit 608 A DAC interface unit 609 to enable the decoding, a decoding core unit 601 for outputting a control signal indicating PCM data decoding completion, and a PCM buffer data input / output unit 605 receiving the control signal; The internal control unit 602 reading the PCM data of the PCM buffer memory unit 604 and the bus width of the PCM data read from the internal control unit 602 and the bus width of the external memory unit 608 are read so as to be compared. Having PCM on A data format unit 603 for controlling each control signal in accordance with the read / write state by inputting a correlation between the packing unit 610 for packing the data and the data compared by the internal control unit 602. The unpacking unit 606 for unpacking and transmitting the unpacked portion to the DAC interface unit 609 when the width of the external memory unit 608 differs from the PCM data, and the packing unit 610 or the external memory data. And a multiplexing unit 611 for multiplexing the output of the input / output unit 607.

The operation of the external memory interface unit having the above configuration will be described.

When the decoding core unit 601 transmits a control signal indicating that the PCM data decoding is finished and ready to transmit the PCM data from the decoding core unit 601 to the internal control unit 602, the internal control unit 602 transmits the PCM buffer data input / output unit 605. The PCM buffer memory unit 604 in which PCM data is stored is directly accessed through the PCM data.

When the width of the read PCM data and the bus width of the external memory unit 608 are different, the PCM data is packed by the packing unit 610 to match the bus width by the internal control unit 602, and then the external memory data input / output unit 607. Is transmitted to the external memory unit 608, and the internal control unit 602 reads / writes the timing and the external memory unit 608 between signals that may vary according to the external memory unit 608. When the correlation between the signals required for the data is sent to the data format unit 603, the data format unit 603 controls each control signal according to the timing of the read / write according to the timing so that the external memory data input / output unit 607 Send to. When the external memory data input / output unit 607 writes the PCM data to the external memory unit 608, the PCM data is transferred to the bus on which the external memory unit 608 is operated by a write control signal from the data format unit 603. Here, the signals required for each read / write indicate read enable and write enable, external memory address, data signal, and the like.

On the other hand, in the case of reading the PCM data from the external memory unit 608 to the DAC interface unit 609, it is adapted to the read control signal coming from the data format unit 603 from the bus on which the external memory unit 608 operates. PCM data is read. In this case, when the processing width of the external memory unit 608 and the PCM data is different, the packing is unpacked and sent to the DAC interface unit 609.

Write and read operations in the external memory interface unit as described above are as shown in the flowcharts of FIGS. 7 and 8, respectively.

Referring to FIG. 7, the PCM write operation is as follows.

First, when writing is started (70), each variable is set (71), and the write start flag and PCM output mode are set to 16 bits, 18 bits, 20 bits or 24 bits, and the external memory data Set the width, the external memory address and the PCM transfer counter.

Subsequently, the PCM is read from the PCM buffer memory unit according to the internal data bus width (72), and whether the read PCM data is packed is determined (73), and if necessary, packing is performed (74). The PCM data is stored in the external memory unit (76), the PCM counter is determined to be '0' (76), and if '0', the write operation is completed (77). In the case, the process returns to the process of reading the PCM from the PCM buffer memory unit 72 according to the internal data bus width and repeatedly performs the above process so that the PCM counter becomes '0'.

Referring to FIG. 8, the PCM read operation is as follows.

First, when reading is started (80), each variable is set (81), and the read start flag and PCM output mode are set to 16 bits, 18 bits, 20 bits or 24 bits, and the external memory data Set the width, the external memory address and the PCM transfer counter.

Subsequently, the PCM is read from the external memory unit (82), and whether or not the read PCM data is packed (83) is packed. PCM data through the above process is sent to the DAC interface (85), and whether or not the PCM counter is '0' (86), if the '0' read operation is completed (87), '0' is If not, the process returns to step 82 of reading the PCM from the external memory unit and repeats the above process so that the PCM counter becomes '0'.

9 is a diagram illustrating a packing and an unpacking process for matching the width of PCM data with the width of an external memory unit.

Referring to FIG. 9, for example, the PCM buffer memory unit 91 having a data width of 24 bits sequentially stores PCM data such as Data n to Data n + 7 (91a to 91h), and has a 64-bit data width. The external memory unit 92 having one of 24 bits of Data n (91a), 24 bits of Data n + 1 (91b) and 16 bits of Data n + 2_1 (91ca) which are part of Data n + 2 (91c) is one. In the next column, 8-bit Data n + 2_2 (91cb), which is part of Data n + 2 (91c), Data n + 3 (91d) and 24-bit Data n + 4 (91e) And 8-bit Data n + 5-1 (91fa). The data of the PCM buffer memory unit 91 having a width of 24 bits is stored in the external memory unit 92 having a data width of 64 bits. The packing is converted into data of vice versa, and vice versa.

Here, only 64-bit and 24-bit are given as examples for explaining packing and unpacking, and are applicable to various data widths of the PCM buffer memory unit 91 and various data widths of the external memory unit 92 described above. Only the units loaded will be wrong.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

In the present invention as described above, by using an external memory to directly access the PC data in a system having an audio / video decoder, it is possible to reduce the use of the internal memory to reduce the chip area and the power of the entire system.

Claims (10)

delete delete An external memory unit; A bitstream buffer memory unit for storing an audio bitstream; A decoding core unit for reading and decoding a bitstream of the bitstream buffer memory unit by a decoding start signal from an audio decoder; A buffer memory unit for storing data parsed by the decoding core unit; An external memory interface unit for directly accessing the PC data of the buffer memory unit to the external memory unit by a control signal of the decoding core unit; And And a digital-to-analog converter for converting and playing PC data of the external memory unit from the external memory interface unit. The buffer memory unit includes a first buffer memory unit for storing temporary data necessary for decoding coefficients and calculations, and a second buffer memory unit for storing PCM data. The digital analog converter includes a digital analog converter interface for transmitting PC data of the external memory and a converter for converting and playing the PC data. The external memory interface unit may include a PC buffer memory unit, a PC buffer data input / output unit for controlling input / output of data of the PC buffer memory unit, an external memory unit, and an external memory for controlling input / output of data of the external memory. A data analog input / output unit, a digital analog conversion interface unit for reading and playing data of the external memory unit, a decoding core unit for outputting a control signal informing that the PCM data has been decoded and ready to be transmitted; An internal control unit for receiving the control signal and reading the PCM data from the PCM buffer memory unit through the PCM buffer data input / output unit, and comparing the bus width of the read PCM data with the bus width of the external memory unit; A packing unit for packing the read PCM data A data format unit configured to control each control signal according to a read / write state according to a read / write state by inputting a correlation between the data compared by the internal control unit, and to process the external memory unit and the PCM data. And an unpacking unit for unpacking and transmitting the unpacking to the digital analog conversion interface unit, and a multiplexing unit for multiplexing the output of the packing unit or the external memory data input / output unit. delete delete A first step of storing the audio bitstream in a bitstream buffer memory section; A second step of reading and decoding a bitstream of the bitstream buffer memory unit if audio decoding is declared; Re-parsing the decoded bitstream, and storing temporary data and PCM data generated through various processes using decoding coefficients and the coefficients in a buffer memory unit; A fourth step of sending a control signal to an external memory interface unit for transmission of the PCM data from the decoding core unit to an external memory unit when the predetermined amount of the PCM data decoded according to the decoding capability of the decoding core unit is reached; A fifth step of decoding the next frame of the audio bitstream for skipping, repeating, or normal decoding after confirming synchronization when the audio decoder finishes decoding each frame that is a decoding unit of the audio bitstream as described above; A sixth step of reading the PC data from the external memory unit and sending it to the digital analog converter if the PCM is to be played according to a corresponding state during the fifth step; Determining a quantity of PCM data to be read from the external memory interface according to the processing capability of the digital analog converter; And An eighth step of processing the predetermined amount of PCM data sent from the external memory interface unit by the digital analog converter, and then requesting the PCM data to the external memory interface unit again; In the third step, temporary data necessary for the decoding coefficient and the operation are stored in a first buffer memory unit, and the PCM data is stored in a second buffer memory unit, And a size of the second buffer memory unit varies according to a decoding processing unit of the decoding core unit. The method of claim 6, Operation of the external memory interface unit, Transmitting a control signal from the decoding core unit to the external memory interface unit to the internal control unit, indicating that the PCM data is decoded and ready for transmission of the PCM data; Reading the PCM data by directly accessing the PCM buffer memory unit in which the PCM data is stored; If the width of the read PC data and the bus width of the external memory unit are different, packing the PC data to match the bus width by the internal controller, and then transmitting the data to the external memory unit; Sending, by the internal control unit, a correlation between signals that may be different according to the external memory unit and a signal required to read / write the external memory unit to a data format unit; Controlling each control signal according to timing according to each state of read / write in the data format unit and sending the control signal to the external memory data input / output unit; When the external memory data input / output unit writes the PC data to the external memory unit, loading the PC data onto a bus in which the external memory unit is operated by a write control signal from the data format unit; In the case of reading the PC data from the external memory unit to the digital analog conversion interface unit, reading the PC data in accordance with a read control signal from the data format unit from a bus in which the external memory unit operates; And If the processing width of the external memory unit and the PCM data is different, unpacking the read PCM data sent to the digital analog conversion interface unit; PCM data control method comprising a. The method of claim 7, wherein The signals required for each read / write are read enable and write enable, external memory address and data signal. Way. The method of claim 7, wherein The write operation, Set the write start flag and the PCM output mode to 16 bits, 18 bits, 20 bits, or 24 bits, and set the width of the external memory data, the external memory address, and the transfer counter. step; Reading PC data from the PC buffer memory unit according to the internal data bus width; Determining whether the read PCM data is packed; If packing is necessary as a result of the determination, packing and storing the packed PCM data in an external memory unit; Determining whether the PC counter is '0'; And As a result of determining whether the value is '0', if the PC counter is '0', the write operation is completed. If the value is not '0', the PC data is read from the PC buffer memory unit according to the internal data bus width. Returning to the reading step and repeatedly performing the above process so that the PCM counter becomes '0'. PCM data control method comprising a. The method of claim 7, wherein The read operation, Setting the read start flag and the PCM output mode to 16 bits, 18 bits, 20 bits, or 24 bits, and setting the width of the external memory data, the external memory address, and the PC transmission counter, respectively; Reading PC data from an external memory unit; Determining whether the read PCM data is packed; Packing when packing is necessary according to a result of determining whether packing is performed, and sending the packed PCM data to a digital analog conversion interface; Determining whether the PC counter is '0'; And If the PC counter is '0', the read operation is completed. If the PC counter is '0', the read operation is completed. If the PC counter is not '0', the read operation returns to the step of reading PC data from the external memory unit. Repeatedly performing the above process so that the M counter becomes '0' PCM data control method comprising a.