KR100394027B1 - Liquid Crystal Display Panel For low Resistance Line and Method for the same - Google Patents

Abstract

The present invention provides a liquid crystal display panel having a low resistance wiring and a manufacturing method, comprising: a plurality of first gate wirings and first gate electrodes formed of a light blocking material on a transparent substrate; An insulating layer formed on the transparent substrate to expose the first gate wiring and the first gate electrode; A second gate line and a second gate electrode formed by plating or patterning a metal material on the exposed first gate line and the first gate electrode; A gate insulating film formed on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; A semiconductor layer and a source / drain electrode formed in a predetermined region on the gate insulating film; And a data line formed to intersect the first and second gate lines, wherein a gate line and an electrode are formed in a two-layer structure using the insulating layer, and a low resistance line is formed by forming a data line in a two-layer structure. Therefore, a large area liquid crystal display panel having high image quality can be realized by increasing the response response speed.

Description

Liquid crystal display panel having low resistance wiring and manufacturing method thereof {Liquid Crystal Display Panel For low Resistance Line and Method for the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel having a low resistance wiring and a manufacturing method, particularly having a wiring having a two-layer structure for low resistance wiring, and a liquid crystal display panel due to the height difference between the wiring of the two-layer structure and the substrate of the liquid crystal display panel. The present invention relates to a liquid crystal display panel with low resistance wiring suitable for large area having a structure in which an effect of step coverage in which the gate insulating film is not uniformly formed in the gate insulating film forming step, which is a subsequent step in the process, is improved.

Due to the rapid development of the information and communication field, the importance of the display industry that displays desired information is increasing day by day. Until now, CRT (cathod ray tube) among information display devices can display various colors and the brightness of the screen is excellent. Because of its advantages, it has enjoyed steady popularity. However, the desire for large, portable and high resolution displays is urgently needed to develop flat panel displays instead of CRTs, which are bulky and bulky. In particular, such flat panel displays have a wide range of applications from computer monitors to displays used in aircraft and spacecraft.

The demand for liquid crystal displays (LCDs) with light weight, high resolution, low driving voltage, and low power consumption among flat panel displays currently produced or developed is increasing. In particular, a liquid crystal display panel having the above characteristics is suitable for realizing a large area. In order to realize a large area, low resistance wiring must be realized.

In general, the lower substrate of the liquid crystal display panel having the liquid crystal layer formed between the upper and lower substrates has a gate wiring and a gate electrode having a single layer or a double layer structure to form a low resistance wiring, and a lower substrate including the gate wiring and the gate electrode. A gate insulating film is formed on the entire surface of the semiconductor layer, and a semiconductor layer, a source electrode and a drain electrode, a data line, a protective film, and a pixel electrode electrically connected to the drain electrode are formed.

However, when step coverage is considered in the gate insulating film forming process, which is a subsequent step in forming the gate of the single layer or double layer structure, it is difficult to deposit the gate metal height of 5000 Å or more.

The step coverage is formed by depositing and patterning a metal material by sputtering or the like to form a gate on a lower substrate of the liquid crystal display panel, thereby forming a gate insulating film by a step between a portion where the metal material is removed and a portion that is not removed. This means that the gate insulating film is not formed uniformly in the process. That is, the gate insulating layer is thinly formed on the side edge portion of the patterned gate, which may expose the gate.

Problems of the liquid crystal display panel and the manufacturing method according to the prior art described above are as follows.

First, in the gate insulating film forming process, which is a subsequent step in forming a single layer or double layer structure, the height of the gate metal is limited due to step coverage, thereby increasing the resistance of the wiring, and increasing the height of the gate metal without considering step coverage. If not limited, there is a problem that the gate insulating film is not uniformly applied.

Second, the low-resistance wiring increases the line resistance, which causes a decrease in response response speed in large-area liquid crystal display panels that have many scanning lines. There is this.

Accordingly, the present invention has been made to solve the above problems, the gate wiring (including the gate electrode of the thin film transistor) is formed by using an insulating material in a two-layer structure (possible multilayer structure), and the data wiring is also a two-layer structure (multilayer It is also an object of the present invention to provide a liquid crystal display panel and a manufacturing method having a low resistance wiring which can be formed in a structure), thereby lowering the resistance of the wiring and applicable to a large area liquid crystal display panel.

It is another object of the present invention to convert a lower gate wiring (including a gate electrode of a thin film transistor) among the gate wirings (including a gate electrode of a thin film transistor) formed of the two-layer structure (multilayer structure is possible) into a light blocking material that serves as a light blocking layer. It is an object of the present invention to provide a liquid crystal display panel and a manufacturing method of which the aperture ratio is improved and the process is simplified by forming.

Another object of the present invention is to form an upper gate wiring (including a gate electrode of a thin film transistor) of the gate wiring (including a gate electrode of a thin film transistor) by growing a film by an electroplating method, which does not require an additional mask process, thereby simplifying the process. It is an object of the present invention to provide a liquid crystal display panel and a manufacturing method.

1A is a first embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a single layer structure are formed.

1B is a cross-sectional view taken along the line II ′ of FIG. 1A.

FIG. 2A is a second embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a two-layer structure are formed.

FIG. 2B is a sectional view taken along the line II-II 'of FIG. 2A

3A is a third embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a single layer structure are formed.

FIG. 3B is a sectional view taken along the line III-III 'of FIG. 3A

4A is a fourth embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a two-layer structure are formed.

FIG. 4B is a sectional view taken along the line IV-IV 'of FIG. 4A

* Explanation of symbols for main parts of the drawings

10: transparent substrate 11: first gate wiring

11a: first gate electrode 12: insulating layer

13: second gate wiring 13a: second gate electrode

14 gate insulating film 15 semiconductor layer

16: data wiring (or first data wiring)

16a: source electrode 16b: drain electrode

17 insulation layer 18 second data wiring

19: protective film 20: pixel electrode

In order to achieve the above object, a liquid crystal display panel having a low resistance wire according to the present invention includes a plurality of first gate wires and first gate electrodes formed of a light blocking material on a transparent substrate; An insulating layer formed on the transparent substrate to expose the first gate wiring and the first gate electrode; A second gate wiring and a second gate electrode formed by plating a metal material or patterning a metal material on the exposed first gate wiring and the first gate electrode; A gate insulating film formed on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; A semiconductor layer and a source / drain electrode formed in a predetermined region on the gate insulating film; And a data line formed to intersect the first and second gate lines.

According to an aspect of the present invention, since the gate wiring (including the gate electrode of the thin film transistor, the data wiring can also be a two-layer structure) is formed in the two-layer structure by using the insulating layer, Since the thickness can be increased and the resistance of the wiring is lowered, the response and response speed is increased, thereby realizing a large-area liquid crystal display panel having high image quality. In addition, the first gate wiring (including the gate electrode) may be formed of a light blocking material to implement a liquid crystal display panel having a high opening ratio, and the second gate wiring (including the gate electrode) may be formed by an electroplating method to form a second gate. A mask for patterning the wiring is not necessary separately.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

A preferred embodiment of a liquid crystal display panel and a manufacturing method having a low resistance wiring according to the present invention will be described with reference to the accompanying drawings.

FIG. 1A is a first embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a single layer structure are formed, and FIG. 1B is shown in FIG. It is sectional drawing of the I-I 'direction of.

As shown in FIG. 1B, the first gate wiring 11 and the first gate electrode 11a formed on the transparent substrate 10 and the first gate wiring 11 and the first gate electrode 11a are formed. An insulating layer formed on the transparent substrate 10 so as to be exposed, and a second gate wiring 13 and a second metal formed by plating a metal material on the exposed first gate wiring 11 and the first gate electrode 11a. A gate insulating film 14 formed on an entire surface of the insulating layer 12 including a two-gate electrode 13a and the second gate wiring 13 and the second gate electrode 13a; A semiconductor layer 15 formed in a predetermined region on the gate insulating layer 14, an ohmic contact layer (not shown) formed on the semiconductor layer 15, and a source / drain electrode 16a formed on the ohmic contact layer; 16b) and data lines 16 formed to intersect the first and second gate lines 11 and 13, respectively.

The process is as follows.

First, a plurality of first gate lines 11 and first gate electrodes 11a are formed on the transparent substrate 10. That is, the gate metal material including the light blocking layer (BM: black matrix) function is formed by sputtering and patterned using a mask to form the first gate wiring 11 and the first gate electrode 11a.

Since the metal thickness of the 1st gate wiring 11 and the 1st gate electrode 11a can be made high, a low resistance metal wiring can be formed.

The metal material used as the first gate wiring 11 and the first gate electrode 11a is made of a light blocking material, and the light blocking material is made of Cr, CrO _x, or the like.

Subsequently, an insulating layer 12 is formed on the transparent substrate 10 including the first gate wiring 11 and the first gate electrode 11a by spin coating, and patterned using a mask to form the insulating layer 12. The gate wiring 11 and the first gate electrode 11a are exposed.

The insulating layer 12 is made of an organic material, and the organic material includes BCB (BenzoCycloButene), acryl, and the like.

In particular, BCB has a low dielectric constant (2.65) and high heat resistance (about 350 ° C), which is a good insulating material, and thus is suitable for use as a flat film for TFT-LCD (Thin Film Transistor-Liquid Crystal Display).

Subsequently, a gate metal material is grown on the exposed first gate wiring 11 and the first gate electrode 11a by electroplating to form a second gate wiring 13 and a second gate electrode 13a. To form.

Subsequently, silicon nitride or silicon oxide is deposited on the entire surface of the insulating layer 12 including the second gate wiring 13 and the second gate electrode 13a by CVD (Chemical Vapor Deposition) to form a gate insulating film 14. After forming the semiconductor layer 15, the semiconductor layer 15 used as a channel of the thin film transistor is formed on the gate insulating layer 14 on the second gate electrode 13a. Subsequently, an ohmic contact layer (not shown) is formed for the ohmic contact with the source electrode and the drain electrode to be formed later.

Subsequently, a metal such as Al, Mo, Cr, Ta, or Al alloy is formed on the entire surface of the gate insulating layer 14 including the ohmic contact layer, and then patterned to cross the first and second gate lines 11 and 13. The data wiring 16 is formed in a single layer so as to form a single layer. The source / drain electrodes 16a and 16b of the thin film transistor are formed on the semiconductor layer 15.

Subsequently, after the passivation layer 19 is formed on the entire surface including the source / drain electrodes 16a / 16b and the data line, a contact hole is formed to expose the drain electrode 16b, and an indium tin oxide (ITO) or the like. And then patterning the transparent conductive material to form a pixel electrode 20 connected to the drain electrode 16b through a contact hole.

FIG. 2A is a second embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a two-layer structure are formed, and FIG. Is a cross-sectional view in the II-II 'direction.

As shown in FIG. 2B, the process of forming the source / drain electrodes 16a / 16b of the thin film transistor on the ohmic contact layer is the same as that of the first embodiment.

The data line is a line for transmitting a data signal, and as the scan line of the liquid crystal display panel increases, the resistance of the data line should decrease as the gate line increases. Therefore, although a single layer structure may be formed as in the first embodiment, in order to lower the resistance value, the data line may be formed in a two layer structure, and more multilayer structures may be possible.

The data wiring of the two-layer structure includes the first data wiring 16 formed to intersect the first and second gate wirings 11 and 13 and the second data wiring 18 formed on the first data wiring 16. The insulating layer 17 is formed on the gate insulating layer 14 including the first data line 16 to expose the first data line 16.

That is, the first data line 16 is formed to intersect the first and second gate lines 11 and 13, and an insulating material is formed on the gate insulating layer 14 including the first data line 16. After forming and patterning to form the insulating layer 17 to expose the first data line 16, a film is formed on the exposed first data line 16 by electroplating using a metal material. The second data wiring 18 is formed to grow.

Subsequently, after the passivation layer 19 is formed on the entire surface including the source / drain electrodes 16a / 16b and the data line, a contact hole is formed to expose the drain electrode 16b, and an indium tin oxide (ITO) The transparent conductive material is formed and then patterned to form the pixel electrode 20 connected to the drain electrode 16b through the contact hole.

FIG. 3A is a third embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a single layer structure are formed, and FIG. 3B is shown in FIG. Is a cross-sectional view in the III-III 'direction.

As shown in FIG. 3B, the first gate wiring 11 and the first gate electrode 11a formed on the transparent substrate 10 and the first gate wiring 11 and the first gate electrode 11a are formed. The insulating layer 12 formed on the transparent substrate 10 to be exposed, and the second gate wiring 13 formed by patterning a metal material on the exposed first gate wiring 11 and the first gate electrode 11a. ) And a gate insulating film 14 formed on the entire surface of the insulating layer 12 including the second gate electrode 13a and the second gate wiring 13 and the second gate electrode 13a; A semiconductor layer 15 formed in a predetermined region on the gate insulating layer 14, an ohmic contact layer (not shown) formed on the semiconductor layer 15, and a source / drain electrode 16a formed on the ohmic contact layer; 16b); And a data line 16 formed to intersect the first and second gate lines 11 and 13.

The process is as follows.

First, a plurality of first gate lines 11 and first gate electrodes 11a are formed on the transparent substrate 10. That is, the gate metal material including the light blocking layer (BM: black matrix) function is formed by sputtering and patterned using a mask to form the first gate wiring 11 and the first gate electrode 11a.

Since the metal thickness of the 1st gate wiring 11 and the 1st gate electrode 11a can be made high, a low resistance metal wiring can be formed.

The metal material used as the first gate wiring 11 and the first gate electrode 11a is made of a light blocking material, and the light blocking material is made of Cr, CrO _x, or the like.

Subsequently, an insulating layer 12 is formed on the transparent substrate 10 including the first gate wiring 11 and the first gate electrode 11a by spin coating, and the insulating layer 12 is formed using a mask. ) Is patterned to expose the first gate wiring 11 and the first gate electrode 11a.

The insulating layer 12 is made of an organic material, and the organic material includes BCB (BenzoCycloButene), acryl, and the like.

In particular, BCB has a low dielectric constant (2.65) and high heat resistance (about 350 ° C), which is a good insulating material, and thus is suitable for use as a flat film for TFT-LCD (Thin Film Transistor-Liquid Crystal Display).

Subsequently, a gate metal material is formed on the insulating layer 12 including the exposed first gate line 11 and the first gate electrode 11a (see FIG. 3B) by a sputtering method and patterned to form the gate metal material. The second gate wiring 13 and the second gate electrode 13a are formed on the gate wiring 11 and the first gate electrode 11a.

Subsequently, silicon nitride or silicon oxide is deposited on the entire surface of the insulating layer 12 including the second gate wiring 13 and the second gate electrode 13a by CVD (Chemical Vapor Deposition) to form a gate insulating film 14. After forming the semiconductor layer 15, the semiconductor layer 15 used as a channel of the thin film transistor is formed on the gate insulating layer 14 on the second gate electrode 13a. Subsequently, an ohmic contact layer (not shown) is formed for the ohmic contact with the source electrode and the drain electrode to be formed later.

Subsequently, a metal such as Al, Mo, Cr, Ta, or Al alloy is formed on the entire surface of the gate insulating layer 14 including the ohmic contact layer, and then patterned to cross the first and second gate lines 11 and 13. The data wiring 16 is formed in a single layer. The source / drain electrodes 16a and 16b of the thin film transistor are formed on the semiconductor layer 15.

Subsequently, after the passivation layer 19 is formed on the entire surface including the source / drain electrodes 16a and 16b and the data line 16, a contact hole is formed to expose the drain electrode 16b and indium tin is formed. After forming a transparent conductive material such as oxide) and patterning to form a pixel electrode 20 connected to the drain electrode 16b through a contact hole.

FIG. 4A is a fourth embodiment according to the present invention, which is a plan view of a liquid crystal display panel in which a gate wiring (including electrodes) having a two-layer structure and a data wiring (including electrodes) having a two-layer structure are formed, and FIG. 4B is shown in FIG. 4A. Is a cross-sectional view in the IV-IV 'direction.

As shown in FIG. 4B, the process of forming the source / drain electrodes 16a / 16b of the thin film transistor on the ohmic contact layer is the same as that of the third embodiment.

The data line is a line for transmitting a data signal, and as the scan line of the liquid crystal display panel increases, the resistance of the data line should decrease as the gate line increases. Therefore, as in the third embodiment, a single layer structure may be formed, but in order to reduce the resistance value, the data line may be formed in a two layer structure, and more multilayer structures may be possible.

The data wiring of the two-layer structure includes a first data wiring 16 formed to intersect the first and second gate wirings 11 and 13, and second data formed by patterning a metal material on the first data wiring 16. The insulating layer 17 is formed of the wiring 18 and the first data wiring 16 is exposed on the gate insulating film 14 including the first data wiring 16.

That is, the first data line 16 is formed to intersect the first and second gate lines 11 and 13, and an insulating material is formed on the gate insulating layer 14 including the first data line 16. After forming and patterning to form the insulating layer 17 to expose the first data line 16, a metal material is formed on the insulating layer 17 including the exposed first data line 16, Patterning forms a second data line 18 on the exposed first data line 16.

Subsequently, after the passivation layer 19 is formed on the entire surface including the source / drain electrodes 16a and 16b and the second data line 18, a contact hole is formed to expose the drain electrode 16b and an ITO ( A transparent conductive material such as indium tin oxide is formed and then patterned to form a pixel electrode 20 connected to the drain electrode 16b through a contact hole.

The liquid crystal display panel having the low resistance wiring according to the present invention as described above has the following effects.

First, a low resistance wiring is formed by forming a gate wiring (including a gate electrode of a thin film transistor) and / or a data wiring in a two-layer structure using a spin coatable insulating material such as BCB. An area liquid crystal display panel can be implemented.

Second, the lower metal is formed of the light blocking material in the double-layer gate wiring (including the gate electrode of the thin film transistor) to improve the aperture ratio, simplify the process, and can be applied to an existing production system.

Third, since the upper gate wiring (including the gate electrode of the thin film transistor) is formed by growing the film by the electroplating method among the gate wirings (including the gate electrode of the thin film transistor), an additional mask process is not required and the process can be simplified.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (24)

A plurality of first gate wires and first gate electrodes formed of a light blocking material on the transparent substrate; An insulating layer formed on the transparent substrate to expose the first gate wiring and the first gate electrode; A second gate wiring and a second gate electrode formed by plating a metal material on the exposed first gate wiring and the first gate electrode; A gate insulating film formed on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; A semiconductor layer and a source / drain electrode formed in a predetermined region on the gate insulating film; And a data line formed to intersect the first and second gate lines. The method of claim 1, wherein the data line is A liquid crystal display panel having low resistance wiring, which is formed of any one of a single layer structure and a double layer structure. The data wiring of claim 2, wherein the data wiring of the two-layer structure First data lines formed to intersect the first and second gate lines; A liquid crystal display panel having low resistance wiring, comprising: a second data wiring formed by plating with a metal material on the first data wiring. The method of claim 3, An insulating layer is formed on the gate insulating film including the first data wiring so that the first data wiring is exposed, the liquid crystal display panel having low resistance wiring. delete The liquid crystal display panel of claim 1, wherein the light blocking material is made of any one of Cr and CrO _x . delete The liquid crystal display panel according to claim 1, wherein the insulating layer is an organic material. The liquid crystal display panel of claim 8, wherein the organic material is any one of BCB (BenzoCycloButene) and acrylic (Acryl). Forming and patterning a light blocking material on the transparent substrate to form a plurality of first gate lines and first gate electrodes having a predetermined distance; Forming an insulating layer by forming and patterning an insulating material on the transparent substrate so that the first gate wiring and the first gate electrode are exposed; Plating a metal material on the exposed first gate line and the first gate electrode to form a second gate line and a second gate electrode; Forming a gate insulating film on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; And forming a data line in a predetermined region on the gate insulating film to intersect the semiconductor layer, the source / drain electrodes, and the first and second gate wirings. . The method of claim 10, wherein the forming of the data line is performed. A liquid crystal display panel manufacturing method having low resistance wiring, characterized in that it is formed of any one of a single layer structure and a double layer structure. The method of claim 11, wherein forming the data line with the two-layer structure comprises Forming a first data line to intersect the first and second gate lines; Forming an insulating material on the gate insulating film including the first data wire and patterning the insulating material to expose the first data wire; And plating a metal material on the exposed first data line to form a second data line. A plurality of first gate wires and first gate electrodes formed of a light blocking material on the transparent substrate; An insulating layer formed on the transparent substrate to expose the first gate wiring and the first gate electrode; A second gate line and a second gate electrode formed by patterning a metal material on the exposed first gate line and the first gate electrode; A gate insulating film formed on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; A semiconductor layer and a source / drain electrode formed in a predetermined region on the gate insulating film; And a data line formed to intersect the first and second gate lines. The method of claim 13, wherein the data line is A liquid crystal display panel having low resistance wiring, which is formed of any one of a single layer structure and a double layer structure. The data wiring of claim 14, wherein the data wiring of the two-layer structure First data lines formed to intersect the first and second gate lines; And a second data line formed by patterning a metal material on the first data line. The method of claim 15, An insulating layer is formed on the gate insulating film including the first data wiring so that the first data wiring is exposed, the liquid crystal display panel having low resistance wiring. delete The liquid crystal display panel of claim 13, wherein the light blocking material is made of any one of Cr and CrO _x . delete The liquid crystal display panel according to claim 13, wherein the insulating layer is an organic material. 21. The liquid crystal display panel of claim 20, wherein the organic material is any one of BenzoCycloButene (BCB) and acryl (Acryl). Forming and patterning a light blocking material on the transparent substrate to form a plurality of first gate lines and first gate electrodes having a predetermined distance; Forming an insulating layer by forming and patterning an insulating material on the transparent substrate so that the first gate wiring and the first gate electrode are exposed; Forming and patterning a metal material on the insulating layer including the first gate wiring and the first gate electrode to form a second gate wiring and a second gate electrode on the exposed first gate wiring and the first gate electrode. step; Forming a gate insulating film on an entire surface of the insulating layer including the second gate wiring and the second gate electrode; And forming a data line in a predetermined region on the gate insulating film to intersect the semiconductor layer, the source / drain electrodes, and the first and second gate wirings. . The method of claim 22, wherein the forming of the data line is performed. A liquid crystal display panel manufacturing method having low resistance wiring, characterized in that it is formed of any one of a single layer structure and a double layer structure. 24. The method of claim 23, wherein forming the data line with the two-layer structure Forming a first data line to intersect the first and second gate lines; Forming an insulating material on the gate insulating film including the first data wire and patterning the insulating material to expose the first data wire; Forming and patterning a metal material on the insulating layer including the exposed first data line to form a second data line on the exposed first data line. The liquid crystal display panel manufacturing method which has.