KR100393639B1 - method for image processing having high-speed - Google Patents

Abstract

Disclosed is a high speed image processing method for providing a low cost hardware operation logic capable of processing an image input from a camera in real time to reduce the time required for processing and determining an image signal in a central processing unit. Performing binarization logic to output 1 when the data input through the camera (not shown) is greater than the threshold value and 0 when the data is smaller than or equal to the threshold value; Delaying the input data by 1 block by digital data converted to 1 bit data of 0 or 1 through binarization logic, and inputting the serially connected flip-flop logics, D1 logic and D2 logic; Input the output of D1 logic and the output of D2 logic to input terminal 1 and 2 of horizontal comparator respectively, and compare the data inputted at input terminal 1 and the input data at input terminal 2, and if the data are not equal, contour in the horizontal direction Treating the data as occurring; One of the outputs of D1 logic is directly input to input terminal 2 of the vertical comparator, and the other of the outputs of D1 logic is input to input terminal 1 of the vertical comparator through one line size data delay memory and input to input terminal 1 Comparing the input data with the data input to the second input terminal and processing that the contour data is generated in the vertical direction when the data are not the same; In addition, the data output through the horizontal comparator and the vertical comparator are sequentially stored in the first memory bank Bank0 and the second memory bank Bank1 by the memory control logic so that one side memory stores information and the CPU simultaneously. And accessing information in the other side of the memory.

Description

Method for image processing having high-speed}

The present invention relates to an ultra-fast image processing method, and in particular, to provide a low-cost hardware operation logic that can process the image input from the camera in real time to reduce the time taken to process and determine the image signal in the central processing unit It relates to a high speed image processing method.

In general, various image processing apparatuses for performing various inspections using image sensors such as cameras in place of human eyes are required in various industrial sites. Image processing, which plays a role of determining or measuring the quality of a product at an industrial site, performs the signal processing according to the purpose of receiving and processing an analog or digital camera signal and performs various calculations by a mounted central processing unit. It is determined whether or not the measurement.

The image data output from the camera has a relatively large data capacity, and in many cases, more than five inspections per second are often required in industrial sites, and the high speed image processing apparatus is currently very expensive. Therefore, the implementation of ultra-fast image processing apparatus that can be implemented at low cost is emerging as a key issue.

In general, an image processing apparatus used in an industrial site is generally used by mounting an image processing apparatus on a general computer. Among the image processing methods, an ultra-high speed processing method includes a DSP technology and a parallel processing method, but it is relatively complicated and expensive. This is an expensive drawback.

However, the implementation of ultra-fast processing inspection performance capable of real-time processing in an image processing system applied in an industrial field is one of the most important factors that are absolutely important in terms of productivity and introduction efficiency.

In conclusion, there is an urgent need for an ultra-high speed processing device which can be easily used in an industrial site and has a low cost.

The present invention has been made in view of the above problems and circumstances, and an object of the present invention is to implement a hardware calculation logic for extracting contour data in real time from the image data input from the camera, 90% of the processing time of the image data It is possible to process a portion corresponding to the degree in real time, and additionally to configure the operation logic and memory configuration to provide an ultra-fast image processing method capable of faster real-time processing.

1 is a system diagram for explaining a concept of an ultrafast image processing method according to the present invention.

2 is a block diagram showing the configuration of a memory used in the ultra-fast image processing method according to the present invention.

<Explanation of symbols for the main parts of the drawings>

110: image data 120: binarization logic

130 140: Flipflop logic 150: Horizontal comparator

160: vertical comparator 200: memory

210: memory control logic 220, 230: memory bank

240: bus controller 250: CPU

The present invention for achieving such an object,

Performing binarization logic to output 1 when the data input through the camera (not shown) is greater than the threshold value and 0 when the data is smaller than or equal to the threshold value;

Delaying the input data by 1 block by digital data converted to 1 bit data of 0 or 1 through binarization logic, and inputting the serially connected flip-flop logics, D1 logic and D2 logic;

Input the output of D1 logic and the output of D2 logic to input terminal 1 and 2 of horizontal comparator respectively. Compare the data inputted at input terminal 1 and the data input at input terminal 2, and if the data is not the same, outline the horizontal direction. Treating the data as occurring;

One of the outputs of D1 logic is directly input to input terminal 2 of the vertical comparator, and the other of the outputs of D1 logic is input to input terminal 1 of the vertical comparator through one line size data delay memory and input to input terminal 1 Comparing the input data with the data input to the second input terminal and processing that the contour data is generated in the vertical direction when the data are not the same; And,

The data output through the horizontal comparator and the vertical comparator are sequentially stored in the first memory bank Bank0 and the second memory bank Bank1 by the memory control logic, so that one memory stores information and the CPU And accessing information in the memory.

According to the present invention, an image signal input from a camera can be processed in real time by a hardware operation logic.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a system diagram for explaining a concept of an ultrafast image processing method according to the present invention, and FIG. 2 is a block diagram showing a configuration of a memory used in the ultrafast image processing method according to the present invention.

According to the present invention, in order for the CPU to calculate an image input from a camera and to achieve a processing purpose, it is necessary to process the input signal in accordance with the processing purpose. Hardware processing logic is implemented so that the processing unit (CPU) can make the determination in the shortest time, which greatly reduces the time required for processing and determination.

Specifically, in the present invention, since the main decision basis of the industrial image processing apparatus is almost all of the results obtained by the contour data of each image, hardware detection is performed so that ultra-fast image processing can be performed. Implement computational logic, followed by a description of the memory circuit.

In the ultra-fast image processing method according to the present invention, in order to extract horizontal and vertical contour data from original image data, an analog signal is converted into a digital signal and received as an analog signal, and the digital signal is directly received as digital data. . The received data obtains coordinate data corresponding to the contour data of the image through hardware arithmetic logic.

Referring to FIG. 1, 8Bit image data 110 input through a camera (not shown) is converted into 1Bit data of 0 or 1 through binarization logic 120. The binarization logic 120 outputs 1 (high) when the input data is larger than the threshold and 0 (low) when it is smaller than or equal to, thereby converting the analog signal into a digital signal and converting the digital signal directly into digital data. Operate to receive.

The image data digitally converted through the binarization logic 120 delays the input data by 1 clock and is input to the D1 logic 130 and the D2 logic 140 which are flip-flop logics connected in series. The output side of the D1 logic 130 is connected to the second input terminal of the horizontal comparator 150 and the vertical comparator 160. Input 1 of the horizontal comparator 150 is connected to the output side of the D2 logic 140, input 2 of the vertical comparator 160 is directly connected to the output side of the D1 logic 130, 1 of the vertical comparator 160 The first input terminal is connected to the output side of the D1 logic 130 through the data delay memory 170 of one line size.

Therefore, the horizontal comparator 150 compares the left and right data because the image data pixel Pixel before 1 clock is input to the first input terminal of the horizontal comparator 150 rather than the pixel of the image data input to the second input terminal. If the data are not the same, edge data is treated as having occurred, and 1 is output. If the left and right data are the same, 0 is output.

Since the input terminal 1 of the vertical comparator 160 is connected to the output side of the D1 logic 130 through a data delay memory 170 of one line size, the data input to the input terminal 2 of the vertical comparator 160 is performed. Data before one line is entered. Therefore, the upper line and the lower line are compared, and if the input data is not the same, edge data is generated in the vertical direction and 1 is output. If the input data is the same, 0 is output.

The horizontal and vertical comparison results of the horizontal comparator 150 and the vertical comparator 160 are combined to transfer the final result to the next logic 180.

That is, the horizontal comparator 150 receives the first image input terminal and the second input terminal receives digital image data in pixel units, and compares the image data before and after 1 clock, and the vertical comparator 160 performs each pixel through the delay memory 170. Compares the image data before and after one line where the image data of the unit is horizontal and treats that edge data is generated in the horizontal and vertical directions, and adds the comparison result to add vertical contour data and horizontal contour data to the next logic (180). ).

The vertical outline data and the horizontal outline data obtained through the horizontal comparator 150 and the vertical comparator 160 are separately stored in the memory 200 having a dual structure as shown in FIG. 2. The memory 200 used in the ultra-fast image processing method according to the present invention has a dual structure in order to process images continuously input in real time, and the memory control logic 210 performs contour data of the first input image. Is stored in the first memory and processed, and the second input image data is stored in the second memory and processed.

As shown in FIG. 2, the vertical contour data and the horizontal contour data obtained through the horizontal comparator 150 and the vertical comparator 160 are divided into two memory banks through the bus controller 240 under the control of the memory control logic 210. (Bank) 220, 230 are sequentially stored. That is, while the memory control logic 210 writes data to the first memory bank Bank0 220, the CPU 250 may read data stored in the second memory bank Bank1 230, and control the memory. While the logic 210 stores data in the second memory bank Bank1 230, the CPU 250 accesses the first memory bank Bank0 220 to process the storage and processing of the memory in real time. It can be.

The ultra-fast image processing method according to the present invention can implement a high-speed industrial image processing apparatus at a low cost, so that the image processing apparatus whose demand is rapidly increasing worldwide can be efficiently used in various industrial sites.

As described above, the ultra-high speed image processing method according to the present invention receives an image signal output from a camera and converts an analog signal into a digital signal and receives the digital signal directly as digital data. The received data extracts horizontal and vertical contour data from the original image data through hardware arithmetic logic, and enables to store and access the extracted data in real time. Thus, the high speed industrial image processing apparatus can be implemented at low cost. have.

Although the preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be improved or modified by those skilled in the art within the scope of the technical idea of the present invention.

Claims (1)

Performing binarization logic to output 1 (high) if the data input through the camera (not shown) is greater than the threshold value and 0 (low) if the data is smaller than or equal to the threshold value; Delaying the input data by 1 block by the digital data converted into 1Bit data of 0 or 1 through the binarization logic 120, and inputting to the D1 logic 130 and the D2 logic 140 which is a flip-flop logic connected in series ; The output of the D1 logic 130 and the output of the D2 logic 140 are input to the first and second input terminals of the horizontal comparator 150, respectively, and the data input to the first input terminal and the second input terminal. Comparing the processed data and processing that the contour data is generated in the horizontal direction if the data are not the same; One of the outputs of the D1 logic 130 is directly input to the second input terminal of the vertical comparator 160, and the other of the outputs of the D1 logic 130 is provided through the one line size data delay memory 170. Inputting to the first input terminal of the vertical comparator 160, comparing the data input to the first input terminal with the data input to the second input terminal, and processing the contour data in the vertical direction if the data is not the same; And, The data output through the horizontal comparator 150 and the vertical comparator 160 are sequentially stored in the first memory bank Bank0 and the second memory bank Bank1 by the memory control logic 210. And storing the information in one side of the memory and allowing the CPU 250 to access the information in the other side of the memory.