KR100390433B1 - Apparatus for tracking error of digital TV receiver - Google Patents

Abstract

The present invention relates to an error tracking device of a DTV receiver that receives a transmitted signal modulated by a VSB method and tracks a phase error. In particular, the squared error is obtained by squared and averaged an error obtained after obtaining an error from a phase-compensated I 'signal. An MSE measurement unit for obtaining (MSE), a bandwidth control unit for generating and outputting a band control signal according to the MSE value output from the MSE measurement unit, and estimating a phase error from the I 'and Q' signals compensated for by the phase noise Then, the gain of the estimated phase error is adjusted according to the band control signal, and the gain is restored by complex multiplying the restored I signal and the estimated Q signal by a sine value and a cosine value proportional to the adjusted phase error value. And a phase noise compensator for compensating the phase noise remaining in the I signal and the estimated Q signal. After reliability is obtained with high MSE it is possible to prevent performance deterioration due to the rapid change in phase noise by adjusting the bandwidth of the loop filter, while promptly, for the impulsive noise and the burst noise in accordance with the MSE value.

Description

Apparatus for tracking error of digital TV receiver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital TV (DTV) receiver, and more particularly, to an error tracking device of a DTV receiver that receives a signal modulated and transmitted in a VSB scheme and removes phase noise.

In general, the Grand Alliance's VSB method, which is adopted as a standard for digital TV (e.g., HDTV) transmission method in the United States and Korea, is one of two sidebands that occur up and down around the carrier when amplitude is modulated. This method modulates only the remaining part when the sideband signal is greatly attenuated. That is, one of the methods of efficiently using the band region by taking only one sideband spectrum of the baseband and transferring it to the passband.

The most notable characteristics of this VSB transmission scheme are pilot signals, data segment synchronization signals, and field synchronization signals. These signals can be used to improve characteristics such as carrier recovery and timing recovery. And, how well the synchronization signals are restored has a great effect on the performance of the entire VSB receiving system.

That is, a transmitting side such as a broadcasting station passes a mapper that changes the desired power level before transmitting a signal. For example, in the case of 8 VSB for terrestrial broadcasting, the output level of the mapper is 8 symbol values (amplitude level). That is, -168, -120, -72, -24, 24, 72, 120, or 168. In addition, the mapper forcibly creates and inserts four symbol segment sync signals for every 832 symbols by appointment, and field sync signals are forcibly created and inserted at 313 data segment positions.

At this time, the promised form of the segment sync signal is logically 1, 0, 0, 1, and the mapper output level is assigned to '120' when the sync is '1' and '-120' when the '0'. That is, the segment sync signal has only two levels and continues to be repeated for every data segment.

1 is proposed in the Advanced Television Systems Committee (ATSC) standard, which is a DTV broadcasting standard, as a VSB data frame format including such data and a synchronization signal. Referring to FIG. 1, one frame consists of two fields and one field consists of 313 data segments. One data segment is composed of four symbol data segment sync signals and 828 symbols of data. The data segment sync signals are not error corrected coded. That is, each data segment is composed of a data segment sync signal section of 4 symbols and a Data + EEC (Forward Error Correction) signal section of 828 symbols. The first four symbols in one data segment are data segment sync parts, and the first data segment in one field is a field sync part.

At this time, each signal constituting the data frame as shown in FIG. 1 is composed of data of a constant level (eg, 8 levels in case of 8 VSB) as shown in FIG. Since these data represent only I signals, the Q values are randomly distributed according to each I level.

3 is a general block diagram of a DTV receiver having such a data frame format. When an RF signal modulated in a VSB manner is received through an antenna, the tuner 301 selects a desired channel frequency and converts it into an intermediate frequency (IF) signal. After that, it outputs to the demodulator 302. The demodulator 302 demodulates the IF signal into a baseband signal through carrier recovery and converts the IF signal into a digital baseband signal of I, Q components through analog / digital (A / D) conversion and phase separation. Only the signal of component I is outputted to the synchronous detection and timing recovery unit 306 and the equalizer 303.

At this time, since the signal of the I component includes signal distortion by a channel, a tuner, etc., the equalizer 303 is used to compensate for this. The equalizer 303 removes a linear distortion of an amplitude causing interference between symbols included in the signal of the I component and a ghost generated by reflection of a building or a mountain using the signal of the I component and a synchronization signal, and then tracks an error. Output to section 304. The error tracking unit 304 compensates for phase noise and the like remaining in the channel equalized signal and outputs the compensated data to the slicing unit 305. The slicing unit 305 slices the error tracked data to a preset slice level and restores the original transmitted signal.

In addition, the synchronization detection and timing recovery unit 306 restores the field synchronization signal, the segment synchronization signal, etc., which were inserted at the time of transmission from the baseband I signal output from the demodulator 302, The I signal is used to generate the same symbol clock as was used at transmission. This is because the ATSC VSB transmission system proposed for the US digital TV (DTV) method transmits only data without transmitting a symbol clock. At this time, the synchronization signals detected by the synchronization detection and timing recovery unit 306 are output to the equalizer 303, and a symbol clock proportional to the timing error of current symbols is sent to the demodulator 302 for A / D conversion. Is output.

On the other hand, in the DTV receiver of the ATSC (Advanced Television Systems Committee) 8VSB transmission system proposed in most digital transmission systems and DTV transmission methods currently used in the United States, the signal transmitted from the transmitting side is transmitted through airwaves or wired. When coming, it is necessary to use the tuner 301. At this time, the frequency generator of the tuner 301 does not generate a constant frequency and causes high and low frequency shaking according to its performance. One of the noises generated by the frequency shaking phenomenon is phase noise. In addition, a small DC offset and a gain error are mixed in the signal passing through the demodulator 302 and the equalizer 303 to compensate for the distortion of the channel.

That is, the equalizer 303 compensates for channel distortion, phase noise, gain error, etc. applied to the transmission signal, but the bandwidth of the loop for updating the equalization coefficient is narrow, so that the rapidly changing noise and error cannot be compensated properly. In particular, since the phase noise generated by the tuner 301 changes rapidly, the equalizer 304 does not sufficiently compensate for the phase noise. In addition, the DC deviation and the gain error which are not partially compensated for in the equalizer 303 are also mixed in the equalized signal.

Thus, the error tracker 304 corrects this phase noise, DC deviation, and gain error.

4 shows the phase noise by tuner 301. At this time, with respect to L2, L1 is an adjacent signal level. 4, the angle between the original data position (e.g., L2) and the actual data position (e.g., E1 or E2) due to the phase error, d, becomes the phase error due to the phase noise. At this time, the relationship between the I / Q value and the phase noise is as follows. That is, at the same Q value, if the I error value is small, the phase noise is small, and if the I error value is large, the phase noise is large. Conversely, if the Q value is small at the same I error value, the phase noise is large, and if the Q value is large, the phase noise is small.

For example, assuming that a phase error d occurs, the magnitudes of the I error values E1 and E2 thereby vary depending on the Q value. That is, I error values E1 and E2 of different magnitudes appear for the same phase error d depending on the magnitude of the Q value. Therefore, the Q value allows more reliable estimation of phase noise.

5 is a block diagram illustrating a general error tracking unit 304. The signal passed through the equalizer 303 is composed of only I component data. However, both I and Q data are required to compensate for phase noise.

First, the multiplier 501 compensates the gain error of the I signal by multiplying the gain error compensation signal sequentially passed through the gain loop filter 511 and the limiter 512 with the signal of the I component output from the equalizer 303. The retarder 502 and a Hilbert transform FIR filter 503 are output. The Hilbert transform FIR filter 503 inverts the signal of the input I component by 90 degrees and outputs the complex signal to the complex multiplier 505. The I signal inverted by 90 degrees by the Hilbert transform FIR filter 503 is generally referred to as a Q signal. It is called. At this time, the delay unit 502 delays the I signal input by the processing time of the Hilbert transform FIR filter 503, that is, the time corresponding to the number of taps of the FIR filter, and outputs the delayed I signal to the adder 504. The adder 504 adds the delayed I signal, the DC deviation compensation signal sequentially passed through the DC deviation loop filter 509 and the limiter 510 to compensate for the DC deviation of the I signal, and then outputs the result to the complex multiplier 505. .

The complex multiplier 505 complexes the sine and cosine waves obtained through the phase loop filter 508 and the cosine table 506 with the input I and Q signals to compensate for the phase noise remaining in the I signal.

The I 'signal compensated for the phase noise is output to the error determiner 507 and the slicing unit 305, and the Q' signal is output to the error determiner 507.

The error determiner 507 estimates a phase error, a gain error, and a DC deviation from the I 'and Q' signals, in which the phase noise is compensated, and outputs the phase error to the phase loop filter 508, and the DC deviation is DC. The deviation loop filter 509 outputs the gain error to the gain loop filter 511.

The phase loop filter 508 multiplies, accumulates the loop gain by an estimated value of the input phase noise, that is, the phase error, and outputs the result to the complex multiplier 505. In other words, if the phase error passes through the phase loop filter 508, this value is approximately sinusoidal. Therefore, the output value of the phase loop filter 508 can be used as a sine value. The cosine value may be obtained using the cosine table 506, and a cosine value corresponding to the sine value is read from the cosine table 506 and output to the complex multiplier 505.

In addition, the DC deviation loop filter 509 multiplies and accumulates the DC gain output from the error determining unit 507 by the loop gain to generate a DC deviation compensation signal, and then outputs the result to the adder 504 through the limiter 510. do.

The gain loop filter 511 generates a gain error compensation signal by multiplying and accumulating the loop gain by the gain error output from the error determiner 507 and outputs the gain error compensation signal to the multiplier 501 via the limiter 512. . Here, the limiters 510 and 512 are the DC deviation compensation signal and the gain loop filter 511 output from the DC deviation loop filter 509 for the stability of the DC deviation loop filter 509 and the gain loop filter 511. Limit the gain error compensation signal output from) to within a certain value.

As described above, the conventional error tracking apparatus estimates phase noise, DC deviation, and gain error using both I and Q data, and then passes the respective loop filters 508, 509, and 511 to pass the phase noise, DC (direct current). Deviation and compensate for gain error. At this time, the phase loop filter 508, the DC deviation loop filter 509, and the gain loop filter 511 of the conventional error tracking apparatus are all loop filters having a fixed loop gain, that is, a bandwidth.

However, when an impulse noise or a burst noise occurs, the reliability of the received signal is lowered. Therefore, it is necessary to limit the estimation of the phase noise, the gain error, and the DC deviation due to the unreliable data. In this case, the bandwidth of the loop filter (that is, the loop gain) may be limited. If, in the case described above, the estimates of phase noise, gain error, and DC deviation are not limited, the ability to cope with impulse noise or burst noise may be significantly reduced.

However, when a narrow bandwidth is used for the loop filter, there is a problem in that performance is not quickly compensated for rapidly changing phase noise.

This happens because the bandwidth of the loop filter is fixed.

The present invention is to solve the above problems, an object of the present invention is to measure the mean square error (MSE) from the received data and then vary the bandwidth of the loop filter according to the MSE value, impulse noise and burst noise The present invention provides an error tracking device of a digital TV receiver which copes quickly with and prevents performance degradation due to fast phase noise change.

1 illustrates an example of a VSB data frame format proposed in the ATSC standard.

2 shows an example of a boundary between a VSB signal level and a level;

3 is a block diagram showing an example of a general DTV receiver

4 shows an example of phase noise generated by the tuner of FIG.

5 is a detailed block diagram of the error tracking unit of FIG. 3.

6 is a block diagram illustrating an error tracking device of a DTV receiver according to the first embodiment of the present invention.

7 is a detailed block diagram of the MSE measurement unit of FIG.

8 is a block diagram illustrating an error tracking apparatus of a DTV receiver according to a second embodiment of the present invention.

Explanation of symbols for main parts of the drawings

601 gain gain multiplier 602 delay

603: Hilbert Transform FIR Filter 604: DC Compensation Adder

605: Complex Multiplier 606: Cosine Table

607: code and size detection unit 608: error unit

609: phase error generator 610: phase loop filter bandwidth determination unit

611: phase loop filter 612: DC deviation loop filter bandwidth determination unit

613: DC deviation loop filter 614: limiter

615: gain error loop filter bandwidth determination unit

616 gain loop filter 617 limiter

618: MSE measurement unit 619: bandwidth control unit

An error tracking apparatus of a digital TV receiver according to the present invention for achieving the above object, recovers the I signal from the signal transmitted in the residual sideband (VSB) modulation scheme, and estimates the Q signal from the restored I signal An error tracking device of a digital TV receiver which tracks and compensates phase noise (I ', Q' signals) from the reconstructed I signal and the estimated Q signal. In the synchronous signal section, the mean square error (MSE) is obtained by taking the square and the mean of the difference between the absolute value of the I 'signal compensated for the phase noise and the preset first reference level. After obtaining the difference value between the absolute value of the compensated I 'signal and the second preset reference level, the absolute value of the I' signal is larger than the largest data level in the corresponding VSB receiving system. The MSE measurement unit for obtaining the mean squared error (MSE) by taking the square and the mean of the difference value only, the bandwidth control unit for generating and outputting a band control signal according to the MSE value output from the MSE measurement unit, and the phase noise After estimating the phase error from the compensated I 'and Q' signals, the bandwidth of the loop filter is varied according to the band control signal to adjust the gain of the estimated phase error, and the gain is proportional to the adjusted phase error value. And a phase noise compensator for complexing a value and a cosine value to the recovered I signal and the estimated Q signal to compensate for the phase noise remaining in the recovered I signal and the estimated Q signal.

The MSE measurement unit obtains the difference between an absolute value calculating unit taking an absolute value in the received data, and a difference between a preset first reference level and an absolute value of the received data or received data in the synchronization signal section, and outputs an error. An error generator for obtaining the difference between the second reference level and the absolute value of the received data or received data, and outputting the error as an error, a square that takes a square of the error value output from the error generator, and whether the shift control signal is active or not The N-tap shift register for receiving the shifted squared error outputted from the square portion or keeping the previous state without being inputted, and the value of each register of the N-tap shift register are added, and then the result of the addition is obtained. An MSE output unit for dividing the number of taps of the shift register by an average square error (MSE); The absolute value and the synchronization signal are input to the value calculating unit, and the shift control signal is unconditionally activated in the synchronization signal section, and the shift control signal is activated only when the absolute value of the received data is outside the second reference level in the data section. And a shift control unit for outputting to a tap shift register.

The phase noise compensator slices the phase noise-compensated I 'signal to a preset slicing level to obtain a close symbol level value, and subtracts the thus obtained symbol level value from the I' signal to generate an error value of the I 'signal. A phase estimator for estimating a phase error using an error value of the I 'signal and a sign and magnitude of a Q' signal, and a phase error estimated by the phase error estimator according to a band control signal output from the bandwidth controller A phase loop filter bandwidth determining unit that adjusts a gain of the phase loop, a phase loop filter accumulating the phase error adjusted by the gain, a sine value proportional to the accumulated phase error, and a cosine value And a complex multiplier for complexly multiplying the Q signal to remove residual phase noise.

The phase noise compensator slices the phase noise-compensated I 'signal to a preset slicing level to obtain a close symbol level value, and subtracts the thus obtained symbol level value from the I' signal to generate an error value of the I 'signal. A phase estimator for estimating a phase error by using an error value of the I 'signal and a sign and magnitude of a Q' signal, and a phase loop that accumulates the estimated phase noise and then limits the accumulated phase noise to a predetermined value A filter filter, a phase loop filter bandwidth determiner for adjusting a gain of the phase error limited within the predetermined value according to a band control signal output from the bandwidth controller, and a sine value and a cosine value proportional to the phase error of which the gain is adjusted. And a complex multiplier for complexing the reconstructed I signal and the estimated Q signal to remove residual phase noise.

The error tracking device of the digital TV receiver according to the present invention generates a positive DC deviation and a negative DC deviation compensation value according to a sign of an error value obtained from a phase noise compensated I 'signal, and then controls the band of the bandwidth controller. A DC deviation loop filter bandwidth determining unit adjusting the gain of the DC deviation compensation value according to a signal, a DC deviation loop filter unit accumulating the gain-adjusted DC deviation compensation value and limiting the output to a predetermined value and outputting the same; The apparatus further includes a DC deviation compensator including a DC compensation adder configured to add the restored I signal to the DC deviation compensation value output from the DC deviation loop filter to compensate for the DC deviation, and output the compensation to the phase noise compensator.

An error tracking device of a digital TV receiver according to the present invention includes a DC counter for generating a DC deviation up or down signal according to a sign of an I 'signal compensated for phase noise and performing an up or down count, and a band of the bandwidth controller. The DC deviation loop filter bandwidth determiner for adjusting and outputting the gain of the counted value according to a control signal, and the restored I signal is added to the value whose gain is adjusted by the DC deviation loop filter bandwidth determiner to compensate for the DC deviation. And further comprising a DC deviation compensator configured as a DC compensation adder for outputting to the phase noise compensator.

The error tracking device of the digital TV receiver according to the present invention will increase or decrease the overall gain of the received signal according to the sign of the I 'signal compensated for the phase noise and the sign of the error value obtained from the I' signal. And a gain loop filter bandwidth determiner configured to adjust a gain of the gain error compensation value according to a band control signal of the bandwidth controller, and accumulate the gain adjusted error gain value. A gain loop multiplier that limits the output to a predetermined value and outputs the multiplied gain error compensation value by multiplying the reconstructed I signal by the gain error compensation value output from the gain loop filter unit, and then outputs the gain error multiplier to the phase noise compensator Characterized in that it further comprises a gain error compensation unit configured to.

The error tracking device of the digital TV receiver according to the present invention generates an up or down count after generating a gain up or down signal according to a sign of an I 'signal compensated for phase noise and an error value obtained from the I' signal. A gain loop filter bandwidth determiner for adjusting and outputting a gain of the counted value according to a gain error counter to be performed, a band control signal of the bandwidth controller, and a gain adjusted value at the gain loop filter bandwidth determiner The apparatus may further include a gain error compensator configured to gain gain multiplier by multiplying the restored I signal and outputting the gain error to the phase noise compensator.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 6 is a block diagram illustrating an error tracking device of a DTV receiver according to a first embodiment of the present invention, and a gain for compensating for a gain error of an I signal by adding an I signal input from an equalizer 303 and a gain error compensation signal. Compensation multiplier 601, a delay 602 delaying the I signal output from the gain compensation multiplier 601 for a predetermined time, and generates a Q signal by inverting the I signal output from the gain compensation multiplier 601 by 90 degrees. In the Hilbert transform FIR filter 603, the DC compensation adder 604 to compensate for the DC deviation of the I signal by adding the I signal and the DC deviation compensation signal output from the delay unit 602, the DC compensation adder 604 A complex multiplier 605 for removing residual phase errors by multiplying the output I signal and the Q signal output from the Hilbert transform FIR filter 603 and the cosine wave, and the Q having the phase error compensated by the complex multiplier 605 Mouth signal A magnitude and code detection unit 607 that detects the sign and magnitude of the Q 'signal, and receives an error value of the I' signal, a sign of the error, and I by receiving an I 'signal having a phase error compensated by the complex multiplier 605. An error unit 608 for generating a sign of the signal, a magnitude and a magnitude of the Q 'signal detected by the magnitude and code detection unit 607, and an error value of the I' signal obtained by the error unit 608 A phase error generator 609 for estimating a phase error, an MSE measurement unit 618 for obtaining an error from an I 'signal compensated for by the phase error, squared and averaged to obtain a mean square error (MSE), The bandwidth control unit 619 generates and outputs a band control signal according to the MSE level, and adjusts the gain of the phase error output from the phase error generator 609 according to the band control signal output from the bandwidth control unit 619. Output phase The phase loop filter 611 and the phase that accumulate phase gains whose gains are adjusted by the loop filter bandwidth determiner 610 and the phase loop filter bandwidth determiner 610 and output them as sine values to the complex multiplier 605. A cosine table 606 for outputting a cosine value corresponding to the output of the loop filter 611 to the complex multiplier 605, and a negative DC compensation if the sign of the error value output from the error unit 608 is a positive value. If the negative value is negative, the DC deviation loop filter bandwidth determination unit 612 generates a positive DC compensation value and then adjusts and outputs a gain of the DC compensation value according to the band control signal output from the bandwidth controller 619. ), The DC deviation loop filter 613 that accumulates the DC compensation value output from the DC deviation loop filter bandwidth determiner 612, and the outputs of the DC deviation loop filter 613 by limiting the output within the predetermined value to the DC compensation adder. Output to (604) The limiter 614 determines whether to increase or decrease the gain of the restored I signal according to the sign of the I 'signal output from the error unit 608 and the error code, and then adjusts the gain of the determined gain compensation signal. A gain loop filter bandwidth determining unit 615, a gain loop filter 616 accumulating a gain compensation value output from the gain loop filter bandwidth determining unit 615, and an output of the gain loop filter 616 within a predetermined value. It includes a limiter 617 to limit and output to the gain compensation multiplier (601).

In FIG. 6 described above, the phase loop filter bandwidth determiner 610, the phase loop filter 611, and the cosine table 606 are phase error compensation signal output units, and the DC deviation loop filter bandwidth determiner 612, DC deviation The loop filter 613 and the limiter 614 are referred to as the DC deviation compensation signal output, and the gain loop filter bandwidth determiner 615, the gain loop filter 616, and the limiter 617 are referred to as the gain compensation signal output. can do.

In the first embodiment of the present invention configured as described above, the gain compensation multiplier 601 is configured to output the I component output from the equalizer 303 to the gain error compensation signal sequentially passed through the gain loop filter 616 and the limiter 617. The signal is multiplied by the signal to compensate for the gain error of the I signal, and then output to the delay unit 602 and the Hilbert transform FIR filter 603. The Hilbert transform FIR filter 603 inverts the signal of the input I component by 90 degrees, generates a Q signal, and outputs the Q signal to the complex multiplier 605.

The delay unit 602 delays the inputted I signal by the processing time of the Hilbert transform FIR filter 603, that is, the time corresponding to the number of taps of the FIR filter, and outputs the delayed I signal to the DC compensation adder 604. The DC compensation adder 604 adds the DC deviation compensation signal sequentially passed through the DC deviation loop filter 613 and the limiter 614 to the delayed I signal to compensate for the DC deviation of the I signal, and then to the complex multiplier 605. Output

The complex multiplier 605 compensates the residual phase noise by complex-multiplying the sine and cosine waves obtained through the phase loop filter 611 and the cosine table 606 with the input I and Q signals.

The I 'signal compensated for the phase noise is output to an error determiner 608, a mean square error measurer 618, and a slicing unit 305, and the Q ′ signal is a code and magnitude detector. 607). The sign and magnitude detector 607 detects the sign and magnitude of the Q 'signal and outputs the sign and magnitude to the phase error generator 609. At this time, since the number of taps of the Hilbert transform FIR filter 603 is limited, the size of the Q 'is not an accurate value. Accordingly, the code and size detection unit 607 outputs section information to which Q 'belongs as a size by setting a predetermined number of sections without reflecting all of the magnitudes of the Q' values.

The error unit 608 slices the I 'signal to a slicing level SP to obtain a value of a near symbol level, and the error value of the I' signal, which is the value obtained by subtracting the thus obtained symbol level, from the I 'signal, and the sign of the error. And generate the sign of the I 'signal.

At this time, the error value of the I 'signal is output to the phase error generator 609, the sign of the error is output to the DC deviation loop filter bandwidth determiner 612 and the gain loop filter bandwidth determiner 615, The sign of the I 'signal is output to the gain loop filter bandwidth determiner 615.

The phase error generator 609 obtains an estimated value of phase noise, that is, a phase error by using the error value of the I 'signal and the sign and magnitude of the Q' signal detected by the sign and magnitude detector 607, and then phase The loop filter is output to the bandwidth determiner 610. Here, there may be various methods for estimating the phase error. For example, if the sign of the Q 'signal is positive, the error value of the I' signal is estimated as the phase error, and if it is negative, the error value of the I 'signal is compensated. May be taken to estimate the phase error.

The MSE measuring unit 618 obtains an error from the I 'signal, squares and averages the MSE, and outputs the MSE level to the bandwidth controller 619.

A detailed block diagram of the MSE measurement unit 618 is shown in FIG. 7, and the process of obtaining the MSE will be described in detail later.

On the other hand, the bandwidth controller 619 generates a band control signal for adjusting the loop gain of the loop filter according to the MSE value obtained by the MSE measurement unit 618 and the DC loop loop with the phase loop filter bandwidth determiner 610. The filter bandwidth determiner 612 and the gain loop filter bandwidth determiner 615 are output to the filter bandwidth determiner 612.

At this time, the band control signal output from the bandwidth controller 619 has the following control information.

That is, when the MSE obtained from the I value through the error tracking loop is large, noise is mixed in the received signal. Therefore, the estimated value of the phase noise obtained from the I signal at this time has low reliability. In this case, a band control signal is generated to select a narrow bandwidth in order to limit reflection of an estimated value from a signal having low reliability.

On the other hand, when the MSE is small, since the signal contains little noise, the estimated value of the phase noise obtained from the I signal at this time has high reliability. Therefore, the bandwidth of the loop filter is widened to generate a band control signal so that it can be better reflected.

In this case, the form of the band control signal output from the bandwidth control unit 619 may be 1 bit or multiple bits of data depending on the number of bandwidths divided so that a narrow bandwidth to a wide bandwidth can be selected step by step according to the size of the MSE. .

The phase loop filter bandwidth determination unit 610 adjusts the gain of the phase error value applied to the phase loop filter 611 according to the band control signal output from the bandwidth control unit 619 to adjust the bandwidth of the phase loop filter 611. Adjust it. That is, when the loop gain of the phase loop filter 611 is determined by the phase loop filter bandwidth determiner 610 according to the band control signal, the gain of the phase error value is adjusted to the determined loop gain and then the phase loop filter 611. Will be printed).

The phase loop filter 611 receives and accumulates a phase error value whose gain is adjusted, and outputs the result to the complex multiplier 605 and the cosine table 606.

In this case, since the value passed through the phase loop filter 611 may be used as a sine value, it is output to the complex multiplier 605. In addition, the cosine table 606 outputs a cosine value corresponding to the output value of the phase loop filter 611 to the complex multiplier 605. That is, since the sine and cosine values inputted to the complex multiplier 605 are sine and cosine values having a frequency proportional to the phase error accumulated by the phase loop filter 611, I, Q data is applied to the sine and cosine values. The complex multiplying removes phase noise remaining in the reconstructed I, estimated Q signal.

On the other hand, the DC deviation loop filter bandwidth determination unit 612 is a negative DC compensation value if the sign of the error value output from the error unit 608 is a positive value, and a positive DC compensation value if the negative value is DC. Output to the deviation loop filter 613. At this time, the gain of the DC compensation value is adjusted according to the band control signal output from the bandwidth controller 619 and output to the DC deviation loop filter 613. That is, the DC deviation loop filter bandwidth determiner 612 adjusts the loop gain of the negative DC compensation value or the positive DC compensation value according to the band control signal output from the bandwidth controller 619, and then the DC deviation loop filter. Output to (613). The DC deviation loop filter 613 accumulates a negative DC compensation value or a positive DC compensation value that is output by adjusting the gain, and then outputs the negative DC compensation value to the DC compensation adder 604 through the limiter 614. At this time, the limiter 614 limits the DC deviation compensation value output from the DC deviation loop filter 613 to within a predetermined value for the stability of the DC deviation loop filter 613 and outputs it to the DC compensation adder 604. .

In addition, the gain loop bandwidth determiner 615 receives the code and the error code of the I signal output from the error unit 608 to determine whether the gain compensation is larger or smaller than the present value, that is, the I signal. Decide how much to raise or lower and output the gain loop filter 617 as a gain compensation value. This is because the overall magnitude of the recovered I signal may be up or down relative to the zero level. In this case, the gain loop bandwidth determiner 615 adjusts the gain of the gain compensation signal according to the band control signal output from the bandwidth controller 619 and outputs the gain to the gain loop filter 616. The gain loop filter 616 accumulates the gain compensation signal and outputs the gain compensation signal to the multiplier 601 through the limiter 617.

In the first embodiment of the present invention, the phase loop filter 611, the DC deviation loop filter 613, and the gain loop filter 616 serve as an accumulator.

Next, a process of obtaining an MSE will be described with reference to FIG. 7.

Referring to FIG. 7, the MSE measurement unit 618 shifts the shift control signal according to the absolute value calculating unit 702 taking an absolute value into the received VSB data 701, the presence or absence of a synchronization signal 703, and the magnitude of the received data from which the absolute value is taken. An error generator 705 that obtains an error from the shift control unit 704, the synchronization signal 703, and the received VSB data 701, and a square unit that squares the error obtained by the error generator 705. 706, a shift register 708 for shifting or holding the square error 707 input according to the shift control signal, an adder 709 for adding a value stored in each register of the shift register 708, and the adder ( And a divider 710 which divides the output of 709 by the number of taps of the shift register 708 and averages it.

FIG. 7 configured as described above measures MSE not only in the synchronous signal section but also in the data section in order to obtain a reliable and fast MSE of the received signal. At this time, in the data section, when the received data is between the largest positive level (e.g., 168 for 8VSB) and the smallest negative level (e.g. -168 for 8VSB), The error value obtained from the received data is saturated to 1/2 of each level difference. Therefore, an error above the saturation value cannot be measured, and an error above the saturation value goes to the next level, that is, the interference is caused to the next level, thereby reducing the reliability of the error value. This becomes a big factor in lowering the accuracy of the error in the data section having several levels. At this time, the received signal outside the largest positive and negative small levels of the data section (for example, a value less than -168 or greater than 168 in the case of 8VSB) does not have an adjacent level. It can be less affected by interference with the level. Accordingly, the present invention improves reliability by obtaining MSE only for received signals outside the largest positive and negative lowest levels in the data section.

To this end, the VSB data 701 input to the absolute value calculator 702 represents data sampled at a symbol ratio after demodulation in a VSB receiving system. The sync signal 703 serves to indicate a field sync signal section and a segment sync signal section in a VSB data frame. Here, the sync signal represents a sync signal section as 0 or 1.

At this time, the absolute value calculator 702 takes an absolute value in the input VSB data 701 and outputs the value (| Data |) to the shift controller 704.

The shift control unit 704 operates the shift register 708 unconditionally in the synchronization signal section, and operates or holds the shift register 708 according to the size of the data | Data | where the absolute value is taken in the data section. . For example, in the data period, the shift register 708 receives a square error and performs a shift operation only when the absolute value of the received data is larger than the largest data level in the corresponding VSB receiving system. The shift register 708 is held to control the shift register 708 not to receive a square error. For example, if the current 8VSB receiving system has 8 symbol values (amplitude levels), that is, -168, -120, -72, -24, 24, 72, 120, and 168, and the data section, the shift control unit 704 ) Operates the shift register 708 only when the absolute value of the received data is greater than 168.

Meanwhile, the error generator 705 obtains an error differently according to whether the data is received in the synchronization signal section or the data received in the data section. That is, in the sync signal section, if the received data is a positive value, the positive reference level (that is, the maximum sync section level) is subtracted; if the negative value, the negative reference level (that is, the minimum sync section level) is subtracted to obtain an error. . For example, if the 8VSB receiving system and the data value received in the sync interval are 110, the error value is -10 (= 110-120). If the data value is -110, the error value is 10 (= -110-(-120). )) If the data received in the data interval is a positive value, the positive maximum reference level is subtracted; if the negative value, the negative minimum reference level is subtracted to obtain an error. For example, if the 8VSB receiving system and the data value received in the data interval is 176, the error value is 8 (= 176-168). If the data value is -176, the error value is -8 (= -176-(-168). )) The error value is input to the square unit 706, squared, and output to the shift register 708. Then, the shift register 708 receives the square error by the shift control signal, shifts or holds it, and discards the square error without receiving the previous state.

The shift register 311 is an N-tap shift register, in which a register capable of storing N values is connected in series, and has a function of holding a previous value without receiving a current input.

That is, the shift register 708 looks at the shift control signal of the shift controller 704, and shifts the square error by receiving the square error when the square error 707 output from the square unit 706 is a value of a selected section. If the value is not selected, the square error is not received.

N values stored in the shift register 708 are added to the adder 709 and output to the divider 710. The divider 710 divides the result of adding the values of the registers of the shift register 708 by the number of taps of the shift register. As a result, the output of the divider 710 becomes the mean square error value.

Accordingly, the MSE measuring unit 618 obtains a square error for the VSB data received in the field synchronization section and the segment synchronization section, and measures the MSE, and in each VSB receiving system of the absolute values of the received VSB data in the data section. Select only the value larger than the largest data level to find the square error and measure the MSE.

The error generator 705 may obtain an error from the absolute value of the received data output from the absolute value calculator 702, not the received VSB data. That is, in this case, the error generator 705 determines whether the input absolute value is the absolute value of the data received in the synchronization signal section or the absolute value of the data received in the data section. If it is determined that the synchronization signal interval is determined, the maximum level value of the synchronization signal interval, that is, the two-level symbol value, is positive from the absolute value of the received data, and this subtraction value is output as an error value to the square 706. . On the other hand, if it is determined that the data interval, the maximum signal level of the corresponding VSB receiving system is subtracted from the absolute value of the received data, and this subtracted value is output as an error value to the square 706.

FIG. 8 is a block diagram illustrating an error tracking device of a DTV receiver according to a second embodiment of the present invention. The configuration and operation of the MSE measurement unit 819 and the bandwidth control unit 820 may be applied to FIG. 6 as it is. 6 is different from the configuration and operation of the phase error compensation signal output unit, the DC deviation compensation signal output unit, the gain compensation signal output unit, and the error unit 808.

That is, referring to FIG. 8, the phase error compensation signal output unit limits the output of the phase accumulator 810 and the phase accumulator 810 that accumulate the phase error value estimated by the phase error generator 809 within a predetermined value. A phase error loop filter for adjusting the gain of the phase error value output from the limiter 811 according to the band control signal of the bandwidth controller 820 and outputting the gain to the complex multiplier 805 and the cosine table 806. The bandwidth determining unit 812 is configured.

The DC deviation compensation signal output unit may limit the output value of the DC deviation counter 813 and the DC deviation counter 813 to up or down count according to the deviation up / down signal output from the error unit 808 within a predetermined value. DC deviation loop filter bandwidth for adjusting the gain of the DC deviation compensation value output from the limiter 814 according to the limiter 814 and the band control signal of the bandwidth controller 820 and outputting the gain to the DC compensation adder 804. The decision unit 815 is configured.

The gain error compensation signal output unit may limit the output value of the gain error counter 816 and the gain error counter 816 up or down according to a gain up / down signal output from the error unit 808 within a predetermined value. The gain loop filter bandwidth is determined by adjusting the gain of the gain error compensation value output from the limiter 817 according to the limiter 817 and the band control signal of the bandwidth controller 820 and outputting the gain to the gain compensation multiplier 801. Section 818.

In the second embodiment of the present invention configured as described above, the error unit 808 slices the I 'signal to the slicing level SP to obtain a value of the adjacent symbol level, and subtracts the thus obtained symbol level from the I' signal. Generates the error value of the I 'signal, the sign of the error, and the sign of the I' signal. The error value of the I 'signal is output to the phase error generator 809, and a DC deviation up or down signal is generated from the sign of the I' signal and then output to the DC deviation counter 813. That is, the error unit 808 determines that there is a positive DC deviation if the sign of the I 'signal is a positive value, and determines that there is a negative DC deviation if the sign of the I' signal is a negative value. The deviation up signal is generated and output to the DC deviation counter 813. The DC deviation counter 813 increases the current value by 1 when the deviation up signal is input and decreases the current value by 1 when the deviation down signal is input.

In addition, a gain up or down signal is generated using the sign of the I 'signal and an error code, and then output to the gain error counter 816. The gain up or down signal is not a signal that adjusts the magnitude of the gain, but a signal that specifies whether to count up or down in the gain error counter 816. That is, the gain error counter 816 increases the present value by 1 when the gain up signal is input, and decreases the present value by 1 when the gain down signal is input.

On the other hand, the operation of the phase error generator 809 is the same as in FIG. 6 described above, and the phase error estimated by the phase error generator 809 is accumulated in the phase accumulator 810 and then phased through the limiter 811. The loop filter bandwidth determination unit 812 is output. The phase loop filter bandwidth determiner 812 adjusts the gain of the phase error value output from the limiter 811 according to the band control signal output from the bandwidth controller 820 and then cosines with the complex multiplier 805. Output to table 806.

In addition, the value increased or decreased by 1 according to the deviation up or down signal in the DC deviation counter 813 is a DC deviation compensation value and is output to the DC deviation loop filter bandwidth determiner 815 through the limiter 814. . The DC deviation loop filter bandwidth determiner 815 adjusts the gain of the DC deviation compensation value output from the limiter 814 according to the band control signal output from the bandwidth controller 820 and then adds a DC compensation adder 804. )

Meanwhile, the value increased or decreased by 1 according to the gain up or down signal in the gain error counter 816 is output to the gain loop filter bandwidth determiner 818 through the limiter 817. The gain loop filter bandwidth determiner 818 adjusts the gain of the gain error compensation value output from the limiter 817 according to the band control signal output from the bandwidth controller 820 and then gain gain multiplier 801. Will output

In the second embodiment of the present invention, the phase accumulator 810, DC deviation counter 813, and gain error counter 816 are a kind of loop filter. That is, in the case of the first and second embodiments of the present invention, the characteristics of the loop filter are different.

Further, the first embodiment of the present invention adjusts and then accumulates the loop gains of the phase error, the DC deviation compensation value, and the gain error compensation value, and the second embodiment is the phase error, DC deviation compensation value, and gain. It is different to accumulate or count error compensation and then adjust the loop gain of the resulting value.

As described above, according to the error tracking device of the DTV receiver according to the present invention, a reliable MSE is obtained in both the data section as well as the synchronization section, and then used to compensate for phase error, DC deviation, and gain error according to the MSE value. By adjusting the bandwidth of each loop filter, it is possible to quickly cope with the state of the signal and the channel environment. In particular, it is possible to quickly cope with impulse noise and burst noise while preventing performance degradation due to fast phase noise change.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (9)

Restoring an I signal from a signal transmitted in a residual sideband (VSB) modulation scheme, estimating a Q signal from the reconstructed I signal, and tracking phase noise from the reconstructed I signal and the estimated Q signal to compensate (I In the error tracking device of a digital TV receiver (', Q' signal), In the synchronization signal section, which is inserted in a predetermined form at intervals between the data sections, the squared and average values of the difference between the absolute value of the I 'signal compensated for the phase noise and the preset first reference level are squared and averaged. MSE), and in the data section, the difference value between the absolute value of the I 'signal compensated for the phase noise and the second preset reference level is obtained, and the absolute value of the I' signal is the largest in the corresponding VSB receiving system. An MSE measurement unit obtaining a mean square error (MSE) by taking the square and the mean of the difference only when the data level is larger than the data level; A bandwidth controller configured to generate and output a band control signal according to the MSE value output from the MSE measurement unit; And After estimating the phase error from the I 'and Q' signals compensated for by the phase noise, the bandwidth of the loop filter is varied according to the band control signal to adjust the gain of the estimated phase error, and the gain is adjusted to the phase error value. And a phase noise compensator for compensating a sine value and a cosine value proportional to the restored I signal and the estimated Q signal to compensate for the phase noise remaining in the recovered I signal and the estimated Q signal. Error tracking device of a digital TV receiver. The method of claim 1, wherein the MSE measuring unit An absolute value calculating section which takes an absolute value in the received data I ', In the synchronization signal section, the difference between the first reference level and the absolute value of the I 'signal or the I' signal compensated for the phase noise is calculated and output as an error. In the data section, the preset second reference level and the phase noise are compensated. An error generating unit for calculating a difference between the absolute value of the generated I 'signal or the I' signal and outputting the error; A square that takes a square of the error value output from the error generating unit, An N-tap shift register that receives a square error output from the square according to whether a shift control signal is active or shifts or maintains a previous state without receiving an input; An MSE output unit which adds a value of each register of the N-tap shift register and divides the result by the number of taps of the shift register to output an average square error (MSE); The absolute control unit receives the absolute value and the synchronization signal, activates the shift control signal unconditionally in the synchronization signal section, and activates the shift control signal only when the absolute value of the received data is out of the second reference level in the data section. And a shift control unit for outputting to an N-tap shift register. The method of claim 1, wherein the bandwidth control unit The smaller the MSE value, the band control signal having a wider bandwidth and the smaller the MSE value generates a band control signal having a narrower bandwidth. The method of claim 1, wherein the phase noise compensator Slicing the phase noise compensated I 'signal to a preset slicing level to obtain a close symbol level value, subtracting the obtained proximity symbol level value from the I' signal to generate an error value of the I 'signal, and then generating the error value of the I' signal. A phase estimator for estimating a phase error by using an error value of and a sign and magnitude of a Q 'signal, A phase loop filter bandwidth determiner for adjusting a gain of the phase error estimated by the phase error estimator in accordance with a band control signal output from the bandwidth controller; A phase loop filter that accumulates the phase error with the gain adjusted; And a complex multiplier for removing residual phase noise by complex multiplying the restored I signal and the estimated Q signal by a sine value and a cosine value proportional to the accumulated phase error. . The method of claim 1, wherein the phase noise compensator Slicing the phase noise compensated I 'signal to a preset slicing level to obtain a close symbol level value, subtracting the obtained proximity symbol level value from the I' signal to generate an error value of the I 'signal, and then generating the error value of the I' signal. A phase estimator for estimating a phase error by using an error value of and a sign and magnitude of a Q 'signal, A phase loop filter unit configured to accumulate the estimated phase noise and then limit the accumulated phase noise to a predetermined value; A phase loop filter bandwidth determiner for adjusting a gain of a phase error limited within the predetermined value according to a band control signal output from the bandwidth controller; And a complex multiplier for canceling phase noise remaining by complex multiplying the restored I signal and the estimated Q signal by a sine value and a cosine value proportional to the adjusted phase error. Tracking device. The method of claim 1, After generating a positive DC deviation, a negative DC deviation compensation value according to the sign of the error value obtained from the phase-compensated I 'signal, and adjusts the gain of the DC deviation compensation value according to the band control signal of the bandwidth controller. DC deviation loop filter bandwidth determination unit, A DC deviation loop filter for accumulating the DC deviation compensation value of which the gain is adjusted and then limiting the output to a predetermined value and outputting the result; And a DC deviation compensator including a DC compensation adder configured to compensate the DC deviation by adding the restored I signal to the DC deviation compensation value output from the DC deviation loop filter unit, and then output the compensation to the phase noise compensator. Error tracking device for digital TV receivers. The method of claim 1, A DC counter for generating a DC deviation up or down signal according to the sign of the phase-compensated I 'signal to perform an up or down count; A DC deviation loop filter bandwidth determiner configured to adjust and output a gain of the counted value according to a band control signal of the bandwidth controller; The DC deviation loop filter bandwidth determiner further comprises a DC deviation compensator comprising a DC compensation adder for compensating for the DC deviation by adding the restored I signal to the gain-adjusted value and outputting the compensated DC deviation to the phase noise compensator. Error tracking device of a digital TV receiver. The method of claim 1, A gain error compensation value is generated by determining whether to increase or decrease the overall gain of the received signal according to the sign of the I 'signal compensated for the phase noise and the error value obtained from the I' signal. A gain loop filter bandwidth determiner for adjusting a gain of the gain error compensation value according to a band control signal of a controller; A gain loop filter unit which accumulates the gain error compensation value of which the gain is adjusted and limits the output to a predetermined value and outputs the result; The apparatus may further include a gain error compensator including a gain compensation multiplier configured to multiply the gain error compensation value output from the gain loop filter unit by the restored I signal to compensate for the gain error, and output the compensation to the phase noise compensator. Error tracking device for TV receivers. The method of claim 1, A gain error counter for generating a gain up or down signal according to a sign of an I 'signal compensated for phase noise and an error value obtained from the I' signal, and performing an up or down count; A gain loop filter bandwidth determiner for adjusting and outputting a gain of the counted value according to a band control signal of the bandwidth controller; The gain loop filter bandwidth determiner further includes a gain error compensator including a gain compensation multiplier configured to multiply the gain-adjusted value by the restored I signal to compensate for the gain error, and then output the compensation error to the phase noise compensator. Error tracking device for digital TV receivers.