KR100370035B1 - Method for driving address electrode of plasma display panel - Google Patents
Method for driving address electrode of plasma display panel Download PDFInfo
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- KR100370035B1 KR100370035B1 KR10-2000-0063694A KR20000063694A KR100370035B1 KR 100370035 B1 KR100370035 B1 KR 100370035B1 KR 20000063694 A KR20000063694 A KR 20000063694A KR 100370035 B1 KR100370035 B1 KR 100370035B1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
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- Plasma & Fusion (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
입력 영상 패턴에 따라 어드레스 전극 구동시 에너지 회수회로의 동작을 차단하여 소비전력을 감소시킬 수 있도록 한 PDP의 어드레스 전극 구동방법에 관한 것으로, 에너지 회수회로를 포함한 어드레스 전극 구동부 및 제어부를 구비한 플라즈마 디스플레이 패널의 어드레스 전극 구동방법에 있어서, 제어부에서 입력 영상의 데이터 변화량을 검출하는 단계와, 데이터 변화량이 기준치 이하이면 어드레스 전극 구동부의 에너지 회수회로로의 제어출력을 차단하여 그 동작을 정지시킨 상태에서 어드레스 전극을 구동하는 단계와, 데이터 변화량이 기준치 이상이면 정상적으로 어드레스 전극을 구동하는 단계를 포함하여 이루어지므로 PDP 모듈의 소비전력을 감소시킬 수 있다.The present invention relates to a method of driving an address electrode of a PDP which cuts power consumption by blocking an operation of an energy recovery circuit according to an input image pattern. The present invention relates to a plasma display having an address electrode driver including a energy recovery circuit and a controller. In the method of driving an address electrode of a panel, the control unit detects an amount of change in data of an input image, and if the amount of change in data is equal to or less than a reference value, the control output to the energy recovery circuit of the address electrode driver is blocked and the operation is stopped. The method includes driving the electrode and driving the address electrode normally when the amount of data change is greater than or equal to the reference value, thereby reducing power consumption of the PDP module.
Description
본 발명은 플라즈마 디스플레이 패널(Plasma Display Panel: 이하, PDP라 칭함)에 관한 것으로서, 특히 플라즈마 디스플레이 패널 구동방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (hereinafter referred to as PDP), and more particularly to a plasma display panel driving method.
일반적으로 PDP는 가스방전을 이용한 화상 표시장치로서, 최근의 기술개발에 힘입어 대화면에서의 영상 품질이 향상되고 있다.In general, PDP is an image display device using gas discharge, and the image quality on the large screen is improved by the recent technology development.
PDP는 그 구동방식에 따라 크게 대향방전을 하는 직류 구동방식과 면방전을 하는 교류방식으로 대별된다. 교류방식의 PDP는 직류 방식에 비해 소비전력이 적고 수명이 긴 장점을 가지고 있으며, 유전체를 사이에 두고 교류전압을 인가하여 그 반주기마다 방전을 행하게 되며, 서브 필드(Sub field) 방식과 서브 프레임(Sub frame) 방식으로 나뉘어진다.PDPs are roughly classified into direct current driving methods that face large discharges and alternating current methods that perform surface discharges. AC type PDP has the advantages of less power consumption and longer life than DC type, and it discharges every half cycle by applying AC voltage across the dielectric. Subfield method and subframe ( Sub frame).
256 계조를 표현할 때 서브필드 방식은 한 프레임을 8개의 서브 필드로 시분할하게 된다. 각 서브필드는 다시 전화면을 초기화하는 리셋기간과 전화면을 선순차 방식으로 주사하면서 데이터를 기입하는 어드레스 기간 및 데이터가 기입된 셀들의 발광상태를 유지시키는 서스테인 기간으로 시분할된다. 여기서 각 서브필드의 리셋기간 및 어드레스 기간은 각 서브필드에서 동일한 반면에 각 서스테인 기간은 휘도 상대비에 따라 2n(n=0,1,2,3,4,5,6,7)의 비율로 증가되도록 시간이 할당된다. 각 서브필드에서는 해당 서스테인 기간에 비례하는 계조를 구현하게 되고 각 서브필드에서 구현된 계조가 조합됨으로서 한 프레임에서 256계조를 표현하게 된다.When representing 256 gray levels, the subfield method time-divisions one frame into eight subfields. Each subfield is time-divided into a reset period for initializing the full screen, an address period for writing data while scanning the full screen in a line-sequential manner, and a sustain period for maintaining the light emission state of cells in which data is written. Here, the reset period and the address period of each subfield are the same in each subfield, whereas each sustain period is a ratio of 2 n (n = 0,1,2,3,4,5,6,7) according to the luminance relative ratio. The time is allocated to increase. Each subfield implements a gray scale proportional to the corresponding sustain period, and the gray scales implemented in each subfield are combined to express 256 gray scales in one frame.
이때 서브필드 방식에서 서스테인 기간의 서스테인 방전시 소비전력이 큰 문제가 있으므로 이를 감소시킬 목적으로, 패널에서 방전되는 전압을 다시 회수하여 패널을 충전시키기 위한 에너지 회수회로가 포함되고 있다.At this time, since the power consumption during the sustain discharge of the sustain period in the sub-field system has a large problem, an energy recovery circuit for recharging the voltage discharged from the panel to charge the panel.
또한 이와 같은 PDP를 구동하기 위한 구동장치는 어드레스 전극을 구동하기 위한 어드레스전극 구동부와, 스캔전극을 구동하기 위한 스캔전극 구동부와, 공통전극을 구동하기 위한 공통전극 구동부와, 입력되는 R/G/B 영상 데이터를 감마보정, 이득제어 등의 과정을 통해 신호처리하고 신호처리된 영상 데이터가 PDP 상에 구현되도록 상기 어드레스전극 구동부, 스캔전극 구동부 및 공통전극 구동부를 구동하기 위한 제어신호를 생성하는 제어부를 포함하여 구성된다.Also, the driving device for driving the PDP includes an address electrode driver for driving an address electrode, a scan electrode driver for driving a scan electrode, a common electrode driver for driving a common electrode, and an input R / G / A controller which processes the B image data through a process such as gamma correction and gain control, and generates a control signal for driving the address electrode driver, the scan electrode driver, and the common electrode driver so that the signal processed image data is implemented on the PDP. It is configured to include.
그리고 상기 각 전극 구동부중 어드레스 전극 구동부는 도 1에 도시된 바와 같이, 제1 FET(Q1), 제2 FET(Q2), 커패시터(C1), 제1 및 제2 다이오드(D1)(D2)로 이루어진 에너지 회수회로와, 제3 FET(Q3)와 제4 FET(Q4)로 이루어진 서스테인 회로 및 데이터 구동 IC(10)로 구성된다.As shown in FIG. 1, the address electrode driver of each of the electrode drivers includes the first FET Q1, the second FET Q2, the capacitor C1, and the first and second diodes D1 and D2. And a sustain circuit and a data drive IC 10 each consisting of a third FET Q3 and a fourth FET Q4.
이와 같이 구성된 어드레스 전극 구동회로의 동작을 도 2를 참조하여 설명하면, 제어부가 'E/R-up' 펄스를 출력함으로서 제1 FET(Q1)를 턴온시키고 이전 PDP 패널의 방전시 충전된 커패시터(C1)가 충전전압을 방전하도록 하여 데이터 구동 IC(10)에 인가되는 전압레벨(G)을 상승시킨다.The operation of the address electrode driving circuit configured as described above will be described with reference to FIG. 2. The control unit outputs an 'E / R-up' pulse to turn on the first FET Q1 and charge the capacitor when the previous PDP panel is discharged. C1) causes the charging voltage to be discharged to raise the voltage level G applied to the data driving IC 10.
이때 제어부는 'Sus-DN' 펄스를 공급하여 제4 FET(Q4)를 턴온상태로 유지시킴으로서 어드레스 전압이 데이터 구동 IC(10)에 공급되지 않도록 한다.At this time, the controller supplies the 'Sus-DN' pulse to maintain the fourth FET Q4 in the on state so that the address voltage is not supplied to the data driving IC 10.
이어서 제어부는 'G'가 일정수준에 도달하는 시점에서 'Sus-up' 펄스를 출력하여 제3 FET(Q3)를 턴온시킴으로서 어드레스 전압을 데이터 구동 IC(10)에 공급하여 'G'를 적정수준까지 상승시키고 그 상태를 소정 시간동안 유지시킨다.Subsequently, the controller outputs a 'Sus-up' pulse to turn on the third FET Q3 when the 'G' reaches a predetermined level, thereby supplying an address voltage to the data driving IC 10 to supply the 'G' to an appropriate level. And raises the state for a predetermined time.
그리고 제어부는 'Sus-up' 펄스를 차단하여 제3 FET(Q3)를 턴오프시키고'E/R-DN' 펄스를 출력하여 제2 FET(Q2)를 턴온시킴으로서 패널에서 방전되는 전압이 커패시터(C1)에 충전되도록 한다.In addition, the control unit turns off the third FET Q3 by blocking the 'Sus-up' pulse and outputs the 'E / R-DN' pulse to turn on the second FET Q2 so that the voltage discharged from the panel is reduced by the capacitor ( To C1).
이어서 제어부는 상기 커패시터(C1)에 일정수준이상 충전이 이루어지면 'Sus-DN' 펄스를 출력하여 제4 FET(Q4)를 '온'시킴으로서 데이터 구동 IC(10)에 전원이 차단되도록 한다.Subsequently, when the capacitor C1 is charged to a predetermined level or more, the controller outputs a 'Sus-DN' pulse to turn on the fourth FET Q4 so that the power supply to the data driving IC 10 is cut off.
이와 같은 과정을 반복하여 어드레스 전극 구동이 이루어진다.This process is repeated to drive the address electrodes.
그러나 스캔전극 구동부와 공통전극 구동부의 경우 고전압이 인가되고 에너지 회수회로가 동작하지 않을 경우 링깅(Ringing)현상을 발생시킬 수 있으므로 필수불가결한 요소인데 반하여, 어드레스 전극 구동부의 경우 입력되는 영상패턴에 따라 불필요하게 에너지 회수회로가 동작하는 경우가 있다.However, in the case of the scan electrode driver and the common electrode driver, a ringing phenomenon may occur when a high voltage is applied and the energy recovery circuit does not operate. However, in the case of the address electrode driver, the address electrode driver depends on the input image pattern. The energy recovery circuit may operate unnecessarily.
즉, 도 3과 같이, 각 영상패턴(Black/Full white/Sub pixel/Super pixel)에 대해 에너지 회수회로를 동작시킨 경우와 동작시키지 않은 경우의 소비전류를 살펴보면, 'Black'과 'Full white'의 경우 에너지 회수회로를 동작시키지 않은 경우가 에너지 회수회로를 동작시킨 경우에 비해 소비전류가 적고, 'Sub pixel'과 'Super pixel'의 경우 에너지 회수회로를 동작시키지 않은 경우가 에너지 회수회로를 동작시킨 경우에 비해 소비전류가 많은 것을 알 수 있다.That is, as shown in FIG. 3, when the energy recovery circuit is operated for each image pattern (Black / Full white / Sub pixel / Super pixel) and the current consumption when it is not operated, 'Black' and 'Full white' In the case of the case where the energy recovery circuit is not operated, the current consumption is lower than when the energy recovery circuit is operated. In the case of the 'Sub pixel' and the 'Super pixel', the energy recovery circuit is not operated. It can be seen that the current consumption is much higher than that in the case of the case where
그리고 상기 영상패턴(Black/Full white/Sub pixel/Super pixel)을 데이터 변화량순으로 'Black〈Full white〈Sub pixel〈Super pixel'와 같이 표시되며, 'P' 지점에서 에너지 회수회로를 동작시킨 경우와 동작시키기 않은 경우의 소비전류가 동일함을 알 수 있다.When the image pattern (Black / Full white / Sub pixel / Super pixel) is displayed as 'Black <Full white <Sub pixel <Super pixel' in the order of data change amount, the energy recovery circuit is operated at the 'P' point. It can be seen that the current consumption when and are not the same.
종래의 기술에 따른 PDP의 어드레스 전극 구동방법은 영상패턴에 상관없이 에너지 회수회로를 동작시키므로 불필요한 에너지 회수회로의 동작으로 인한 소비전력 증가의 문제가 있다.The conventional method of driving an address electrode of a PDP operates an energy recovery circuit regardless of an image pattern, thereby increasing power consumption due to unnecessary energy recovery circuit operation.
따라서 본 발명은 입력 영상 패턴에 따라 어드레스 전극 구동시 에너지 회수회로의 동작을 차단하여 소비전력을 감소시킬 수 있도록 한 PDP의 어드레스 전극 구동방법을 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a method of driving an address electrode of a PDP, which reduces power consumption by blocking an operation of an energy recovery circuit when driving an address electrode according to an input image pattern.
도 1은 일반적인 PDP의 어드레스 전극 구동부의 구성을 나타낸 회로도1 is a circuit diagram showing the configuration of an address electrode driver of a general PDP;
도 2는 종래의 기술에 따른 어드레스 전극 구동부 제어파형을 나타낸 파형도2 is a waveform diagram illustrating a control waveform of an address electrode driver according to the related art.
도 3은 에너지 회수회로 동작시와 비동작시의 소비전력 변화를 나타낸 그래프3 is a graph showing a change in power consumption during operation and non-operation of the energy recovery circuit.
도 4는 본 발명에 따른 PDP의 어드레스 전극 구동방법을 나타낸 플로우챠트4 is a flowchart showing a method of driving an address electrode of a PDP according to the present invention;
도 5a 및 도 5b는 본 발명에 따른 어드레스 전극 구동부 제어파형을 나타낸 파형도5A and 5B are waveform diagrams illustrating control waveforms of an address electrode driver according to an exemplary embodiment of the present invention.
도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings
10: 데이터 구동 IC Q1 ~ Q4: 전계효과 트랜지스터(FET)10: Data Drive IC Q1 to Q4: Field Effect Transistors (FETs)
C1: 커패시터 D1, D2: 다이오드C1: capacitor D1, D2: diode
본 발명은 에너지 회수회로를 포함한 어드레스 전극 구동부 및 제어부를 구비한 플라즈마 디스플레이 패널의 어드레스 전극 구동방법에 있어서, 제어부에서 입력 영상의 데이터 변화량을 검출하는 단계와, 데이터 변화량이 기준치 이하이면 어드레스 전극 구동부의 에너지 회수회로로의 제어출력을 차단하여 그 동작을 정지시킨 상태에서 어드레스 전극을 구동하는 단계와, 데이터 변화량이 기준치 이상이면 정상적으로 어드레스 전극을 구동하는 단계를 포함하여 이루어짐을 특징으로 한다.The present invention provides a method of driving an address electrode of a plasma display panel including an address electrode driver including an energy recovery circuit and a control unit, the method comprising: detecting a data change amount of an input image by the controller; And driving the address electrode in a state in which the control output to the energy recovery circuit is interrupted and its operation is stopped, and normally driving the address electrode when the amount of change in data is greater than the reference value.
이하, 첨부된 도면을 참조하여 본 발명에 따른 PDP의 어드레스 전극 구동방법의 바람직한 일실시예를 설명하면 다음과 같다.Hereinafter, a preferred embodiment of an address electrode driving method of a PDP according to the present invention will be described with reference to the accompanying drawings.
도 4는 본 발명에 따른 PDP의 어드레스 전극 구동방법을 나타낸 플로우챠트이고, 도 5a 및 도 5b는 본 발명에 따른 어드레스 전극 구동부 제어파형을 나타낸 파형도이다.4 is a flowchart illustrating a method of driving an address electrode of a PDP according to the present invention, and FIGS. 5A and 5B are waveform diagrams illustrating control waveforms of an address electrode driver according to the present invention.
본 발명에 따른 PDP의 어드레스 전극 구동방법은 도 4에 도시된 바와 같이, 먼저, 제어부가 입력 영상의 데이터 변화량을 검출하고(S31), 이를 기준값과 비교한다(S32).In the method of driving an address electrode of the PDP according to the present invention, as shown in FIG. 4, first, the controller detects an amount of change in data of an input image (S31) and compares it with a reference value (S32).
즉, 입력 R/G/B 데이터를 합산한 데이터값 또는 R/G/B 각각의 데이터값중 하나를 실제 영상의 데이터 변화량으로 검출하고 이 값을 상술한 영상패턴(Black/Full white/Sub pixel/Super pixel)을 도시한 도 3의 'P'지점에 따른 데이터 변화량을 기준값으로 설정하여 상기 실제 영상의 데이터 변화량과 비교하는 것이다.That is, one of the data value obtained by adding the input R / G / B data or the data value of each of the R / G / B is detected as the data change amount of the actual image, and the value is described as the image pattern (Black / Full white / Sub pixel). / Super pixel) is set as a reference value and the amount of change in data according to point 'P' of FIG.
이어서 상기 비교결과(S32), 입력 영상의 데이터 변화량이 기준값보다 많으면 에너지 회수회로의 동작이 필요하므로 도 5a와 같이, 에너지 회수회로, 서스테인 회로 및 데이터 구동 IC에 정상적인 구동펄스를 공급하여 어드레스 전극 구동부를 정상 구동시킨다(S33).Subsequently, when the amount of change in data of the input image is greater than the reference value, the comparison result (S32) requires the operation of the energy recovery circuit. Thus, as shown in FIG. Normally drive (S33).
즉, 상술한 도 2와 동일한 구동펄스를 공급하여 어드레스 전극 구동동작을 수행한다.That is, the same driving pulse as that of FIG. 2 is supplied to perform the address electrode driving operation.
한편, 상기 비교결과(S32), 입력 영상의 데이터 변화량이 기준값 이하이면 에너지 회수회로의 동작이 불필요하므로 에너지 회수회로로 구동펄스를 출력하지 않고 데이터 구동 IC와, 서스테인 회로에만 구동 펄스를 공급하여 어드레스 전극 구동부를 구동시킨다(S34).On the other hand, since the operation of the energy recovery circuit is unnecessary if the data change amount of the input image is less than the reference value (S32), the drive pulse is supplied only to the data driving IC and the sustain circuit without outputting the driving pulse to the energy recovery circuit. The electrode driver is driven (S34).
즉, 도 5b에 도시된 바와 같이, 도 1의 서스테인 회로의 'C'에 펄스를 출력하여 제3 FET(Q3)를 턴온시킴으로서 데이터 구동 IC(10)에 전원이 공급되도록 하고일정시간 경과후 'C'에 공급되는 펄스를 차단하여 제3 FET(Q3)를 턴오프시키는 동작을 반복하면서 데이터 구동 IC(10)에 입력 영상에 맞도록 펄스를 공급하여 어드레스 전극에 구동하는 것이다.That is, as shown in FIG. 5B, a pulse is output to 'C' of the sustain circuit of FIG. 1 to turn on the third FET Q3 so that the power is supplied to the data driving IC 10 and after a predetermined time elapses. By repeating the operation of turning off the third FET Q3 by interrupting the pulse supplied to C ', the pulse is supplied to the data driving IC 10 in accordance with the input image to drive the address electrode.
본 발명에 따른 PDP의 어드레스 전극 구동방법은 데이터 변화량이 소정 기준치 미만일 경우 에너지 회수회로의 동작 없이 어드레스 전극 구동을 수행하여 소비전력을 저감시키므로 전체 PDP 모듈의 소비전력을 감소시킬 수 있는 효과가 있다.The address electrode driving method of the PDP according to the present invention reduces the power consumption by performing the address electrode driving without the operation of the energy recovery circuit when the amount of data change is less than a predetermined reference value, thereby reducing the power consumption of the entire PDP module.
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| KR100603282B1 (en) * | 2002-07-12 | 2006-07-20 | 삼성에스디아이 주식회사 | Method of driving 3-electrode plasma display apparatus minimizing addressing power |
| KR100474274B1 (en) * | 2002-09-30 | 2005-03-10 | 엘지전자 주식회사 | Low power driving apparatus for display device |
| KR100493623B1 (en) | 2003-06-13 | 2005-06-10 | 엘지전자 주식회사 | Apparatus For Driving Plasma Display Panel |
| KR100515340B1 (en) * | 2003-09-02 | 2005-09-15 | 삼성에스디아이 주식회사 | Method for controlling address power on plasma display panel and apparatus thereof |
| KR100515343B1 (en) | 2003-09-02 | 2005-09-15 | 삼성에스디아이 주식회사 | Method for controlling address power on plasma display panel and apparatus thereof |
| KR100551051B1 (en) * | 2003-11-27 | 2006-02-09 | 삼성에스디아이 주식회사 | Driving apparatus of plasma display panel and plasma display device |
| KR100708846B1 (en) * | 2005-01-18 | 2007-04-17 | 삼성에스디아이 주식회사 | Plasma display device driving method thereof |
| JP5021932B2 (en) * | 2005-12-15 | 2012-09-12 | パナソニック株式会社 | Display panel drive device |
| KR20090108878A (en) | 2008-04-14 | 2009-10-19 | 삼성전자주식회사 | Circuit and method of driving a plasma display panel |
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